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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
95.05 93.83 96.30 95.68 92.84 97.00 96.33 93.35


Total test records in report: 1329
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T301 /workspace/coverage/default/17.otp_ctrl_stress_all_with_rand_reset.3335663780 Apr 30 03:42:16 PM PDT 24 Apr 30 03:57:52 PM PDT 24 47414336275 ps
T317 /workspace/coverage/default/22.otp_ctrl_dai_lock.2223200945 Apr 30 03:42:49 PM PDT 24 Apr 30 03:43:03 PM PDT 24 401689460 ps
T238 /workspace/coverage/default/0.otp_ctrl_sec_cm.1185678686 Apr 30 03:39:57 PM PDT 24 Apr 30 03:43:12 PM PDT 24 10696742537 ps
T318 /workspace/coverage/default/80.otp_ctrl_init_fail.3863448027 Apr 30 03:46:34 PM PDT 24 Apr 30 03:46:39 PM PDT 24 242358355 ps
T319 /workspace/coverage/default/6.otp_ctrl_dai_lock.2503678487 Apr 30 03:40:43 PM PDT 24 Apr 30 03:40:55 PM PDT 24 1254184387 ps
T320 /workspace/coverage/default/0.otp_ctrl_low_freq_read.3659190626 Apr 30 03:39:46 PM PDT 24 Apr 30 03:39:59 PM PDT 24 5899285537 ps
T321 /workspace/coverage/default/47.otp_ctrl_alert_test.3774390644 Apr 30 03:45:35 PM PDT 24 Apr 30 03:45:37 PM PDT 24 742288673 ps
T322 /workspace/coverage/default/19.otp_ctrl_smoke.1107713256 Apr 30 03:42:50 PM PDT 24 Apr 30 03:42:58 PM PDT 24 614703579 ps
T138 /workspace/coverage/default/44.otp_ctrl_init_fail.2806716640 Apr 30 03:45:10 PM PDT 24 Apr 30 03:45:15 PM PDT 24 371820811 ps
T323 /workspace/coverage/default/40.otp_ctrl_regwen.2540991566 Apr 30 03:44:52 PM PDT 24 Apr 30 03:45:05 PM PDT 24 614214452 ps
T1077 /workspace/coverage/default/16.otp_ctrl_dai_lock.620500635 Apr 30 03:42:09 PM PDT 24 Apr 30 03:42:20 PM PDT 24 5981178479 ps
T1078 /workspace/coverage/default/15.otp_ctrl_stress_all_with_rand_reset.3331821826 Apr 30 03:42:00 PM PDT 24 Apr 30 04:43:42 PM PDT 24 1627479830612 ps
T302 /workspace/coverage/default/68.otp_ctrl_stress_all_with_rand_reset.2853805731 Apr 30 03:46:22 PM PDT 24 Apr 30 03:58:05 PM PDT 24 200690810344 ps
T332 /workspace/coverage/default/144.otp_ctrl_parallel_lc_esc.3570414675 Apr 30 03:47:43 PM PDT 24 Apr 30 03:47:48 PM PDT 24 321960839 ps
T333 /workspace/coverage/default/10.otp_ctrl_parallel_lc_req.3682247213 Apr 30 03:41:21 PM PDT 24 Apr 30 03:41:26 PM PDT 24 308453049 ps
T334 /workspace/coverage/default/12.otp_ctrl_stress_all_with_rand_reset.1613453656 Apr 30 03:41:42 PM PDT 24 Apr 30 04:01:03 PM PDT 24 149868721873 ps
T335 /workspace/coverage/default/13.otp_ctrl_alert_test.3181226114 Apr 30 03:41:45 PM PDT 24 Apr 30 03:41:47 PM PDT 24 77602062 ps
T336 /workspace/coverage/default/235.otp_ctrl_init_fail.1832981446 Apr 30 03:48:48 PM PDT 24 Apr 30 03:48:53 PM PDT 24 405947025 ps
T337 /workspace/coverage/default/18.otp_ctrl_macro_errs.1643135514 Apr 30 03:42:21 PM PDT 24 Apr 30 03:42:44 PM PDT 24 1451940998 ps
T338 /workspace/coverage/default/203.otp_ctrl_init_fail.1358789995 Apr 30 03:48:35 PM PDT 24 Apr 30 03:48:41 PM PDT 24 644525536 ps
T339 /workspace/coverage/default/54.otp_ctrl_stress_all_with_rand_reset.3830801185 Apr 30 03:45:58 PM PDT 24 Apr 30 03:56:56 PM PDT 24 128293266463 ps
T340 /workspace/coverage/default/9.otp_ctrl_background_chks.1877805169 Apr 30 03:41:11 PM PDT 24 Apr 30 03:41:33 PM PDT 24 5828851424 ps
T1079 /workspace/coverage/default/28.otp_ctrl_stress_all.3596711701 Apr 30 03:43:35 PM PDT 24 Apr 30 03:44:19 PM PDT 24 5315656609 ps
T1080 /workspace/coverage/default/5.otp_ctrl_dai_lock.4130267109 Apr 30 03:40:37 PM PDT 24 Apr 30 03:40:56 PM PDT 24 740805674 ps
T1081 /workspace/coverage/default/44.otp_ctrl_parallel_lc_req.989310846 Apr 30 03:45:09 PM PDT 24 Apr 30 03:45:31 PM PDT 24 9328860511 ps
T142 /workspace/coverage/default/38.otp_ctrl_init_fail.1951513687 Apr 30 03:44:35 PM PDT 24 Apr 30 03:44:40 PM PDT 24 586494903 ps
T1082 /workspace/coverage/default/12.otp_ctrl_macro_errs.3926756754 Apr 30 03:41:35 PM PDT 24 Apr 30 03:41:59 PM PDT 24 3322667075 ps
T1083 /workspace/coverage/default/5.otp_ctrl_macro_errs.2631186170 Apr 30 03:40:41 PM PDT 24 Apr 30 03:41:25 PM PDT 24 6627130453 ps
T1084 /workspace/coverage/default/31.otp_ctrl_smoke.844029779 Apr 30 03:43:48 PM PDT 24 Apr 30 03:43:55 PM PDT 24 158343774 ps
T1085 /workspace/coverage/default/8.otp_ctrl_alert_test.4145192634 Apr 30 03:41:09 PM PDT 24 Apr 30 03:41:11 PM PDT 24 49098141 ps
T1086 /workspace/coverage/default/34.otp_ctrl_test_access.573687634 Apr 30 03:44:15 PM PDT 24 Apr 30 03:44:30 PM PDT 24 2447245029 ps
T1087 /workspace/coverage/default/289.otp_ctrl_init_fail.1376348116 Apr 30 03:49:09 PM PDT 24 Apr 30 03:49:13 PM PDT 24 111034139 ps
T1088 /workspace/coverage/default/132.otp_ctrl_init_fail.3501133211 Apr 30 03:47:30 PM PDT 24 Apr 30 03:47:34 PM PDT 24 208347201 ps
T1089 /workspace/coverage/default/35.otp_ctrl_init_fail.3437924335 Apr 30 03:44:15 PM PDT 24 Apr 30 03:44:18 PM PDT 24 119005499 ps
T1090 /workspace/coverage/default/3.otp_ctrl_check_fail.4172175304 Apr 30 03:40:16 PM PDT 24 Apr 30 03:40:25 PM PDT 24 710615168 ps
T1091 /workspace/coverage/default/2.otp_ctrl_test_access.1570790171 Apr 30 03:40:12 PM PDT 24 Apr 30 03:40:50 PM PDT 24 3161391643 ps
T1092 /workspace/coverage/default/32.otp_ctrl_check_fail.2867550070 Apr 30 03:43:59 PM PDT 24 Apr 30 03:44:03 PM PDT 24 1760448313 ps
T1093 /workspace/coverage/default/190.otp_ctrl_parallel_lc_esc.3663854352 Apr 30 03:48:21 PM PDT 24 Apr 30 03:48:51 PM PDT 24 1188054483 ps
T1094 /workspace/coverage/default/37.otp_ctrl_parallel_key_req.926860866 Apr 30 03:44:29 PM PDT 24 Apr 30 03:45:02 PM PDT 24 17116399711 ps
T257 /workspace/coverage/default/22.otp_ctrl_parallel_lc_req.3537486676 Apr 30 03:42:50 PM PDT 24 Apr 30 03:43:07 PM PDT 24 7358468803 ps
T1095 /workspace/coverage/default/47.otp_ctrl_stress_all.2087665068 Apr 30 03:45:34 PM PDT 24 Apr 30 03:48:39 PM PDT 24 14884428517 ps
T1096 /workspace/coverage/default/107.otp_ctrl_init_fail.429004599 Apr 30 03:47:08 PM PDT 24 Apr 30 03:47:13 PM PDT 24 223288092 ps
T125 /workspace/coverage/default/39.otp_ctrl_check_fail.3081802666 Apr 30 03:44:41 PM PDT 24 Apr 30 03:45:04 PM PDT 24 1055751898 ps
T1097 /workspace/coverage/default/184.otp_ctrl_parallel_lc_esc.2531131155 Apr 30 03:48:16 PM PDT 24 Apr 30 03:48:22 PM PDT 24 224428175 ps
T1098 /workspace/coverage/default/152.otp_ctrl_parallel_lc_esc.1158394927 Apr 30 03:47:56 PM PDT 24 Apr 30 03:48:00 PM PDT 24 112006524 ps
T1099 /workspace/coverage/default/59.otp_ctrl_init_fail.2442940101 Apr 30 03:46:04 PM PDT 24 Apr 30 03:46:08 PM PDT 24 230929010 ps
T1100 /workspace/coverage/default/23.otp_ctrl_smoke.418457064 Apr 30 03:42:58 PM PDT 24 Apr 30 03:43:04 PM PDT 24 156340215 ps
T1101 /workspace/coverage/default/46.otp_ctrl_stress_all_with_rand_reset.3305856891 Apr 30 03:45:26 PM PDT 24 Apr 30 03:51:50 PM PDT 24 13739992338 ps
T1102 /workspace/coverage/default/46.otp_ctrl_regwen.2749828593 Apr 30 03:45:32 PM PDT 24 Apr 30 03:45:41 PM PDT 24 3659217381 ps
T1103 /workspace/coverage/default/128.otp_ctrl_init_fail.746055290 Apr 30 03:47:26 PM PDT 24 Apr 30 03:47:34 PM PDT 24 2568134537 ps
T1104 /workspace/coverage/default/162.otp_ctrl_init_fail.1093650970 Apr 30 03:48:01 PM PDT 24 Apr 30 03:48:05 PM PDT 24 140827036 ps
T1105 /workspace/coverage/default/258.otp_ctrl_init_fail.834229674 Apr 30 03:48:54 PM PDT 24 Apr 30 03:48:59 PM PDT 24 152384874 ps
T1106 /workspace/coverage/default/16.otp_ctrl_test_access.1063100319 Apr 30 03:42:12 PM PDT 24 Apr 30 03:42:27 PM PDT 24 1167789645 ps
T1107 /workspace/coverage/default/1.otp_ctrl_alert_test.2542865528 Apr 30 03:40:06 PM PDT 24 Apr 30 03:40:08 PM PDT 24 111480784 ps
T121 /workspace/coverage/default/36.otp_ctrl_parallel_lc_esc.2722699221 Apr 30 03:44:19 PM PDT 24 Apr 30 03:44:36 PM PDT 24 360576857 ps
T1108 /workspace/coverage/default/122.otp_ctrl_parallel_lc_esc.1382345710 Apr 30 03:47:23 PM PDT 24 Apr 30 03:47:39 PM PDT 24 1423980749 ps
T303 /workspace/coverage/default/4.otp_ctrl_stress_all_with_rand_reset.1959627260 Apr 30 03:40:26 PM PDT 24 Apr 30 04:06:30 PM PDT 24 257905368219 ps
T1109 /workspace/coverage/default/61.otp_ctrl_parallel_lc_esc.870717367 Apr 30 03:46:05 PM PDT 24 Apr 30 03:46:22 PM PDT 24 542608257 ps
T1110 /workspace/coverage/default/273.otp_ctrl_init_fail.3419158845 Apr 30 03:49:01 PM PDT 24 Apr 30 03:49:07 PM PDT 24 647436913 ps
T1111 /workspace/coverage/default/76.otp_ctrl_parallel_lc_esc.3446950032 Apr 30 03:46:29 PM PDT 24 Apr 30 03:46:40 PM PDT 24 332317921 ps
T1112 /workspace/coverage/default/7.otp_ctrl_stress_all.3486166784 Apr 30 03:40:59 PM PDT 24 Apr 30 03:41:24 PM PDT 24 1123043496 ps
T1113 /workspace/coverage/default/246.otp_ctrl_init_fail.2443637817 Apr 30 03:48:56 PM PDT 24 Apr 30 03:49:01 PM PDT 24 480686584 ps
T1114 /workspace/coverage/default/25.otp_ctrl_regwen.2402601330 Apr 30 03:43:12 PM PDT 24 Apr 30 03:43:19 PM PDT 24 216170813 ps
T1115 /workspace/coverage/default/11.otp_ctrl_smoke.3315920784 Apr 30 03:41:24 PM PDT 24 Apr 30 03:41:31 PM PDT 24 467291985 ps
T1116 /workspace/coverage/default/169.otp_ctrl_init_fail.902418947 Apr 30 03:48:09 PM PDT 24 Apr 30 03:48:12 PM PDT 24 89509445 ps
T1117 /workspace/coverage/default/80.otp_ctrl_stress_all_with_rand_reset.1575002729 Apr 30 03:46:35 PM PDT 24 Apr 30 04:34:59 PM PDT 24 1613502567502 ps
T253 /workspace/coverage/default/48.otp_ctrl_stress_all.4147940036 Apr 30 03:45:41 PM PDT 24 Apr 30 03:50:01 PM PDT 24 21147784877 ps
T1118 /workspace/coverage/default/63.otp_ctrl_init_fail.4079999333 Apr 30 03:46:08 PM PDT 24 Apr 30 03:46:12 PM PDT 24 194225056 ps
T1119 /workspace/coverage/default/43.otp_ctrl_test_access.1981097855 Apr 30 03:45:11 PM PDT 24 Apr 30 03:45:28 PM PDT 24 8797231780 ps
T1120 /workspace/coverage/default/36.otp_ctrl_check_fail.3497290592 Apr 30 03:44:24 PM PDT 24 Apr 30 03:44:56 PM PDT 24 11144110685 ps
T1121 /workspace/coverage/default/45.otp_ctrl_dai_lock.1051099125 Apr 30 03:45:22 PM PDT 24 Apr 30 03:45:54 PM PDT 24 1271813112 ps
T1122 /workspace/coverage/default/23.otp_ctrl_regwen.3504782475 Apr 30 03:43:04 PM PDT 24 Apr 30 03:43:14 PM PDT 24 277190516 ps
T1123 /workspace/coverage/default/46.otp_ctrl_parallel_lc_esc.4091512890 Apr 30 03:45:26 PM PDT 24 Apr 30 03:45:32 PM PDT 24 334265786 ps
T63 /workspace/coverage/default/4.otp_ctrl_init_fail.3639178902 Apr 30 03:40:22 PM PDT 24 Apr 30 03:40:27 PM PDT 24 2353454037 ps
T1124 /workspace/coverage/default/191.otp_ctrl_init_fail.83848454 Apr 30 03:48:22 PM PDT 24 Apr 30 03:48:27 PM PDT 24 398586932 ps
T126 /workspace/coverage/default/31.otp_ctrl_check_fail.620635255 Apr 30 03:43:53 PM PDT 24 Apr 30 03:44:19 PM PDT 24 14615911080 ps
T1125 /workspace/coverage/default/120.otp_ctrl_init_fail.3966490552 Apr 30 03:47:21 PM PDT 24 Apr 30 03:47:25 PM PDT 24 127339074 ps
T1126 /workspace/coverage/default/29.otp_ctrl_dai_lock.1459080651 Apr 30 03:43:42 PM PDT 24 Apr 30 03:44:05 PM PDT 24 884133974 ps
T1127 /workspace/coverage/default/8.otp_ctrl_smoke.4034422625 Apr 30 03:40:59 PM PDT 24 Apr 30 03:41:06 PM PDT 24 586996450 ps
T1128 /workspace/coverage/default/26.otp_ctrl_test_access.2170077185 Apr 30 03:43:15 PM PDT 24 Apr 30 03:43:21 PM PDT 24 401277223 ps
T1129 /workspace/coverage/default/47.otp_ctrl_macro_errs.1929014033 Apr 30 03:45:33 PM PDT 24 Apr 30 03:46:02 PM PDT 24 4266520150 ps
T1130 /workspace/coverage/default/21.otp_ctrl_parallel_lc_esc.3325966707 Apr 30 03:42:50 PM PDT 24 Apr 30 03:43:03 PM PDT 24 253188640 ps
T1131 /workspace/coverage/default/48.otp_ctrl_macro_errs.4175306591 Apr 30 03:45:39 PM PDT 24 Apr 30 03:45:57 PM PDT 24 1278165055 ps
T1132 /workspace/coverage/default/69.otp_ctrl_stress_all_with_rand_reset.1161136488 Apr 30 03:46:20 PM PDT 24 Apr 30 04:23:05 PM PDT 24 718223199379 ps
T1133 /workspace/coverage/default/15.otp_ctrl_init_fail.1867261411 Apr 30 03:41:55 PM PDT 24 Apr 30 03:42:00 PM PDT 24 1758265005 ps
T1134 /workspace/coverage/default/94.otp_ctrl_init_fail.2078319181 Apr 30 03:46:46 PM PDT 24 Apr 30 03:46:50 PM PDT 24 324457875 ps
T1135 /workspace/coverage/default/10.otp_ctrl_parallel_key_req.3153322701 Apr 30 03:41:25 PM PDT 24 Apr 30 03:42:03 PM PDT 24 5028633724 ps
T1136 /workspace/coverage/default/72.otp_ctrl_stress_all_with_rand_reset.3352270071 Apr 30 03:46:28 PM PDT 24 Apr 30 04:05:37 PM PDT 24 189342533890 ps
T250 /workspace/coverage/default/99.otp_ctrl_stress_all_with_rand_reset.3525446804 Apr 30 03:46:54 PM PDT 24 Apr 30 04:07:49 PM PDT 24 49712267202 ps
T1137 /workspace/coverage/default/15.otp_ctrl_dai_errs.3446094010 Apr 30 03:41:57 PM PDT 24 Apr 30 03:42:36 PM PDT 24 5332807514 ps
T1138 /workspace/coverage/default/33.otp_ctrl_parallel_lc_req.292330626 Apr 30 03:43:58 PM PDT 24 Apr 30 03:44:23 PM PDT 24 3136119046 ps
T1139 /workspace/coverage/default/43.otp_ctrl_dai_errs.1196934267 Apr 30 03:45:09 PM PDT 24 Apr 30 03:45:39 PM PDT 24 1828131478 ps
T1140 /workspace/coverage/default/166.otp_ctrl_parallel_lc_esc.2521092560 Apr 30 03:48:05 PM PDT 24 Apr 30 03:48:09 PM PDT 24 169192860 ps
T1141 /workspace/coverage/default/15.otp_ctrl_alert_test.3162934497 Apr 30 03:42:00 PM PDT 24 Apr 30 03:42:02 PM PDT 24 181975230 ps
T304 /workspace/coverage/default/43.otp_ctrl_stress_all_with_rand_reset.3324304686 Apr 30 03:45:10 PM PDT 24 Apr 30 04:18:50 PM PDT 24 584683626974 ps
T1142 /workspace/coverage/default/7.otp_ctrl_alert_test.912331728 Apr 30 03:40:59 PM PDT 24 Apr 30 03:41:01 PM PDT 24 69437144 ps
T1143 /workspace/coverage/default/20.otp_ctrl_parallel_lc_req.2937095248 Apr 30 03:42:36 PM PDT 24 Apr 30 03:42:51 PM PDT 24 544351688 ps
T213 /workspace/coverage/default/21.otp_ctrl_stress_all.1838173171 Apr 30 03:42:43 PM PDT 24 Apr 30 03:45:07 PM PDT 24 19242552365 ps
T1144 /workspace/coverage/default/263.otp_ctrl_init_fail.1067648524 Apr 30 03:48:59 PM PDT 24 Apr 30 03:49:08 PM PDT 24 2701769262 ps
T1145 /workspace/coverage/default/40.otp_ctrl_stress_all.614910723 Apr 30 03:44:54 PM PDT 24 Apr 30 03:45:36 PM PDT 24 2846870075 ps
T1146 /workspace/coverage/default/41.otp_ctrl_parallel_lc_esc.2774841774 Apr 30 03:44:57 PM PDT 24 Apr 30 03:45:07 PM PDT 24 259809859 ps
T1147 /workspace/coverage/default/3.otp_ctrl_alert_test.1873513035 Apr 30 03:40:16 PM PDT 24 Apr 30 03:40:18 PM PDT 24 66219732 ps
T1148 /workspace/coverage/default/9.otp_ctrl_test_access.3968705141 Apr 30 03:41:26 PM PDT 24 Apr 30 03:41:42 PM PDT 24 4948595770 ps
T1149 /workspace/coverage/default/125.otp_ctrl_init_fail.1433609260 Apr 30 03:47:24 PM PDT 24 Apr 30 03:47:28 PM PDT 24 148616021 ps
T1150 /workspace/coverage/default/245.otp_ctrl_init_fail.3672027573 Apr 30 03:48:54 PM PDT 24 Apr 30 03:49:02 PM PDT 24 1868479240 ps
T1151 /workspace/coverage/default/28.otp_ctrl_init_fail.3577326504 Apr 30 03:43:29 PM PDT 24 Apr 30 03:43:33 PM PDT 24 437734823 ps
T1152 /workspace/coverage/default/24.otp_ctrl_smoke.1066828331 Apr 30 03:43:01 PM PDT 24 Apr 30 03:43:07 PM PDT 24 160336401 ps
T1153 /workspace/coverage/default/148.otp_ctrl_parallel_lc_esc.332064519 Apr 30 03:47:50 PM PDT 24 Apr 30 03:47:54 PM PDT 24 118983669 ps
T1154 /workspace/coverage/default/91.otp_ctrl_stress_all_with_rand_reset.75145056 Apr 30 03:46:44 PM PDT 24 Apr 30 04:22:31 PM PDT 24 410069383978 ps
T1155 /workspace/coverage/default/14.otp_ctrl_alert_test.984527880 Apr 30 03:41:58 PM PDT 24 Apr 30 03:42:01 PM PDT 24 999305810 ps
T1156 /workspace/coverage/default/211.otp_ctrl_init_fail.790051966 Apr 30 03:48:41 PM PDT 24 Apr 30 03:48:46 PM PDT 24 172818969 ps
T1157 /workspace/coverage/default/3.otp_ctrl_background_chks.2880872260 Apr 30 03:40:16 PM PDT 24 Apr 30 03:40:39 PM PDT 24 789659684 ps
T1158 /workspace/coverage/default/290.otp_ctrl_init_fail.2753503547 Apr 30 03:49:08 PM PDT 24 Apr 30 03:49:13 PM PDT 24 211689321 ps
T1159 /workspace/coverage/default/19.otp_ctrl_regwen.2336184829 Apr 30 03:42:33 PM PDT 24 Apr 30 03:42:39 PM PDT 24 330107335 ps
T1160 /workspace/coverage/default/41.otp_ctrl_macro_errs.441725507 Apr 30 03:45:01 PM PDT 24 Apr 30 03:45:23 PM PDT 24 1004528607 ps
T1161 /workspace/coverage/default/35.otp_ctrl_parallel_lc_req.2470214527 Apr 30 03:44:15 PM PDT 24 Apr 30 03:44:33 PM PDT 24 6734632972 ps
T1162 /workspace/coverage/default/35.otp_ctrl_stress_all.95457883 Apr 30 03:44:20 PM PDT 24 Apr 30 03:48:11 PM PDT 24 18632683775 ps
T1163 /workspace/coverage/default/6.otp_ctrl_parallel_lc_esc.252890881 Apr 30 03:40:44 PM PDT 24 Apr 30 03:40:51 PM PDT 24 156818544 ps
T1164 /workspace/coverage/default/27.otp_ctrl_stress_all.3502737442 Apr 30 03:43:29 PM PDT 24 Apr 30 03:44:03 PM PDT 24 2477469753 ps
T1165 /workspace/coverage/default/265.otp_ctrl_init_fail.2787822440 Apr 30 03:49:01 PM PDT 24 Apr 30 03:49:07 PM PDT 24 344357168 ps
T1166 /workspace/coverage/default/170.otp_ctrl_parallel_lc_esc.2869112406 Apr 30 03:48:11 PM PDT 24 Apr 30 03:48:24 PM PDT 24 230307588 ps
T1167 /workspace/coverage/default/82.otp_ctrl_init_fail.899352593 Apr 30 03:46:34 PM PDT 24 Apr 30 03:46:40 PM PDT 24 1719179934 ps
T1168 /workspace/coverage/default/45.otp_ctrl_stress_all.2162268275 Apr 30 03:45:21 PM PDT 24 Apr 30 03:51:24 PM PDT 24 105410720410 ps
T1169 /workspace/coverage/default/75.otp_ctrl_stress_all_with_rand_reset.4139366515 Apr 30 03:46:28 PM PDT 24 Apr 30 04:09:08 PM PDT 24 198630701378 ps
T1170 /workspace/coverage/default/192.otp_ctrl_init_fail.2004378823 Apr 30 03:48:21 PM PDT 24 Apr 30 03:48:26 PM PDT 24 152815588 ps
T1171 /workspace/coverage/default/30.otp_ctrl_alert_test.4187907396 Apr 30 03:43:45 PM PDT 24 Apr 30 03:43:48 PM PDT 24 648579991 ps
T258 /workspace/coverage/default/0.otp_ctrl_stress_all_with_rand_reset.1843062839 Apr 30 03:39:51 PM PDT 24 Apr 30 03:58:14 PM PDT 24 98187688411 ps
T1172 /workspace/coverage/default/111.otp_ctrl_parallel_lc_esc.3715852992 Apr 30 03:47:10 PM PDT 24 Apr 30 03:47:17 PM PDT 24 551519241 ps
T1173 /workspace/coverage/default/165.otp_ctrl_init_fail.1217420624 Apr 30 03:48:02 PM PDT 24 Apr 30 03:48:06 PM PDT 24 488195064 ps
T1174 /workspace/coverage/default/9.otp_ctrl_macro_errs.4289250228 Apr 30 03:41:17 PM PDT 24 Apr 30 03:41:39 PM PDT 24 1447904764 ps
T1175 /workspace/coverage/default/278.otp_ctrl_init_fail.985133382 Apr 30 03:48:59 PM PDT 24 Apr 30 03:49:04 PM PDT 24 224957468 ps
T1176 /workspace/coverage/default/22.otp_ctrl_macro_errs.1267467776 Apr 30 03:42:51 PM PDT 24 Apr 30 03:43:20 PM PDT 24 1730641477 ps
T1177 /workspace/coverage/default/155.otp_ctrl_init_fail.2923919450 Apr 30 03:47:56 PM PDT 24 Apr 30 03:48:01 PM PDT 24 402915957 ps
T1178 /workspace/coverage/default/39.otp_ctrl_regwen.1046175857 Apr 30 03:44:40 PM PDT 24 Apr 30 03:44:46 PM PDT 24 246382850 ps
T1179 /workspace/coverage/default/283.otp_ctrl_init_fail.3096419355 Apr 30 03:49:07 PM PDT 24 Apr 30 03:49:13 PM PDT 24 181292390 ps
T1180 /workspace/coverage/default/35.otp_ctrl_dai_errs.516985410 Apr 30 03:44:22 PM PDT 24 Apr 30 03:44:42 PM PDT 24 1259980156 ps
T1181 /workspace/coverage/default/1.otp_ctrl_parallel_lc_req.2190798836 Apr 30 03:39:56 PM PDT 24 Apr 30 03:40:27 PM PDT 24 12171030965 ps
T1182 /workspace/coverage/default/37.otp_ctrl_dai_lock.2423370304 Apr 30 03:44:30 PM PDT 24 Apr 30 03:44:52 PM PDT 24 6056537833 ps
T1183 /workspace/coverage/default/8.otp_ctrl_background_chks.1857656007 Apr 30 03:41:05 PM PDT 24 Apr 30 03:41:49 PM PDT 24 23968051200 ps
T186 /workspace/coverage/default/32.otp_ctrl_parallel_lc_esc.1666110280 Apr 30 03:43:58 PM PDT 24 Apr 30 03:44:12 PM PDT 24 2158962098 ps
T1184 /workspace/coverage/default/9.otp_ctrl_init_fail.217881694 Apr 30 03:41:10 PM PDT 24 Apr 30 03:41:15 PM PDT 24 157207979 ps
T1185 /workspace/coverage/default/216.otp_ctrl_init_fail.1224069412 Apr 30 03:48:41 PM PDT 24 Apr 30 03:48:46 PM PDT 24 168734060 ps
T1186 /workspace/coverage/default/42.otp_ctrl_macro_errs.2730247700 Apr 30 03:45:07 PM PDT 24 Apr 30 03:45:21 PM PDT 24 6034886183 ps
T1187 /workspace/coverage/default/1.otp_ctrl_check_fail.1255347351 Apr 30 03:40:04 PM PDT 24 Apr 30 03:40:16 PM PDT 24 2096671005 ps
T1188 /workspace/coverage/default/19.otp_ctrl_init_fail.1817353406 Apr 30 03:42:26 PM PDT 24 Apr 30 03:42:31 PM PDT 24 151607196 ps
T1189 /workspace/coverage/default/6.otp_ctrl_alert_test.3392666555 Apr 30 03:40:54 PM PDT 24 Apr 30 03:40:57 PM PDT 24 668055006 ps
T1190 /workspace/coverage/default/154.otp_ctrl_parallel_lc_esc.446841853 Apr 30 03:47:55 PM PDT 24 Apr 30 03:48:00 PM PDT 24 239542123 ps
T1191 /workspace/coverage/default/34.otp_ctrl_parallel_key_req.989252733 Apr 30 03:44:16 PM PDT 24 Apr 30 03:44:40 PM PDT 24 3305551873 ps
T264 /workspace/coverage/default/56.otp_ctrl_init_fail.4253206764 Apr 30 03:46:01 PM PDT 24 Apr 30 03:46:06 PM PDT 24 2179291426 ps
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T1193 /workspace/coverage/default/106.otp_ctrl_parallel_lc_esc.3152032573 Apr 30 03:47:06 PM PDT 24 Apr 30 03:47:11 PM PDT 24 415171594 ps
T1194 /workspace/coverage/default/2.otp_ctrl_macro_errs.102927507 Apr 30 03:40:12 PM PDT 24 Apr 30 03:40:33 PM PDT 24 2292576605 ps
T1195 /workspace/coverage/default/30.otp_ctrl_test_access.3825980508 Apr 30 03:43:48 PM PDT 24 Apr 30 03:44:24 PM PDT 24 4342440069 ps
T1196 /workspace/coverage/default/32.otp_ctrl_parallel_key_req.3163640381 Apr 30 03:43:59 PM PDT 24 Apr 30 03:44:22 PM PDT 24 629621380 ps
T1197 /workspace/coverage/cover_reg_top/1.otp_ctrl_tl_errors.1590561164 Apr 30 03:37:28 PM PDT 24 Apr 30 03:37:32 PM PDT 24 66784885 ps
T1198 /workspace/coverage/cover_reg_top/27.otp_ctrl_intr_test.2710205253 Apr 30 03:39:36 PM PDT 24 Apr 30 03:39:38 PM PDT 24 126178181 ps
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T1199 /workspace/coverage/cover_reg_top/47.otp_ctrl_intr_test.1155893425 Apr 30 03:39:41 PM PDT 24 Apr 30 03:39:43 PM PDT 24 41750476 ps
T276 /workspace/coverage/cover_reg_top/19.otp_ctrl_same_csr_outstanding.1515792213 Apr 30 03:39:32 PM PDT 24 Apr 30 03:39:35 PM PDT 24 70071758 ps
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T1201 /workspace/coverage/cover_reg_top/40.otp_ctrl_intr_test.2230089334 Apr 30 03:39:38 PM PDT 24 Apr 30 03:39:41 PM PDT 24 38888019 ps
T273 /workspace/coverage/cover_reg_top/0.otp_ctrl_csr_mem_rw_with_rand_reset.3587902892 Apr 30 03:37:24 PM PDT 24 Apr 30 03:37:26 PM PDT 24 262758983 ps
T274 /workspace/coverage/cover_reg_top/0.otp_ctrl_csr_rw.684181843 Apr 30 03:37:13 PM PDT 24 Apr 30 03:37:15 PM PDT 24 82563741 ps
T343 /workspace/coverage/cover_reg_top/1.otp_ctrl_same_csr_outstanding.2426929156 Apr 30 03:37:44 PM PDT 24 Apr 30 03:37:47 PM PDT 24 1093590432 ps
T397 /workspace/coverage/cover_reg_top/8.otp_ctrl_csr_mem_rw_with_rand_reset.430371377 Apr 30 03:38:55 PM PDT 24 Apr 30 03:38:59 PM PDT 24 110949685 ps
T1202 /workspace/coverage/cover_reg_top/10.otp_ctrl_tl_errors.1736004914 Apr 30 03:38:42 PM PDT 24 Apr 30 03:38:47 PM PDT 24 998933599 ps
T275 /workspace/coverage/cover_reg_top/0.otp_ctrl_csr_aliasing.1017296287 Apr 30 03:37:17 PM PDT 24 Apr 30 03:37:24 PM PDT 24 1841634233 ps
T344 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_rw.4005576444 Apr 30 03:37:47 PM PDT 24 Apr 30 03:37:50 PM PDT 24 160956812 ps
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T1203 /workspace/coverage/cover_reg_top/2.otp_ctrl_tl_errors.3715788898 Apr 30 03:37:42 PM PDT 24 Apr 30 03:37:48 PM PDT 24 79130361 ps
T398 /workspace/coverage/cover_reg_top/16.otp_ctrl_csr_mem_rw_with_rand_reset.2270461832 Apr 30 03:39:14 PM PDT 24 Apr 30 03:39:18 PM PDT 24 193435247 ps
T1204 /workspace/coverage/cover_reg_top/7.otp_ctrl_intr_test.258007936 Apr 30 03:38:29 PM PDT 24 Apr 30 03:38:31 PM PDT 24 42491358 ps
T1205 /workspace/coverage/cover_reg_top/14.otp_ctrl_tl_errors.2977026139 Apr 30 03:39:02 PM PDT 24 Apr 30 03:39:09 PM PDT 24 347440204 ps
T345 /workspace/coverage/cover_reg_top/18.otp_ctrl_same_csr_outstanding.3796512661 Apr 30 03:39:24 PM PDT 24 Apr 30 03:39:27 PM PDT 24 140542673 ps
T270 /workspace/coverage/cover_reg_top/9.otp_ctrl_tl_intg_err.4079999242 Apr 30 03:38:55 PM PDT 24 Apr 30 03:39:14 PM PDT 24 1449731214 ps
T1206 /workspace/coverage/cover_reg_top/16.otp_ctrl_intr_test.303114976 Apr 30 03:39:14 PM PDT 24 Apr 30 03:39:16 PM PDT 24 37425078 ps
T1207 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_hw_reset.4094111596 Apr 30 03:37:59 PM PDT 24 Apr 30 03:38:01 PM PDT 24 246040089 ps
T346 /workspace/coverage/cover_reg_top/15.otp_ctrl_same_csr_outstanding.4020595652 Apr 30 03:39:08 PM PDT 24 Apr 30 03:39:11 PM PDT 24 967381969 ps
T1208 /workspace/coverage/cover_reg_top/6.otp_ctrl_tl_errors.2209397810 Apr 30 03:38:23 PM PDT 24 Apr 30 03:38:30 PM PDT 24 187093499 ps
T1209 /workspace/coverage/cover_reg_top/10.otp_ctrl_intr_test.3371786309 Apr 30 03:38:42 PM PDT 24 Apr 30 03:38:44 PM PDT 24 128345711 ps
T1210 /workspace/coverage/cover_reg_top/0.otp_ctrl_csr_bit_bash.1395055865 Apr 30 03:37:17 PM PDT 24 Apr 30 03:37:23 PM PDT 24 142309458 ps
T1211 /workspace/coverage/cover_reg_top/3.otp_ctrl_tl_errors.2899085797 Apr 30 03:37:57 PM PDT 24 Apr 30 03:38:01 PM PDT 24 109603653 ps
T305 /workspace/coverage/cover_reg_top/9.otp_ctrl_csr_rw.1627071817 Apr 30 03:38:55 PM PDT 24 Apr 30 03:38:57 PM PDT 24 45919720 ps
T1212 /workspace/coverage/cover_reg_top/45.otp_ctrl_intr_test.1246747790 Apr 30 03:39:43 PM PDT 24 Apr 30 03:39:45 PM PDT 24 84174830 ps
T1213 /workspace/coverage/cover_reg_top/19.otp_ctrl_tl_errors.1982790888 Apr 30 03:39:27 PM PDT 24 Apr 30 03:39:35 PM PDT 24 366095456 ps
T1214 /workspace/coverage/cover_reg_top/31.otp_ctrl_intr_test.1389855238 Apr 30 03:39:37 PM PDT 24 Apr 30 03:39:39 PM PDT 24 69976884 ps
T271 /workspace/coverage/cover_reg_top/17.otp_ctrl_tl_intg_err.4049798869 Apr 30 03:39:25 PM PDT 24 Apr 30 03:39:36 PM PDT 24 1264889506 ps
T1215 /workspace/coverage/cover_reg_top/18.otp_ctrl_tl_errors.3910967692 Apr 30 03:39:18 PM PDT 24 Apr 30 03:39:22 PM PDT 24 90226159 ps
T1216 /workspace/coverage/cover_reg_top/8.otp_ctrl_intr_test.3762663160 Apr 30 03:38:33 PM PDT 24 Apr 30 03:38:35 PM PDT 24 69378278 ps
T1217 /workspace/coverage/cover_reg_top/6.otp_ctrl_csr_mem_rw_with_rand_reset.1857645353 Apr 30 03:38:29 PM PDT 24 Apr 30 03:38:33 PM PDT 24 99928952 ps
T306 /workspace/coverage/cover_reg_top/7.otp_ctrl_csr_rw.3244144263 Apr 30 03:38:29 PM PDT 24 Apr 30 03:38:32 PM PDT 24 673308066 ps
T1218 /workspace/coverage/cover_reg_top/2.otp_ctrl_mem_walk.2421291351 Apr 30 03:37:44 PM PDT 24 Apr 30 03:37:46 PM PDT 24 521311425 ps
T307 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_hw_reset.3021173736 Apr 30 03:37:49 PM PDT 24 Apr 30 03:37:52 PM PDT 24 105319976 ps
T1219 /workspace/coverage/cover_reg_top/1.otp_ctrl_intr_test.3590387063 Apr 30 03:37:33 PM PDT 24 Apr 30 03:37:35 PM PDT 24 54186680 ps
T1220 /workspace/coverage/cover_reg_top/39.otp_ctrl_intr_test.27323053 Apr 30 03:39:36 PM PDT 24 Apr 30 03:39:38 PM PDT 24 40322107 ps
T308 /workspace/coverage/cover_reg_top/1.otp_ctrl_csr_rw.3168442380 Apr 30 03:37:42 PM PDT 24 Apr 30 03:37:44 PM PDT 24 145482022 ps
T272 /workspace/coverage/cover_reg_top/11.otp_ctrl_tl_intg_err.1793953549 Apr 30 03:38:57 PM PDT 24 Apr 30 03:39:09 PM PDT 24 686948006 ps
T278 /workspace/coverage/cover_reg_top/14.otp_ctrl_tl_intg_err.3243920712 Apr 30 03:39:03 PM PDT 24 Apr 30 03:39:43 PM PDT 24 18921858930 ps
T347 /workspace/coverage/cover_reg_top/0.otp_ctrl_same_csr_outstanding.2062931005 Apr 30 03:37:17 PM PDT 24 Apr 30 03:37:20 PM PDT 24 99256831 ps
T374 /workspace/coverage/cover_reg_top/0.otp_ctrl_tl_intg_err.688730322 Apr 30 03:37:03 PM PDT 24 Apr 30 03:37:24 PM PDT 24 2584892479 ps
T1221 /workspace/coverage/cover_reg_top/1.otp_ctrl_mem_partial_access.3774556198 Apr 30 03:37:38 PM PDT 24 Apr 30 03:37:40 PM PDT 24 38984300 ps
T309 /workspace/coverage/cover_reg_top/6.otp_ctrl_csr_rw.3947898572 Apr 30 03:38:21 PM PDT 24 Apr 30 03:38:23 PM PDT 24 150127490 ps
T1222 /workspace/coverage/cover_reg_top/12.otp_ctrl_csr_mem_rw_with_rand_reset.1912314006 Apr 30 03:39:02 PM PDT 24 Apr 30 03:39:06 PM PDT 24 1626072649 ps
T1223 /workspace/coverage/cover_reg_top/5.otp_ctrl_intr_test.1027363322 Apr 30 03:38:19 PM PDT 24 Apr 30 03:38:21 PM PDT 24 556903786 ps
T310 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_aliasing.2774518185 Apr 30 03:37:49 PM PDT 24 Apr 30 03:37:53 PM PDT 24 208751380 ps
T1224 /workspace/coverage/cover_reg_top/0.otp_ctrl_mem_partial_access.4015832490 Apr 30 03:37:07 PM PDT 24 Apr 30 03:37:09 PM PDT 24 69152005 ps
T1225 /workspace/coverage/cover_reg_top/48.otp_ctrl_intr_test.3811902261 Apr 30 03:39:44 PM PDT 24 Apr 30 03:39:46 PM PDT 24 41194278 ps
T1226 /workspace/coverage/cover_reg_top/43.otp_ctrl_intr_test.953097551 Apr 30 03:39:42 PM PDT 24 Apr 30 03:39:44 PM PDT 24 60855015 ps
T348 /workspace/coverage/cover_reg_top/7.otp_ctrl_same_csr_outstanding.2377591815 Apr 30 03:38:28 PM PDT 24 Apr 30 03:38:31 PM PDT 24 206108581 ps
T1227 /workspace/coverage/cover_reg_top/11.otp_ctrl_intr_test.4067706156 Apr 30 03:38:56 PM PDT 24 Apr 30 03:38:58 PM PDT 24 40570753 ps
T1228 /workspace/coverage/cover_reg_top/13.otp_ctrl_same_csr_outstanding.4199808326 Apr 30 03:39:04 PM PDT 24 Apr 30 03:39:07 PM PDT 24 1189553148 ps
T1229 /workspace/coverage/cover_reg_top/17.otp_ctrl_same_csr_outstanding.25822927 Apr 30 03:39:22 PM PDT 24 Apr 30 03:39:25 PM PDT 24 232851389 ps
T1230 /workspace/coverage/cover_reg_top/4.otp_ctrl_csr_mem_rw_with_rand_reset.2067610209 Apr 30 03:38:19 PM PDT 24 Apr 30 03:38:23 PM PDT 24 190822424 ps
T1231 /workspace/coverage/cover_reg_top/12.otp_ctrl_intr_test.2974980384 Apr 30 03:38:57 PM PDT 24 Apr 30 03:38:59 PM PDT 24 69130185 ps
T1232 /workspace/coverage/cover_reg_top/5.otp_ctrl_csr_rw.2678336430 Apr 30 03:38:23 PM PDT 24 Apr 30 03:38:25 PM PDT 24 83408738 ps
T1233 /workspace/coverage/cover_reg_top/9.otp_ctrl_intr_test.1609813961 Apr 30 03:38:56 PM PDT 24 Apr 30 03:38:58 PM PDT 24 561809557 ps
T1234 /workspace/coverage/cover_reg_top/2.otp_ctrl_same_csr_outstanding.2237344946 Apr 30 03:37:54 PM PDT 24 Apr 30 03:37:56 PM PDT 24 262557616 ps
T1235 /workspace/coverage/cover_reg_top/11.otp_ctrl_same_csr_outstanding.1106004940 Apr 30 03:38:57 PM PDT 24 Apr 30 03:39:01 PM PDT 24 202648150 ps
T341 /workspace/coverage/cover_reg_top/1.otp_ctrl_csr_hw_reset.4083357227 Apr 30 03:37:40 PM PDT 24 Apr 30 03:37:43 PM PDT 24 221322492 ps
T311 /workspace/coverage/cover_reg_top/11.otp_ctrl_csr_rw.2517133291 Apr 30 03:38:56 PM PDT 24 Apr 30 03:38:58 PM PDT 24 46128016 ps
T376 /workspace/coverage/cover_reg_top/16.otp_ctrl_tl_intg_err.1120509682 Apr 30 03:39:14 PM PDT 24 Apr 30 03:39:24 PM PDT 24 725590859 ps
T380 /workspace/coverage/cover_reg_top/19.otp_ctrl_tl_intg_err.2095748526 Apr 30 03:39:27 PM PDT 24 Apr 30 03:39:49 PM PDT 24 3461405801 ps
T1236 /workspace/coverage/cover_reg_top/34.otp_ctrl_intr_test.983491340 Apr 30 03:39:37 PM PDT 24 Apr 30 03:39:39 PM PDT 24 53073536 ps
T1237 /workspace/coverage/cover_reg_top/8.otp_ctrl_tl_errors.3663708727 Apr 30 03:38:30 PM PDT 24 Apr 30 03:38:35 PM PDT 24 85597480 ps
T1238 /workspace/coverage/cover_reg_top/29.otp_ctrl_intr_test.3645464040 Apr 30 03:39:38 PM PDT 24 Apr 30 03:39:40 PM PDT 24 41136145 ps
T1239 /workspace/coverage/cover_reg_top/19.otp_ctrl_csr_mem_rw_with_rand_reset.2651758586 Apr 30 03:39:31 PM PDT 24 Apr 30 03:39:33 PM PDT 24 135615422 ps
T1240 /workspace/coverage/cover_reg_top/2.otp_ctrl_intr_test.4208094372 Apr 30 03:37:45 PM PDT 24 Apr 30 03:37:47 PM PDT 24 40729401 ps
T1241 /workspace/coverage/cover_reg_top/16.otp_ctrl_tl_errors.246876409 Apr 30 03:39:07 PM PDT 24 Apr 30 03:39:13 PM PDT 24 151241422 ps
T1242 /workspace/coverage/cover_reg_top/13.otp_ctrl_csr_mem_rw_with_rand_reset.426814070 Apr 30 03:39:00 PM PDT 24 Apr 30 03:39:04 PM PDT 24 100567330 ps
T313 /workspace/coverage/cover_reg_top/12.otp_ctrl_csr_rw.4010836681 Apr 30 03:38:58 PM PDT 24 Apr 30 03:39:00 PM PDT 24 43108260 ps
T1243 /workspace/coverage/cover_reg_top/10.otp_ctrl_csr_rw.3974118548 Apr 30 03:38:55 PM PDT 24 Apr 30 03:38:57 PM PDT 24 46353814 ps
T1244 /workspace/coverage/cover_reg_top/24.otp_ctrl_intr_test.608494886 Apr 30 03:39:40 PM PDT 24 Apr 30 03:39:42 PM PDT 24 144963319 ps
T312 /workspace/coverage/cover_reg_top/16.otp_ctrl_csr_rw.4294881637 Apr 30 03:39:14 PM PDT 24 Apr 30 03:39:16 PM PDT 24 683155145 ps
T1245 /workspace/coverage/cover_reg_top/14.otp_ctrl_intr_test.2375819213 Apr 30 03:39:01 PM PDT 24 Apr 30 03:39:03 PM PDT 24 162027491 ps
T1246 /workspace/coverage/cover_reg_top/19.otp_ctrl_csr_rw.1485287056 Apr 30 03:39:33 PM PDT 24 Apr 30 03:39:35 PM PDT 24 75944666 ps
T371 /workspace/coverage/cover_reg_top/5.otp_ctrl_tl_intg_err.855198442 Apr 30 03:38:18 PM PDT 24 Apr 30 03:38:42 PM PDT 24 4784964969 ps
T1247 /workspace/coverage/cover_reg_top/46.otp_ctrl_intr_test.2391151112 Apr 30 03:39:43 PM PDT 24 Apr 30 03:39:44 PM PDT 24 43357335 ps
T1248 /workspace/coverage/cover_reg_top/25.otp_ctrl_intr_test.3202586132 Apr 30 03:39:35 PM PDT 24 Apr 30 03:39:37 PM PDT 24 148584563 ps
T1249 /workspace/coverage/cover_reg_top/13.otp_ctrl_intr_test.2881528042 Apr 30 03:38:59 PM PDT 24 Apr 30 03:39:02 PM PDT 24 40119452 ps
T1250 /workspace/coverage/cover_reg_top/33.otp_ctrl_intr_test.683372841 Apr 30 03:39:36 PM PDT 24 Apr 30 03:39:38 PM PDT 24 76597267 ps
T1251 /workspace/coverage/cover_reg_top/2.otp_ctrl_tl_intg_err.2569101594 Apr 30 03:37:45 PM PDT 24 Apr 30 03:37:58 PM PDT 24 762219295 ps
T1252 /workspace/coverage/cover_reg_top/4.otp_ctrl_tl_intg_err.1994899399 Apr 30 03:38:09 PM PDT 24 Apr 30 03:38:20 PM PDT 24 1353451738 ps
T1253 /workspace/coverage/cover_reg_top/6.otp_ctrl_intr_test.4271301848 Apr 30 03:38:22 PM PDT 24 Apr 30 03:38:23 PM PDT 24 43749975 ps
T1254 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_mem_rw_with_rand_reset.1180882681 Apr 30 03:37:54 PM PDT 24 Apr 30 03:37:59 PM PDT 24 207537239 ps
T1255 /workspace/coverage/cover_reg_top/4.otp_ctrl_mem_partial_access.4115785116 Apr 30 03:38:08 PM PDT 24 Apr 30 03:38:10 PM PDT 24 563722156 ps
T1256 /workspace/coverage/cover_reg_top/10.otp_ctrl_same_csr_outstanding.587890993 Apr 30 03:38:56 PM PDT 24 Apr 30 03:39:00 PM PDT 24 322974084 ps
T1257 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_bit_bash.734780946 Apr 30 03:37:50 PM PDT 24 Apr 30 03:37:54 PM PDT 24 152545728 ps
T1258 /workspace/coverage/cover_reg_top/3.otp_ctrl_intr_test.3361836957 Apr 30 03:37:59 PM PDT 24 Apr 30 03:38:01 PM PDT 24 535962460 ps
T1259 /workspace/coverage/cover_reg_top/26.otp_ctrl_intr_test.1698081206 Apr 30 03:39:36 PM PDT 24 Apr 30 03:39:39 PM PDT 24 45132675 ps
T372 /workspace/coverage/cover_reg_top/13.otp_ctrl_tl_intg_err.1757398313 Apr 30 03:39:04 PM PDT 24 Apr 30 03:39:24 PM PDT 24 1524836019 ps
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