Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 7363317 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 7355380 1 T1 696 T2 5012 T3 1562



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 8412173 1 T1 3880 T2 17660 T3 3858
values[0x0] 2392663 1 T1 99 T2 590 T3 238
values[0x1] 3913861 1 T1 95 T2 575 T3 222



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 4739159 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 9979538 1 T1 1736 T2 8788 T3 2256



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 50378 1 T1 9 T7 20 T9 19
valid_sources[0x01] 75206 1 T1 9 T7 15 T9 30
valid_sources[0x02] 52206 1 T1 16 T7 18 T9 13
valid_sources[0x03] 62699 1 T1 21 T7 14 T9 16
valid_sources[0x04] 57884 1 T1 17 T7 24 T9 23
valid_sources[0x05] 63886 1 T1 18 T7 14 T9 21
valid_sources[0x06] 50587 1 T1 13 T7 9 T9 18
valid_sources[0x07] 58293 1 T1 15 T7 4 T9 31
valid_sources[0x08] 63128 1 T1 14 T7 23 T9 16
valid_sources[0x09] 56891 1 T1 10 T7 28 T9 27
valid_sources[0x0a] 69342 1 T1 12 T7 27 T9 35
valid_sources[0x0b] 107862 1 T1 22 T7 15 T9 17
valid_sources[0x0c] 61658 1 T1 11 T7 17 T9 22
valid_sources[0x0d] 50686 1 T1 25 T7 20 T9 31
valid_sources[0x0e] 51196 1 T1 12 T7 22 T9 18
valid_sources[0x0f] 49885 1 T1 10 T7 27 T9 19
valid_sources[0x10] 107563 1 T1 4 T7 20 T9 12
valid_sources[0x11] 56768 1 T1 19 T7 17 T9 31
valid_sources[0x12] 51706 1 T1 16 T7 11 T9 27
valid_sources[0x13] 57840 1 T1 13 T7 2 T9 32
valid_sources[0x14] 49633 1 T1 15 T7 37 T9 27
valid_sources[0x15] 50395 1 T1 19 T7 16 T9 19
valid_sources[0x16] 97984 1 T1 17 T7 22 T9 13
valid_sources[0x17] 48143 1 T1 11 T7 10 T9 19
valid_sources[0x18] 50449 1 T1 17 T7 10 T9 43
valid_sources[0x19] 54589 1 T1 15 T7 34 T9 9
valid_sources[0x1a] 54792 1 T1 12 T7 11 T9 29
valid_sources[0x1b] 50382 1 T1 10 T7 16 T9 13
valid_sources[0x1c] 62780 1 T1 10 T7 3 T9 17
valid_sources[0x1d] 50496 1 T1 10 T7 23 T9 13
valid_sources[0x1e] 51317 1 T1 7 T7 26 T9 22
valid_sources[0x1f] 52699 1 T1 22 T7 4 T9 29
valid_sources[0x20] 52278 1 T1 17 T7 18 T9 13
valid_sources[0x21] 54841 1 T1 14 T7 15 T9 29
valid_sources[0x22] 61964 1 T1 12 T7 32 T9 25
valid_sources[0x23] 55798 1 T1 22 T7 15 T9 19
valid_sources[0x24] 52314 1 T1 12 T7 22 T9 14
valid_sources[0x25] 50749 1 T1 15 T7 30 T9 17
valid_sources[0x26] 52634 1 T1 10 T7 3 T9 12
valid_sources[0x27] 49188 1 T1 16 T7 12 T9 30
valid_sources[0x28] 55945 1 T1 15 T7 12 T9 20
valid_sources[0x29] 51101 1 T1 19 T7 4 T9 38
valid_sources[0x2a] 58163 1 T1 30 T7 14 T9 15
valid_sources[0x2b] 57454 1 T1 19 T7 19 T9 18
valid_sources[0x2c] 50977 1 T1 25 T7 14 T9 19
valid_sources[0x2d] 59602 1 T1 27 T7 16 T9 22
valid_sources[0x2e] 49034 1 T1 24 T7 20 T9 24
valid_sources[0x2f] 65292 1 T1 19 T7 32 T9 19
valid_sources[0x30] 51985 1 T1 15 T7 31 T9 21
valid_sources[0x31] 57773 1 T1 3 T7 21 T9 24
valid_sources[0x32] 60918 1 T1 19 T7 6 T9 40
valid_sources[0x33] 66548 1 T1 17 T7 20 T9 23
valid_sources[0x34] 48158 1 T1 12 T7 13 T9 30
valid_sources[0x35] 51098 1 T1 15 T7 19 T9 15
valid_sources[0x36] 125232 1 T1 13 T7 7 T9 26
valid_sources[0x37] 63235 1 T1 9 T7 31 T9 31
valid_sources[0x38] 50022 1 T1 19 T7 16 T9 9
valid_sources[0x39] 48950 1 T1 10 T7 17 T9 18
valid_sources[0x3a] 54026 1 T1 13 T7 12 T9 11
valid_sources[0x3b] 51092 1 T1 21 T7 14 T9 8
valid_sources[0x3c] 170039 1 T1 8 T7 12 T9 13
valid_sources[0x3d] 54599 1 T1 19 T9 35 T10 3
valid_sources[0x3e] 81116 1 T1 17 T7 8 T9 38
valid_sources[0x3f] 48527 1 T1 11 T7 11 T9 27
valid_sources[0x40] 59620 1 T1 19 T7 20 T9 31
valid_sources[0x41] 51172 1 T1 15 T7 18 T9 11
valid_sources[0x42] 49765 1 T1 12 T7 6 T9 16
valid_sources[0x43] 55364 1 T1 16 T7 9 T9 21
valid_sources[0x44] 66416 1 T1 29 T7 3 T9 21
valid_sources[0x45] 56572 1 T1 13 T7 19 T9 19
valid_sources[0x46] 50326 1 T1 18 T7 21 T9 31
valid_sources[0x47] 54455 1 T1 21 T7 6 T9 13
valid_sources[0x48] 49482 1 T1 14 T7 19 T9 11
valid_sources[0x49] 49580 1 T1 20 T7 8 T9 15
valid_sources[0x4a] 49689 1 T1 30 T7 21 T9 11
valid_sources[0x4b] 61293 1 T1 20 T7 17 T9 10
valid_sources[0x4c] 57454 1 T1 22 T7 19 T9 15
valid_sources[0x4d] 60696 1 T1 27 T7 18 T9 14
valid_sources[0x4e] 51151 1 T1 23 T7 27 T9 54
valid_sources[0x4f] 50268 1 T1 14 T7 17 T9 17
valid_sources[0x50] 72007 1 T1 12 T7 37 T9 26
valid_sources[0x51] 55777 1 T1 22 T7 13 T9 32
valid_sources[0x52] 51160 1 T1 19 T7 43 T9 25
valid_sources[0x53] 53028 1 T1 14 T7 25 T9 27
valid_sources[0x54] 60092 1 T1 14 T7 18 T9 37
valid_sources[0x55] 59219 1 T1 15 T7 11 T9 34
valid_sources[0x56] 59740 1 T1 16 T7 4 T9 37
valid_sources[0x57] 54153 1 T1 18 T7 38 T9 19
valid_sources[0x58] 55775 1 T1 22 T7 14 T9 24
valid_sources[0x59] 60939 1 T1 23 T7 5 T9 20
valid_sources[0x5a] 57212 1 T1 13 T7 33 T9 26
valid_sources[0x5b] 58194 1 T1 8 T7 6 T9 28
valid_sources[0x5c] 51994 1 T1 5 T7 20 T9 24
valid_sources[0x5d] 52087 1 T1 19 T7 25 T9 30
valid_sources[0x5e] 86299 1 T1 8 T2 18825 T7 15
valid_sources[0x5f] 86910 1 T1 15 T7 10 T9 37
valid_sources[0x60] 52447 1 T1 12 T7 5 T9 26
valid_sources[0x61] 51121 1 T1 9 T7 12 T9 21
valid_sources[0x62] 57954 1 T1 16 T7 22 T9 17
valid_sources[0x63] 47192 1 T1 9 T7 18 T9 31
valid_sources[0x64] 50979 1 T1 10 T7 28 T9 20
valid_sources[0x65] 61212 1 T1 11 T7 20 T9 22
valid_sources[0x66] 62094 1 T1 13 T7 9 T9 23
valid_sources[0x67] 50562 1 T1 20 T7 18 T9 17
valid_sources[0x68] 57628 1 T1 13 T7 10 T9 15
valid_sources[0x69] 50370 1 T1 21 T7 17 T9 17
valid_sources[0x6a] 57028 1 T1 12 T7 19 T9 32
valid_sources[0x6b] 55504 1 T1 16 T7 2 T9 18
valid_sources[0x6c] 60834 1 T1 18 T7 10 T9 11
valid_sources[0x6d] 55346 1 T1 15 T7 11 T9 21
valid_sources[0x6e] 58967 1 T1 9 T7 56 T9 23
valid_sources[0x6f] 51945 1 T1 13 T7 28 T9 18
valid_sources[0x70] 53847 1 T1 6 T7 9 T9 18
valid_sources[0x71] 50263 1 T1 31 T7 22 T9 20
valid_sources[0x72] 48780 1 T1 14 T7 20 T9 22
valid_sources[0x73] 55488 1 T1 22 T7 31 T9 29
valid_sources[0x74] 52503 1 T1 19 T7 25 T9 12
valid_sources[0x75] 52483 1 T1 8 T7 12 T9 25
valid_sources[0x76] 49023 1 T1 23 T7 21 T9 11
valid_sources[0x77] 50650 1 T1 19 T7 10 T9 26
valid_sources[0x78] 51030 1 T1 16 T7 15 T9 22
valid_sources[0x79] 67292 1 T1 9 T7 27 T9 14
valid_sources[0x7a] 48881 1 T1 17 T7 23 T9 19
valid_sources[0x7b] 50849 1 T1 11 T7 14 T9 30
valid_sources[0x7c] 57122 1 T1 30 T7 5 T9 23
valid_sources[0x7d] 53025 1 T1 11 T7 29 T9 25
valid_sources[0x7e] 51483 1 T1 18 T7 12 T9 28
valid_sources[0x7f] 65441 1 T1 14 T7 29 T9 24
valid_sources[0x80] 51224 1 T1 13 T7 24 T9 37



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 3437608 1 T1 607 T2 4552 T3 1367
values[0x0] all_enables biggest_size 1995310 1 T1 50 T2 270 T3 122
values[0x1] all_enables biggest_size 1922462 1 T1 39 T2 190 T3 73


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 259372 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 9416613 1 T1 40 T2 200 T3 140



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 2401319 1 T1 20 T2 100 T3 70
values[0x0] 3530073 1 T1 9 T2 45 T3 39
values[0x1] 3744593 1 T1 11 T2 55 T3 31



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 93602 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 9582383 1 T1 40 T2 200 T3 140



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 37738 1 T18 2 T95 2 T4 2
valid_sources[0x01] 38985 1 T2 1 T4 3 T5 66
valid_sources[0x02] 38998 1 T19 1 T91 3 T5 67
valid_sources[0x03] 39565 1 T18 1 T4 2 T5 124
valid_sources[0x04] 35007 1 T4 2 T5 85 T6 4
valid_sources[0x05] 35638 1 T2 1 T18 3 T4 4
valid_sources[0x06] 39425 1 T4 2 T91 1 T5 101
valid_sources[0x07] 37919 1 T2 2 T3 9 T8 1
valid_sources[0x08] 38563 1 T2 3 T18 3 T19 2
valid_sources[0x09] 38953 1 T3 10 T18 1 T19 2
valid_sources[0x0a] 36631 1 T3 9 T8 1 T4 1
valid_sources[0x0b] 39268 1 T2 1 T4 1 T91 1
valid_sources[0x0c] 36107 1 T2 5 T8 1 T12 1
valid_sources[0x0d] 38374 1 T7 3 T8 1 T12 2
valid_sources[0x0e] 36780 1 T2 1 T18 1 T19 1
valid_sources[0x0f] 40056 1 T4 2 T5 83 T6 2
valid_sources[0x10] 39720 1 T2 1 T7 1 T8 2
valid_sources[0x11] 38335 1 T18 2 T19 2 T47 1
valid_sources[0x12] 34912 1 T12 3 T18 2 T19 1
valid_sources[0x13] 36172 1 T4 2 T5 88 T166 3
valid_sources[0x14] 37607 1 T19 1 T91 1 T5 63
valid_sources[0x15] 37858 1 T3 11 T12 1 T18 2
valid_sources[0x16] 37286 1 T2 1 T12 1 T18 1
valid_sources[0x17] 36633 1 T19 1 T4 1 T91 1
valid_sources[0x18] 39108 1 T2 1 T19 1 T4 2
valid_sources[0x19] 38051 1 T7 1 T19 1 T4 4
valid_sources[0x1a] 36331 1 T18 2 T5 95 T94 2
valid_sources[0x1b] 38633 1 T7 3 T8 1 T18 2
valid_sources[0x1c] 37443 1 T95 1 T4 3 T5 91
valid_sources[0x1d] 40500 1 T7 3 T4 1 T91 2
valid_sources[0x1e] 37308 1 T18 1 T4 1 T5 113
valid_sources[0x1f] 36529 1 T18 1 T47 2 T4 4
valid_sources[0x20] 38618 1 T2 3 T18 2 T47 1
valid_sources[0x21] 37708 1 T12 4 T4 3 T5 94
valid_sources[0x22] 38683 1 T2 2 T8 1 T47 1
valid_sources[0x23] 38630 1 T2 4 T7 1 T18 2
valid_sources[0x24] 39009 1 T2 1 T18 1 T4 3
valid_sources[0x25] 37555 1 T7 1 T8 1 T18 4
valid_sources[0x26] 37954 1 T7 2 T18 1 T19 6
valid_sources[0x27] 37348 1 T18 1 T4 2 T5 129
valid_sources[0x28] 39046 1 T8 1 T4 8 T5 103
valid_sources[0x29] 38626 1 T2 2 T19 1 T17 2
valid_sources[0x2a] 35730 1 T18 1 T47 3 T4 2
valid_sources[0x2b] 39633 1 T18 1 T4 5 T5 103
valid_sources[0x2c] 38610 1 T2 4 T7 1 T18 1
valid_sources[0x2d] 37720 1 T19 1 T4 1 T5 125
valid_sources[0x2e] 38401 1 T12 2 T18 1 T95 1
valid_sources[0x2f] 39321 1 T4 3 T91 1 T5 98
valid_sources[0x30] 36349 1 T12 1 T4 1 T91 1
valid_sources[0x31] 37977 1 T18 2 T95 1 T5 119
valid_sources[0x32] 38378 1 T2 3 T91 1 T5 93
valid_sources[0x33] 36258 1 T18 1 T4 2 T5 103
valid_sources[0x34] 37004 1 T18 1 T4 2 T5 125
valid_sources[0x35] 37323 1 T2 3 T7 3 T18 1
valid_sources[0x36] 38180 1 T3 5 T7 4 T18 2
valid_sources[0x37] 38990 1 T2 1 T8 1 T4 2
valid_sources[0x38] 35364 1 T8 1 T18 2 T4 2
valid_sources[0x39] 37300 1 T47 2 T4 1 T5 78
valid_sources[0x3a] 36174 1 T2 1 T7 1 T4 4
valid_sources[0x3b] 38516 1 T7 2 T4 3 T5 79
valid_sources[0x3c] 37159 1 T7 2 T4 3 T91 1
valid_sources[0x3d] 38154 1 T18 3 T19 1 T17 2
valid_sources[0x3e] 36242 1 T18 1 T47 1 T4 4
valid_sources[0x3f] 35491 1 T8 1 T18 1 T4 1
valid_sources[0x40] 37185 1 T18 1 T47 3 T4 4
valid_sources[0x41] 38125 1 T7 2 T18 2 T4 5
valid_sources[0x42] 37476 1 T3 6 T19 2 T4 4
valid_sources[0x43] 37904 1 T7 2 T4 2 T91 1
valid_sources[0x44] 38728 1 T7 2 T8 1 T99 4
valid_sources[0x45] 38313 1 T2 2 T7 2 T8 1
valid_sources[0x46] 40632 1 T7 1 T18 1 T47 1
valid_sources[0x47] 38554 1 T7 1 T12 1 T18 2
valid_sources[0x48] 36338 1 T4 2 T5 85 T93 2
valid_sources[0x49] 39704 1 T2 3 T7 3 T8 1
valid_sources[0x4a] 37380 1 T2 1 T7 1 T18 1
valid_sources[0x4b] 36967 1 T2 1 T18 1 T47 1
valid_sources[0x4c] 38068 1 T8 2 T18 1 T4 7
valid_sources[0x4d] 37755 1 T2 1 T7 2 T19 1
valid_sources[0x4e] 38184 1 T2 1 T7 3 T47 1
valid_sources[0x4f] 36710 1 T3 1 T7 1 T18 1
valid_sources[0x50] 37463 1 T7 5 T47 2 T5 82
valid_sources[0x51] 37495 1 T2 2 T7 1 T4 3
valid_sources[0x52] 38898 1 T5 119 T93 1 T94 1
valid_sources[0x53] 38634 1 T3 25 T8 1 T19 2
valid_sources[0x54] 37322 1 T2 1 T7 1 T4 3
valid_sources[0x55] 38688 1 T47 1 T4 2 T5 108
valid_sources[0x56] 38759 1 T2 3 T11 40 T18 1
valid_sources[0x57] 35504 1 T18 1 T4 2 T91 2
valid_sources[0x58] 37393 1 T2 2 T4 4 T91 2
valid_sources[0x59] 36786 1 T8 3 T5 61 T93 1
valid_sources[0x5a] 38542 1 T18 2 T19 1 T47 1
valid_sources[0x5b] 37195 1 T2 6 T4 3 T5 84
valid_sources[0x5c] 39152 1 T2 1 T7 2 T8 1
valid_sources[0x5d] 37656 1 T7 2 T12 2 T18 2
valid_sources[0x5e] 38015 1 T2 2 T12 1 T4 2
valid_sources[0x5f] 35889 1 T4 4 T91 2 T5 102
valid_sources[0x60] 35906 1 T8 1 T47 1 T4 1
valid_sources[0x61] 38617 1 T2 1 T19 1 T4 2
valid_sources[0x62] 37054 1 T2 1 T18 1 T4 2
valid_sources[0x63] 36457 1 T7 4 T19 1 T17 4
valid_sources[0x64] 39823 1 T2 1 T8 3 T4 2
valid_sources[0x65] 34776 1 T2 2 T4 5 T91 1
valid_sources[0x66] 37992 1 T18 3 T47 1 T4 3
valid_sources[0x67] 37534 1 T2 1 T8 1 T4 1
valid_sources[0x68] 38401 1 T7 1 T18 1 T47 1
valid_sources[0x69] 36539 1 T2 3 T19 1 T99 6
valid_sources[0x6a] 37716 1 T18 1 T4 2 T5 97
valid_sources[0x6b] 39498 1 T8 2 T18 3 T19 1
valid_sources[0x6c] 37745 1 T2 2 T7 4 T18 2
valid_sources[0x6d] 36972 1 T18 2 T19 1 T47 1
valid_sources[0x6e] 37521 1 T8 2 T18 1 T4 3
valid_sources[0x6f] 36977 1 T2 2 T18 2 T99 1
valid_sources[0x70] 34789 1 T7 1 T18 1 T99 2
valid_sources[0x71] 38345 1 T12 1 T18 1 T5 113
valid_sources[0x72] 37307 1 T2 3 T7 1 T8 1
valid_sources[0x73] 38393 1 T18 1 T4 4 T91 1
valid_sources[0x74] 37604 1 T2 4 T7 2 T8 1
valid_sources[0x75] 39034 1 T2 1 T18 2 T91 2
valid_sources[0x76] 37602 1 T7 1 T4 5 T5 124
valid_sources[0x77] 37233 1 T2 1 T4 2 T91 1
valid_sources[0x78] 36358 1 T8 1 T18 1 T19 1
valid_sources[0x79] 37681 1 T18 1 T99 2 T91 2
valid_sources[0x7a] 39034 1 T3 1 T8 2 T18 2
valid_sources[0x7b] 37931 1 T2 1 T18 1 T47 2
valid_sources[0x7c] 37516 1 T2 1 T18 1 T17 2
valid_sources[0x7d] 39041 1 T7 3 T8 1 T12 2
valid_sources[0x7e] 36226 1 T1 40 T3 36 T7 1
valid_sources[0x7f] 36564 1 T2 5 T7 2 T18 1
valid_sources[0x80] 36122 1 T7 1 T8 1 T18 1



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 2388393 1 T1 20 T2 100 T3 70
values[0x0] all_enables biggest_size 3512020 1 T1 9 T2 45 T3 39
values[0x1] all_enables biggest_size 3516200 1 T1 11 T2 55 T3 31

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