Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	7631157	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

7808487

1

T1

5702

T2

2364

T3

6766

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	8688487	1			T1	11596		T2	5067		T3	11959
values[0x0]	2560458	1			T1	722		T2	324		T3	1118
values[0x1]	4190699	1			T1	665		T2	323		T3	1168

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	4891800	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

10547844

1

T1

7268

T2

3145

T3

8374

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	51363	1			T1	52		T2	29		T5	15
valid_sources[0x01]	63858	1			T1	48		T2	4		T9	21
valid_sources[0x02]	55170	1			T1	30		T2	30		T5	3
valid_sources[0x03]	63172	1			T1	43		T2	16		T5	15
valid_sources[0x04]	55532	1			T1	30		T2	19		T9	20
valid_sources[0x05]	59505	1			T1	52		T2	1		T5	3
valid_sources[0x06]	58749	1			T1	60		T2	28		T9	8
valid_sources[0x07]	57002	1			T1	55		T2	30		T5	3
valid_sources[0x08]	54269	1			T1	40		T2	17		T9	6
valid_sources[0x09]	53786	1			T1	42		T2	3		T5	10
valid_sources[0x0a]	59632	1			T1	67		T2	30		T5	9
valid_sources[0x0b]	51754	1			T1	44		T2	16		T5	6
valid_sources[0x0c]	54473	1			T1	26		T2	105		T5	4
valid_sources[0x0d]	54685	1			T1	46		T2	24		T5	10
valid_sources[0x0e]	51926	1			T1	54		T2	6		T9	18
valid_sources[0x0f]	68583	1			T1	46		T2	2		T9	1
valid_sources[0x10]	53032	1			T1	36		T2	16		T9	4
valid_sources[0x11]	52905	1			T1	38		T2	16		T9	2
valid_sources[0x12]	59265	1			T1	23		T2	21		T5	4
valid_sources[0x13]	53420	1			T1	75		T2	20		T9	13
valid_sources[0x14]	72683	1			T1	97		T2	9		T5	20
valid_sources[0x15]	53278	1			T1	78		T5	2		T10	18
valid_sources[0x16]	53075	1			T1	44		T2	9		T9	53
valid_sources[0x17]	54056	1			T1	44		T2	5		T9	2
valid_sources[0x18]	52415	1			T1	53		T2	22		T9	20
valid_sources[0x19]	53629	1			T1	80		T2	21		T5	7
valid_sources[0x1a]	55894	1			T1	36		T2	9		T5	23
valid_sources[0x1b]	68539	1			T1	47		T2	52		T9	50
valid_sources[0x1c]	60540	1			T1	33		T2	10		T9	4
valid_sources[0x1d]	53689	1			T1	28		T2	73		T5	21
valid_sources[0x1e]	53790	1			T1	54		T2	21		T5	1
valid_sources[0x1f]	55845	1			T1	38		T2	45		T5	1
valid_sources[0x20]	53812	1			T1	45		T2	21		T5	5
valid_sources[0x21]	59039	1			T1	36		T2	36		T5	6
valid_sources[0x22]	54625	1			T1	60		T2	8		T5	3
valid_sources[0x23]	55050	1			T1	50		T2	13		T5	7
valid_sources[0x24]	64169	1			T1	64		T2	33		T9	28
valid_sources[0x25]	53678	1			T1	32		T2	14		T5	14
valid_sources[0x26]	52876	1			T1	32		T2	1		T5	6
valid_sources[0x27]	60006	1			T1	59		T2	41		T9	46
valid_sources[0x28]	56115	1			T1	47		T2	31		T5	10
valid_sources[0x29]	55330	1			T1	38		T2	2		T5	3
valid_sources[0x2a]	62432	1			T1	30		T2	15		T9	10
valid_sources[0x2b]	54242	1			T1	44		T2	4		T5	13
valid_sources[0x2c]	56688	1			T1	79		T2	12		T5	6
valid_sources[0x2d]	52987	1			T1	36		T2	39		T9	5
valid_sources[0x2e]	54830	1			T1	41		T2	18		T9	7
valid_sources[0x2f]	64962	1			T1	53		T9	23		T5	6
valid_sources[0x30]	73075	1			T1	52		T2	26		T3	14245
valid_sources[0x31]	53588	1			T1	55		T2	22		T5	3
valid_sources[0x32]	53281	1			T1	41		T2	4		T5	8
valid_sources[0x33]	54407	1			T1	59		T2	19		T5	16
valid_sources[0x34]	71230	1			T1	51		T2	43		T5	16
valid_sources[0x35]	64002	1			T1	66		T2	9		T5	1
valid_sources[0x36]	58884	1			T1	71		T2	22		T9	23
valid_sources[0x37]	52663	1			T1	67		T2	18		T5	2
valid_sources[0x38]	51991	1			T1	65		T2	12		T9	1
valid_sources[0x39]	56502	1			T1	33		T2	21		T5	13
valid_sources[0x3a]	58908	1			T1	48		T2	13		T5	20
valid_sources[0x3b]	58608	1			T1	37		T2	41		T5	13
valid_sources[0x3c]	61205	1			T1	57		T2	54		T5	9
valid_sources[0x3d]	53793	1			T1	44		T5	9		T10	11
valid_sources[0x3e]	69559	1			T1	39		T2	14		T4	1013
valid_sources[0x3f]	53757	1			T1	93		T2	4		T9	13
valid_sources[0x40]	54287	1			T1	69		T2	24		T9	20
valid_sources[0x41]	64475	1			T1	28		T2	45		T9	44
valid_sources[0x42]	53909	1			T1	57		T2	17		T5	2
valid_sources[0x43]	53506	1			T1	69		T2	57		T5	11
valid_sources[0x44]	54498	1			T1	40		T2	20		T5	5
valid_sources[0x45]	54512	1			T1	42		T2	26		T9	22
valid_sources[0x46]	59329	1			T1	64		T2	8		T9	20
valid_sources[0x47]	52619	1			T1	61		T2	6		T9	3
valid_sources[0x48]	66651	1			T1	30		T2	48		T5	2
valid_sources[0x49]	60870	1			T1	40		T2	16		T5	6
valid_sources[0x4a]	62624	1			T1	78		T2	31		T5	12
valid_sources[0x4b]	60839	1			T1	95		T2	2		T9	16
valid_sources[0x4c]	54554	1			T1	47		T5	13		T10	17
valid_sources[0x4d]	61296	1			T1	35		T2	26		T9	33
valid_sources[0x4e]	53083	1			T1	38		T2	17		T5	7
valid_sources[0x4f]	62901	1			T1	29		T2	30		T9	15
valid_sources[0x50]	53665	1			T1	65		T2	7		T9	48
valid_sources[0x51]	55337	1			T1	40		T2	38		T5	1
valid_sources[0x52]	55819	1			T1	47		T2	45		T9	15
valid_sources[0x53]	59435	1			T1	79		T2	29		T9	1
valid_sources[0x54]	53469	1			T1	64		T2	9		T5	1
valid_sources[0x55]	59382	1			T1	31		T2	57		T5	7
valid_sources[0x56]	59101	1			T1	57		T2	10		T9	28
valid_sources[0x57]	63307	1			T1	47		T2	6		T5	2
valid_sources[0x58]	63798	1			T1	72		T2	18		T5	3
valid_sources[0x59]	53293	1			T1	42		T2	55		T9	20
valid_sources[0x5a]	54017	1			T1	41		T2	7		T9	5
valid_sources[0x5b]	55233	1			T1	54		T2	26		T9	1
valid_sources[0x5c]	57068	1			T1	52		T2	38		T9	16
valid_sources[0x5d]	54883	1			T1	76		T2	5		T5	9
valid_sources[0x5e]	58360	1			T1	29		T2	14		T9	15
valid_sources[0x5f]	64026	1			T1	47		T2	1		T5	7
valid_sources[0x60]	53864	1			T1	39		T2	6		T5	7
valid_sources[0x61]	78733	1			T1	40		T2	40		T9	8
valid_sources[0x62]	53982	1			T1	80		T2	39		T9	2
valid_sources[0x63]	66486	1			T1	47		T9	41		T5	15
valid_sources[0x64]	72245	1			T1	63		T2	19		T5	3
valid_sources[0x65]	53134	1			T1	76		T2	29		T5	3
valid_sources[0x66]	52844	1			T1	53		T2	16		T5	7
valid_sources[0x67]	56542	1			T1	43		T2	18		T5	3
valid_sources[0x68]	60248	1			T1	22		T2	59		T5	6
valid_sources[0x69]	55240	1			T1	41		T2	45		T5	6
valid_sources[0x6a]	58819	1			T1	56		T2	15		T5	11
valid_sources[0x6b]	54564	1			T1	39		T2	30		T5	5
valid_sources[0x6c]	53372	1			T1	84		T2	1		T9	50
valid_sources[0x6d]	57330	1			T1	52		T2	20		T9	17
valid_sources[0x6e]	53326	1			T1	28		T2	6		T5	11
valid_sources[0x6f]	58792	1			T1	53		T2	23		T5	5
valid_sources[0x70]	54803	1			T1	22		T2	42		T5	4
valid_sources[0x71]	53966	1			T1	35		T5	21		T10	18
valid_sources[0x72]	56828	1			T1	25		T2	52		T9	56
valid_sources[0x73]	64397	1			T1	57		T2	59		T5	11
valid_sources[0x74]	54589	1			T1	34		T2	27		T5	9
valid_sources[0x75]	80003	1			T1	94		T2	2		T5	10
valid_sources[0x76]	52359	1			T1	75		T2	86		T9	1
valid_sources[0x77]	58407	1			T1	51		T2	25		T9	28
valid_sources[0x78]	56093	1			T1	39		T2	9		T9	24
valid_sources[0x79]	52887	1			T1	70		T2	48		T9	27
valid_sources[0x7a]	52507	1			T1	31		T5	18		T10	20
valid_sources[0x7b]	53848	1			T1	75		T5	8		T10	9
valid_sources[0x7c]	53916	1			T1	23		T2	3		T9	9
valid_sources[0x7d]	56289	1			T1	42		T9	16		T5	4
valid_sources[0x7e]	54928	1			T1	54		T2	5		T5	3
valid_sources[0x7f]	53127	1			T1	48		T2	30		T5	2
valid_sources[0x80]	54253	1			T1	47		T2	32		T9	13

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

3606805

1

T1

5167

T2

2095

T3

5682

values[0x0]

all_enables

biggest_size

2140214

1

T1

315

T2

167

T3

616

values[0x1]

all_enables

biggest_size

2061468

1

T1

220

T2

102

T3

468

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	281963	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

10133525

1

T1

200

T2

140

T3

20

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	2587240	1			T1	100		T2	70		T3	10
values[0x0]	3800161	1			T1	50		T2	35		T3	3
values[0x1]	4028087	1			T1	50		T2	35		T3	7

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	101724	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

10313764

1

T1

200

T2

140

T3

20

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	40722	1			T36	1		T8	442		T15	1
valid_sources[0x01]	39508	1			T2	2		T115	1		T36	1
valid_sources[0x02]	42078	1			T1	1		T115	1		T117	1
valid_sources[0x03]	41844	1			T8	438		T107	3		T13	1280
valid_sources[0x04]	40174	1			T117	1		T8	454		T177	6
valid_sources[0x05]	40524	1			T8	479		T107	2		T108	3
valid_sources[0x06]	42659	1			T3	2		T113	1		T36	1
valid_sources[0x07]	41081	1			T1	2		T3	1		T120	7
valid_sources[0x08]	41092	1			T2	1		T12	1		T117	1
valid_sources[0x09]	41146	1			T1	3		T2	1		T7	1
valid_sources[0x0a]	40887	1			T120	4		T8	457		T107	1
valid_sources[0x0b]	40223	1			T8	443		T108	1		T13	1312
valid_sources[0x0c]	40707	1			T8	506		T13	1346		T222	4
valid_sources[0x0d]	41276	1			T2	1		T35	4		T36	1
valid_sources[0x0e]	41359	1			T2	1		T9	2		T7	1
valid_sources[0x0f]	38517	1			T2	2		T12	4		T117	1
valid_sources[0x10]	41260	1			T113	1		T115	2		T35	1
valid_sources[0x11]	41727	1			T35	6		T7	1		T8	490
valid_sources[0x12]	40963	1			T2	1		T7	1		T8	413
valid_sources[0x13]	40605	1			T9	2		T117	3		T36	1
valid_sources[0x14]	41178	1			T7	1		T8	464		T283	1
valid_sources[0x15]	40535	1			T1	10		T115	1		T8	424
valid_sources[0x16]	40904	1			T11	3		T120	1		T36	1
valid_sources[0x17]	39769	1			T1	4		T115	2		T36	1
valid_sources[0x18]	39453	1			T2	2		T11	9		T114	2
valid_sources[0x19]	41456	1			T12	7		T8	514		T15	2
valid_sources[0x1a]	40128	1			T8	431		T107	2		T15	1
valid_sources[0x1b]	39478	1			T36	1		T8	443		T107	1
valid_sources[0x1c]	39582	1			T1	2		T2	1		T35	1
valid_sources[0x1d]	39287	1			T3	2		T115	3		T117	3
valid_sources[0x1e]	40082	1			T2	1		T3	1		T117	1
valid_sources[0x1f]	39335	1			T1	3		T2	2		T12	3
valid_sources[0x20]	40453	1			T3	2		T12	1		T35	2
valid_sources[0x21]	41241	1			T2	1		T7	1		T8	496
valid_sources[0x22]	40849	1			T35	1		T117	1		T8	471
valid_sources[0x23]	41347	1			T2	1		T12	5		T115	4
valid_sources[0x24]	41818	1			T35	2		T8	468		T15	1
valid_sources[0x25]	40818	1			T1	3		T115	1		T36	1
valid_sources[0x26]	41497	1			T36	3		T8	458		T107	1
valid_sources[0x27]	39998	1			T2	1		T3	1		T35	3
valid_sources[0x28]	41587	1			T2	2		T36	2		T8	469
valid_sources[0x29]	38851	1			T120	3		T117	1		T36	1
valid_sources[0x2a]	39984	1			T2	1		T10	3		T12	1
valid_sources[0x2b]	39780	1			T2	1		T8	536		T283	1
valid_sources[0x2c]	39741	1			T2	2		T6	1		T115	1
valid_sources[0x2d]	40689	1			T2	2		T3	1		T117	1
valid_sources[0x2e]	40028	1			T12	1		T115	2		T35	1
valid_sources[0x2f]	40887	1			T12	5		T114	2		T35	2
valid_sources[0x30]	39920	1			T35	1		T36	2		T8	445
valid_sources[0x31]	40861	1			T11	15		T120	7		T8	452
valid_sources[0x32]	39834	1			T120	13		T117	1		T8	459
valid_sources[0x33]	38656	1			T2	1		T114	1		T115	2
valid_sources[0x34]	40072	1			T9	3		T35	1		T117	1
valid_sources[0x35]	40045	1			T12	1		T35	1		T36	1
valid_sources[0x36]	40732	1			T2	2		T8	433		T107	13
valid_sources[0x37]	40383	1			T2	1		T8	425		T108	2
valid_sources[0x38]	40266	1			T1	7		T115	1		T8	450
valid_sources[0x39]	40372	1			T1	1		T2	1		T10	7
valid_sources[0x3a]	41609	1			T2	3		T10	1		T115	2
valid_sources[0x3b]	42062	1			T12	1		T36	1		T8	488
valid_sources[0x3c]	41059	1			T2	1		T8	540		T283	1
valid_sources[0x3d]	39881	1			T2	1		T6	2		T117	2
valid_sources[0x3e]	40865	1			T1	1		T2	2		T9	3
valid_sources[0x3f]	39287	1			T2	2		T36	3		T8	413
valid_sources[0x40]	40077	1			T36	3		T8	492		T108	1
valid_sources[0x41]	42102	1			T12	2		T113	1		T8	477
valid_sources[0x42]	40433	1			T1	4		T3	1		T9	8
valid_sources[0x43]	40607	1			T2	2		T8	533		T177	2
valid_sources[0x44]	41648	1			T12	1		T36	2		T8	414
valid_sources[0x45]	39713	1			T35	2		T36	3		T8	469
valid_sources[0x46]	40158	1			T1	6		T114	1		T8	512
valid_sources[0x47]	39807	1			T1	3		T2	2		T8	443
valid_sources[0x48]	43109	1			T1	7		T8	417		T68	1
valid_sources[0x49]	41480	1			T9	3		T12	1		T115	1
valid_sources[0x4a]	41216	1			T12	3		T113	1		T120	9
valid_sources[0x4b]	41249	1			T2	1		T11	1		T8	438
valid_sources[0x4c]	40700	1			T2	1		T11	24		T12	1
valid_sources[0x4d]	41623	1			T2	1		T36	1		T8	448
valid_sources[0x4e]	42108	1			T1	5		T2	2		T36	2
valid_sources[0x4f]	39781	1			T2	1		T8	413		T108	1
valid_sources[0x50]	40421	1			T2	1		T12	1		T36	2
valid_sources[0x51]	38390	1			T2	1		T115	1		T35	2
valid_sources[0x52]	42241	1			T1	6		T12	2		T36	2
valid_sources[0x53]	40542	1			T2	1		T35	3		T8	491
valid_sources[0x54]	40400	1			T2	1		T35	2		T117	2
valid_sources[0x55]	38966	1			T11	4		T113	1		T8	482
valid_sources[0x56]	40366	1			T1	1		T12	1		T115	1
valid_sources[0x57]	40853	1			T7	1		T36	2		T8	483
valid_sources[0x58]	40019	1			T2	1		T35	1		T8	482
valid_sources[0x59]	40001	1			T36	2		T8	511		T109	6
valid_sources[0x5a]	39593	1			T2	1		T36	3		T8	439
valid_sources[0x5b]	40521	1			T1	1		T2	1		T8	442
valid_sources[0x5c]	42123	1			T2	4		T9	1		T36	1
valid_sources[0x5d]	39632	1			T36	2		T8	493		T108	1
valid_sources[0x5e]	41772	1			T1	12		T113	1		T8	487
valid_sources[0x5f]	40462	1			T2	1		T12	4		T117	1
valid_sources[0x60]	41406	1			T2	1		T115	3		T36	2
valid_sources[0x61]	39664	1			T2	1		T12	5		T8	444
valid_sources[0x62]	42470	1			T117	1		T8	456		T177	4
valid_sources[0x63]	40407	1			T11	5		T12	1		T8	515
valid_sources[0x64]	40554	1			T8	510		T15	4		T177	2
valid_sources[0x65]	40290	1			T117	1		T8	536		T109	5
valid_sources[0x66]	39511	1			T1	1		T2	1		T11	5
valid_sources[0x67]	41581	1			T115	2		T120	34		T8	459
valid_sources[0x68]	38746	1			T3	3		T12	2		T8	377
valid_sources[0x69]	39848	1			T1	2		T2	3		T36	1
valid_sources[0x6a]	41529	1			T1	1		T8	420		T283	1
valid_sources[0x6b]	40657	1			T2	2		T120	11		T36	1
valid_sources[0x6c]	40514	1			T11	7		T117	1		T8	492
valid_sources[0x6d]	41398	1			T11	7		T117	1		T7	1
valid_sources[0x6e]	39743	1			T2	1		T36	1		T8	477
valid_sources[0x6f]	41928	1			T12	2		T36	1		T8	466
valid_sources[0x70]	40024	1			T1	1		T10	8		T8	457
valid_sources[0x71]	40655	1			T2	1		T115	2		T120	1
valid_sources[0x72]	40394	1			T2	1		T115	2		T36	2
valid_sources[0x73]	38090	1			T2	1		T12	2		T114	1
valid_sources[0x74]	40180	1			T2	1		T113	1		T115	3
valid_sources[0x75]	41383	1			T120	5		T36	1		T8	481
valid_sources[0x76]	40338	1			T36	1		T8	422		T172	1
valid_sources[0x77]	39954	1			T8	466		T68	1		T283	2
valid_sources[0x78]	41204	1			T1	3		T2	1		T35	1
valid_sources[0x79]	40030	1			T1	2		T8	449		T15	8
valid_sources[0x7a]	40358	1			T1	1		T3	1		T12	2
valid_sources[0x7b]	42428	1			T11	12		T12	5		T117	2
valid_sources[0x7c]	39236	1			T1	2		T2	1		T8	516
valid_sources[0x7d]	40535	1			T115	3		T120	5		T36	1
valid_sources[0x7e]	39455	1			T1	3		T8	482		T13	1395
valid_sources[0x7f]	40042	1			T1	1		T2	1		T12	3
valid_sources[0x80]	39983	1			T2	2		T12	2		T8	470

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

2572281

1

T1

100

T2

70

T3

10

values[0x0]

all_enables

biggest_size

3781011

1

T1

50

T2

35

T3

3

values[0x1]

all_enables

biggest_size

3780233

1

T1

50

T2

35

T3

7