Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	7313446	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

6905954

1

T1

162

T2

251

T3

60838

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	8516601	1			T1	307		T2	461		T3	39135
values[0x0]	2184463	1			T1	111		T2	156		T3	22836
values[0x1]	3518336	1			T1	87		T2	146		T3	40018

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	4799298	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

9420102

1

T1

239

T2

380

T3

79586

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	57524	1			T2	6		T3	355		T8	4
valid_sources[0x01]	55068	1			T2	9		T3	429		T8	1
valid_sources[0x02]	52134	1			T2	1		T3	451		T8	2
valid_sources[0x03]	56943	1			T2	4		T3	374		T8	4
valid_sources[0x04]	48979	1			T3	366		T8	5		T4	30
valid_sources[0x05]	115130	1			T2	3		T3	481		T4	38
valid_sources[0x06]	51641	1			T2	3		T3	381		T8	1
valid_sources[0x07]	50546	1			T2	3		T3	355		T4	35
valid_sources[0x08]	48012	1			T2	4		T3	376		T8	5
valid_sources[0x09]	57640	1			T2	2		T3	415		T8	2
valid_sources[0x0a]	52163	1			T2	7		T3	341		T8	2
valid_sources[0x0b]	81467	1			T2	1		T3	450		T8	3
valid_sources[0x0c]	48355	1			T2	6		T3	433		T8	5
valid_sources[0x0d]	51538	1			T2	10		T3	392		T8	1
valid_sources[0x0e]	52736	1			T2	2		T3	385		T8	2
valid_sources[0x0f]	47785	1			T2	3		T3	449		T8	1
valid_sources[0x10]	48649	1			T3	477		T8	6		T4	26
valid_sources[0x11]	53807	1			T2	1		T3	462		T8	4
valid_sources[0x12]	49266	1			T2	2		T3	373		T8	5
valid_sources[0x13]	58305	1			T3	329		T8	6		T4	19
valid_sources[0x14]	62529	1			T2	1		T3	329		T8	1
valid_sources[0x15]	49277	1			T2	3		T3	335		T8	3
valid_sources[0x16]	46467	1			T2	4		T3	390		T8	1
valid_sources[0x17]	48317	1			T2	5		T3	439		T8	4
valid_sources[0x18]	49610	1			T2	2		T3	404		T8	4
valid_sources[0x19]	49862	1			T2	1		T3	449		T8	4
valid_sources[0x1a]	47618	1			T2	2		T3	487		T8	7
valid_sources[0x1b]	50485	1			T3	344		T8	2		T4	31
valid_sources[0x1c]	49005	1			T2	4		T3	433		T8	3
valid_sources[0x1d]	54165	1			T2	3		T3	399		T8	2
valid_sources[0x1e]	68151	1			T2	3		T3	377		T8	2
valid_sources[0x1f]	52553	1			T2	4		T3	438		T8	4
valid_sources[0x20]	51465	1			T3	548		T8	4		T4	35
valid_sources[0x21]	51364	1			T2	4		T3	393		T8	3
valid_sources[0x22]	49980	1			T3	392		T8	1		T4	37
valid_sources[0x23]	52318	1			T2	4		T3	426		T8	1
valid_sources[0x24]	57857	1			T2	4		T3	365		T8	4
valid_sources[0x25]	67989	1			T2	2		T3	400		T8	4
valid_sources[0x26]	52603	1			T2	6		T3	406		T8	1
valid_sources[0x27]	48412	1			T2	1		T3	351		T8	5
valid_sources[0x28]	47660	1			T2	7		T3	352		T8	3
valid_sources[0x29]	65553	1			T2	4		T3	374		T8	1
valid_sources[0x2a]	58156	1			T2	5		T3	465		T8	1
valid_sources[0x2b]	65705	1			T2	2		T3	423		T4	33
valid_sources[0x2c]	49759	1			T2	3		T3	405		T8	6
valid_sources[0x2d]	52465	1			T2	1		T3	384		T8	2
valid_sources[0x2e]	54922	1			T2	5		T3	398		T8	2
valid_sources[0x2f]	51733	1			T2	1		T3	424		T8	2
valid_sources[0x30]	49708	1			T2	5		T3	332		T8	2
valid_sources[0x31]	61523	1			T2	3		T3	345		T8	3
valid_sources[0x32]	48659	1			T2	1		T3	373		T8	3
valid_sources[0x33]	47551	1			T2	6		T3	394		T8	2
valid_sources[0x34]	47998	1			T2	14		T3	339		T8	6
valid_sources[0x35]	47462	1			T2	1		T3	430		T8	1
valid_sources[0x36]	49713	1			T2	2		T3	356		T8	7
valid_sources[0x37]	52797	1			T2	9		T3	344		T8	4
valid_sources[0x38]	66394	1			T2	7		T3	463		T8	4
valid_sources[0x39]	63266	1			T2	5		T3	441		T8	7
valid_sources[0x3a]	49235	1			T2	12		T3	325		T8	1
valid_sources[0x3b]	67729	1			T2	4		T3	389		T8	3
valid_sources[0x3c]	135542	1			T2	15		T3	411		T8	5
valid_sources[0x3d]	50642	1			T2	1		T3	380		T8	4
valid_sources[0x3e]	47167	1			T3	306		T8	2		T4	36
valid_sources[0x3f]	51905	1			T3	452		T8	7		T4	32
valid_sources[0x40]	50191	1			T2	1		T3	356		T8	2
valid_sources[0x41]	50241	1			T2	1		T3	409		T8	1
valid_sources[0x42]	60991	1			T2	4		T3	459		T8	3
valid_sources[0x43]	49693	1			T2	6		T3	424		T8	2
valid_sources[0x44]	49942	1			T2	1		T3	420		T8	2
valid_sources[0x45]	57630	1			T2	3		T3	380		T8	1
valid_sources[0x46]	51724	1			T2	4		T3	319		T8	3
valid_sources[0x47]	57411	1			T2	4		T3	444		T8	4
valid_sources[0x48]	52891	1			T2	1		T3	442		T8	5
valid_sources[0x49]	49409	1			T2	2		T3	311		T8	4
valid_sources[0x4a]	50222	1			T2	2		T3	415		T8	3
valid_sources[0x4b]	47772	1			T2	8		T3	405		T8	3
valid_sources[0x4c]	47480	1			T2	7		T3	456		T8	6
valid_sources[0x4d]	49736	1			T2	2		T3	450		T8	3
valid_sources[0x4e]	47659	1			T2	2		T3	458		T8	3
valid_sources[0x4f]	48265	1			T2	2		T3	435		T8	1
valid_sources[0x50]	47730	1			T2	1		T3	418		T8	4
valid_sources[0x51]	48710	1			T2	4		T3	437		T8	1
valid_sources[0x52]	62132	1			T2	8		T3	352		T8	3
valid_sources[0x53]	51059	1			T2	3		T3	514		T8	5
valid_sources[0x54]	51439	1			T2	1		T3	390		T8	3
valid_sources[0x55]	47808	1			T2	3		T3	377		T8	4
valid_sources[0x56]	46690	1			T2	3		T3	421		T8	1
valid_sources[0x57]	50304	1			T2	7		T3	397		T8	3
valid_sources[0x58]	56074	1			T2	2		T3	429		T8	3
valid_sources[0x59]	55870	1			T2	1		T3	391		T8	4
valid_sources[0x5a]	55916	1			T2	5		T3	431		T8	3
valid_sources[0x5b]	60795	1			T2	2		T3	465		T4	36
valid_sources[0x5c]	54641	1			T3	378		T8	5		T4	31
valid_sources[0x5d]	48918	1			T2	2		T3	410		T8	3
valid_sources[0x5e]	74077	1			T2	4		T3	364		T8	1
valid_sources[0x5f]	49468	1			T2	1		T3	331		T8	6
valid_sources[0x60]	48076	1			T2	3		T3	468		T4	37
valid_sources[0x61]	59103	1			T1	505		T2	3		T3	517
valid_sources[0x62]	54215	1			T2	2		T3	383		T8	5
valid_sources[0x63]	49456	1			T2	1		T3	391		T8	5
valid_sources[0x64]	51724	1			T2	2		T3	449		T8	4
valid_sources[0x65]	51540	1			T2	1		T3	409		T8	2
valid_sources[0x66]	48636	1			T2	3		T3	407		T4	26
valid_sources[0x67]	48918	1			T2	1		T3	330		T8	3
valid_sources[0x68]	47875	1			T2	4		T3	421		T8	4
valid_sources[0x69]	131389	1			T2	3		T3	440		T8	4
valid_sources[0x6a]	58098	1			T2	6		T3	395		T8	4
valid_sources[0x6b]	50872	1			T2	2		T3	432		T8	3
valid_sources[0x6c]	52224	1			T2	4		T3	387		T8	1
valid_sources[0x6d]	53130	1			T2	4		T3	393		T8	5
valid_sources[0x6e]	48520	1			T2	2		T3	456		T8	3
valid_sources[0x6f]	51796	1			T3	349		T8	5		T4	33
valid_sources[0x70]	49473	1			T2	5		T3	387		T8	5
valid_sources[0x71]	49539	1			T2	3		T3	341		T8	6
valid_sources[0x72]	53133	1			T2	1		T3	455		T8	2
valid_sources[0x73]	51209	1			T2	3		T3	456		T8	4
valid_sources[0x74]	52987	1			T2	7		T3	345		T8	1
valid_sources[0x75]	58284	1			T2	1		T3	273		T8	1
valid_sources[0x76]	49752	1			T2	5		T3	384		T4	34
valid_sources[0x77]	58366	1			T3	425		T8	5		T4	37
valid_sources[0x78]	50633	1			T2	2		T3	499		T8	4
valid_sources[0x79]	53242	1			T3	351		T8	2		T4	34
valid_sources[0x7a]	53981	1			T2	1		T3	443		T8	4
valid_sources[0x7b]	47339	1			T3	369		T8	4		T4	40
valid_sources[0x7c]	52131	1			T2	1		T3	420		T8	2
valid_sources[0x7d]	50058	1			T3	462		T8	2		T4	31
valid_sources[0x7e]	53009	1			T2	2		T3	334		T8	3
valid_sources[0x7f]	53686	1			T2	4		T3	452		T8	1
valid_sources[0x80]	57109	1			T2	7		T3	343		T8	2

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

3410233

1

T1

76

T2

116

T3

20347

values[0x0]

all_enables

biggest_size

1789427

1

T1

54

T2

74

T3

20486

values[0x1]

all_enables

biggest_size

1706294

1

T1

32

T2

61

T3

20005

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	230515	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

8319405

1

T3

103946

T4

120

T5

20

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	2127334	1			T3	25935		T4	60		T5	10
values[0x0]	3115332	1			T3	39321		T4	34		T5	7
values[0x1]	3307254	1			T3	41373		T4	26		T5	3

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	83459	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

8466461

1

T3

105656

T4

120

T5

20

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	33042	1			T3	379		T4	1		T6	724
valid_sources[0x01]	32453	1			T3	360		T4	1		T6	642
valid_sources[0x02]	32447	1			T3	400		T4	1		T6	516
valid_sources[0x03]	33086	1			T3	425		T4	1		T10	1
valid_sources[0x04]	33392	1			T3	394		T10	1		T6	666
valid_sources[0x05]	34104	1			T3	410		T4	3		T10	3
valid_sources[0x06]	31723	1			T3	401		T4	1		T10	3
valid_sources[0x07]	33793	1			T3	473		T4	4		T6	597
valid_sources[0x08]	31669	1			T3	466		T6	649		T7	576
valid_sources[0x09]	34459	1			T3	399		T4	1		T10	3
valid_sources[0x0a]	33813	1			T3	407		T6	592		T7	403
valid_sources[0x0b]	32425	1			T3	416		T6	739		T7	479
valid_sources[0x0c]	32782	1			T3	422		T4	1		T6	582
valid_sources[0x0d]	34118	1			T3	381		T4	2		T10	4
valid_sources[0x0e]	33673	1			T3	397		T6	787		T7	570
valid_sources[0x0f]	35864	1			T3	414		T4	3		T6	561
valid_sources[0x10]	32105	1			T3	385		T6	672		T13	2
valid_sources[0x11]	32873	1			T3	446		T4	1		T10	2
valid_sources[0x12]	33227	1			T3	368		T6	546		T7	348
valid_sources[0x13]	32172	1			T3	455		T10	3		T6	566
valid_sources[0x14]	33179	1			T3	392		T6	493		T7	590
valid_sources[0x15]	33045	1			T3	421		T10	5		T6	542
valid_sources[0x16]	33359	1			T3	425		T6	617		T7	524
valid_sources[0x17]	32309	1			T3	398		T10	14		T6	538
valid_sources[0x18]	33194	1			T3	417		T6	603		T7	460
valid_sources[0x19]	35088	1			T3	428		T6	670		T13	1
valid_sources[0x1a]	34388	1			T3	409		T6	580		T7	515
valid_sources[0x1b]	34094	1			T3	449		T6	682		T7	483
valid_sources[0x1c]	34655	1			T3	463		T4	2		T6	573
valid_sources[0x1d]	31547	1			T3	447		T4	1		T10	3
valid_sources[0x1e]	33429	1			T3	357		T10	2		T6	587
valid_sources[0x1f]	32413	1			T3	430		T10	1		T6	597
valid_sources[0x20]	33263	1			T3	398		T6	627		T13	2
valid_sources[0x21]	32718	1			T3	389		T10	3		T6	543
valid_sources[0x22]	31777	1			T3	430		T6	501		T7	517
valid_sources[0x23]	32273	1			T3	391		T6	459		T7	400
valid_sources[0x24]	33941	1			T3	407		T6	668		T13	6
valid_sources[0x25]	31358	1			T3	387		T4	1		T6	518
valid_sources[0x26]	32065	1			T3	444		T6	557		T7	568
valid_sources[0x27]	33871	1			T3	444		T10	8		T6	616
valid_sources[0x28]	34905	1			T3	393		T10	3		T6	595
valid_sources[0x29]	31831	1			T3	387		T6	582		T7	521
valid_sources[0x2a]	31393	1			T3	419		T6	537		T7	701
valid_sources[0x2b]	33771	1			T3	413		T4	1		T10	1
valid_sources[0x2c]	32650	1			T3	451		T4	1		T10	2
valid_sources[0x2d]	32641	1			T3	421		T4	1		T5	20
valid_sources[0x2e]	35553	1			T3	450		T6	565		T7	321
valid_sources[0x2f]	31566	1			T3	406		T6	587		T7	503
valid_sources[0x30]	32518	1			T3	427		T4	1		T6	535
valid_sources[0x31]	33454	1			T3	387		T6	595		T7	393
valid_sources[0x32]	32301	1			T3	425		T6	574		T7	362
valid_sources[0x33]	32450	1			T3	385		T4	1		T10	1
valid_sources[0x34]	34361	1			T3	438		T4	2		T6	612
valid_sources[0x35]	31645	1			T3	415		T6	612		T7	597
valid_sources[0x36]	32471	1			T3	382		T4	2		T6	699
valid_sources[0x37]	32280	1			T3	416		T4	3		T6	545
valid_sources[0x38]	31109	1			T3	430		T6	595		T13	1
valid_sources[0x39]	33730	1			T3	390		T4	2		T6	738
valid_sources[0x3a]	32705	1			T3	459		T6	535		T7	556
valid_sources[0x3b]	32607	1			T3	427		T6	687		T7	331
valid_sources[0x3c]	33449	1			T3	405		T4	1		T6	499
valid_sources[0x3d]	34242	1			T3	378		T6	560		T7	497
valid_sources[0x3e]	33002	1			T3	400		T6	716		T7	501
valid_sources[0x3f]	32320	1			T3	367		T10	1		T6	512
valid_sources[0x40]	34290	1			T3	406		T6	582		T13	4
valid_sources[0x41]	34878	1			T3	427		T6	622		T7	592
valid_sources[0x42]	33701	1			T3	452		T10	1		T6	581
valid_sources[0x43]	34502	1			T3	476		T6	600		T7	403
valid_sources[0x44]	33967	1			T3	425		T10	3		T6	588
valid_sources[0x45]	32746	1			T3	448		T6	575		T13	1
valid_sources[0x46]	34235	1			T3	372		T10	2		T6	672
valid_sources[0x47]	31480	1			T3	445		T6	665		T7	466
valid_sources[0x48]	34845	1			T3	427		T6	620		T7	667
valid_sources[0x49]	32613	1			T3	440		T6	604		T7	295
valid_sources[0x4a]	34466	1			T3	461		T6	475		T13	3
valid_sources[0x4b]	33628	1			T3	421		T4	1		T6	552
valid_sources[0x4c]	33203	1			T3	446		T10	1		T6	594
valid_sources[0x4d]	34569	1			T3	383		T10	1		T6	614
valid_sources[0x4e]	34208	1			T3	409		T4	1		T6	524
valid_sources[0x4f]	32545	1			T3	495		T6	732		T7	661
valid_sources[0x50]	34413	1			T3	401		T4	2		T6	521
valid_sources[0x51]	32755	1			T3	469		T10	1		T6	751
valid_sources[0x52]	32445	1			T3	464		T6	660		T7	392
valid_sources[0x53]	31634	1			T3	383		T6	459		T7	364
valid_sources[0x54]	33745	1			T3	412		T4	1		T6	585
valid_sources[0x55]	35062	1			T3	448		T4	2		T6	512
valid_sources[0x56]	31866	1			T3	379		T4	3		T6	693
valid_sources[0x57]	35223	1			T3	441		T6	568		T7	501
valid_sources[0x58]	32465	1			T3	427		T6	578		T13	3
valid_sources[0x59]	36014	1			T3	426		T10	1		T6	543
valid_sources[0x5a]	33471	1			T3	369		T6	521		T7	512
valid_sources[0x5b]	31763	1			T3	383		T6	552		T7	498
valid_sources[0x5c]	33011	1			T3	381		T6	574		T7	441
valid_sources[0x5d]	34569	1			T3	418		T6	531		T7	616
valid_sources[0x5e]	35651	1			T3	429		T6	592		T13	2
valid_sources[0x5f]	31777	1			T3	419		T4	5		T6	641
valid_sources[0x60]	33623	1			T3	412		T6	477		T13	1
valid_sources[0x61]	35594	1			T3	425		T10	2		T6	588
valid_sources[0x62]	32480	1			T3	409		T6	613		T7	302
valid_sources[0x63]	33252	1			T3	389		T6	697		T7	415
valid_sources[0x64]	33833	1			T3	386		T10	2		T6	624
valid_sources[0x65]	31206	1			T3	424		T6	628		T13	1
valid_sources[0x66]	31736	1			T3	390		T10	1		T6	673
valid_sources[0x67]	33274	1			T3	380		T4	1		T6	577
valid_sources[0x68]	34900	1			T3	432		T4	1		T6	544
valid_sources[0x69]	33072	1			T3	455		T6	512		T13	1
valid_sources[0x6a]	34916	1			T3	440		T4	1		T6	552
valid_sources[0x6b]	33315	1			T3	430		T4	2		T10	1
valid_sources[0x6c]	33145	1			T3	379		T4	1		T6	538
valid_sources[0x6d]	33505	1			T3	366		T6	652		T7	480
valid_sources[0x6e]	33218	1			T3	426		T4	3		T6	598
valid_sources[0x6f]	35874	1			T3	447		T6	654		T7	492
valid_sources[0x70]	31503	1			T3	445		T4	2		T10	1
valid_sources[0x71]	32320	1			T3	387		T4	1		T6	504
valid_sources[0x72]	33174	1			T3	410		T4	1		T10	3
valid_sources[0x73]	34517	1			T3	405		T6	708		T13	1
valid_sources[0x74]	33410	1			T3	416		T6	653		T7	387
valid_sources[0x75]	33175	1			T3	405		T6	667		T13	6
valid_sources[0x76]	32555	1			T3	410		T4	1		T6	609
valid_sources[0x77]	33286	1			T3	402		T6	562		T7	622
valid_sources[0x78]	32559	1			T3	412		T10	2		T6	707
valid_sources[0x79]	31604	1			T3	440		T6	546		T7	523
valid_sources[0x7a]	33707	1			T3	429		T6	792		T7	648
valid_sources[0x7b]	32373	1			T3	438		T10	7		T6	648
valid_sources[0x7c]	33387	1			T3	433		T10	1		T6	638
valid_sources[0x7d]	32811	1			T3	437		T6	688		T7	751
valid_sources[0x7e]	33511	1			T3	402		T10	7		T6	626
valid_sources[0x7f]	32332	1			T3	442		T4	1		T6	646
valid_sources[0x80]	32836	1			T3	411		T10	1		T6	623

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

2114189

1

T3

25896

T4

60

T5

10

values[0x0]

all_enables

biggest_size

3099395

1

T3

39125

T4

34

T5

7

values[0x1]

all_enables

biggest_size

3105821

1

T3

38925

T4

26

T5

3