Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	7294676	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

7118287

1

T1

401

T2

32775

T3

1203

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	8442382	1			T1	719		T2	70943		T3	3083
values[0x0]	2270357	1			T1	78		T2	4843		T3	176
values[0x1]	3700224	1			T1	75		T2	4768		T3	167

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	4731201	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

9681762

1

T1

508

T2

43825

T3

1725

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	51572	1			T1	6		T2	334		T4	2
valid_sources[0x01]	53186	1			T1	3		T2	313		T4	3
valid_sources[0x02]	53623	1			T1	3		T2	295		T4	5
valid_sources[0x03]	65116	1			T1	4		T2	347		T4	2
valid_sources[0x04]	56465	1			T1	1		T2	339		T4	7
valid_sources[0x05]	51213	1			T1	3		T2	327		T4	3
valid_sources[0x06]	51914	1			T1	7		T2	345		T4	5
valid_sources[0x07]	50907	1			T1	4		T2	354		T4	1
valid_sources[0x08]	54426	1			T2	313		T4	2		T5	54
valid_sources[0x09]	52532	1			T1	6		T2	277		T4	2
valid_sources[0x0a]	54262	1			T2	363		T4	4		T5	14
valid_sources[0x0b]	52641	1			T1	1		T2	324		T4	2
valid_sources[0x0c]	65026	1			T1	3		T2	246		T4	3
valid_sources[0x0d]	52170	1			T1	9		T2	375		T4	4
valid_sources[0x0e]	51332	1			T1	10		T2	365		T4	4
valid_sources[0x0f]	51704	1			T1	5		T2	317		T7	4
valid_sources[0x10]	59527	1			T1	5		T2	308		T4	5
valid_sources[0x11]	56826	1			T1	1		T2	364		T5	145
valid_sources[0x12]	69997	1			T1	4		T2	341		T4	3
valid_sources[0x13]	51644	1			T1	5		T2	254		T4	1
valid_sources[0x14]	58383	1			T1	5		T2	328		T4	1
valid_sources[0x15]	60374	1			T1	4		T2	304		T4	3
valid_sources[0x16]	57713	1			T1	2		T2	339		T4	4
valid_sources[0x17]	59562	1			T1	2		T2	291		T4	2
valid_sources[0x18]	63696	1			T1	3		T2	346		T4	2
valid_sources[0x19]	63816	1			T1	6		T2	326		T4	2
valid_sources[0x1a]	53100	1			T1	4		T2	296		T4	2
valid_sources[0x1b]	53497	1			T1	6		T2	338		T4	1
valid_sources[0x1c]	65095	1			T1	5		T2	327		T7	1
valid_sources[0x1d]	61493	1			T1	7		T2	327		T4	4
valid_sources[0x1e]	71280	1			T1	3		T2	314		T4	4
valid_sources[0x1f]	50531	1			T2	276		T4	2		T5	126
valid_sources[0x20]	56566	1			T1	2		T2	309		T4	1
valid_sources[0x21]	50514	1			T1	8		T2	383		T4	4
valid_sources[0x22]	53917	1			T1	3		T2	305		T4	4
valid_sources[0x23]	53994	1			T1	3		T2	331		T4	6
valid_sources[0x24]	77965	1			T2	306		T4	2		T7	2
valid_sources[0x25]	52837	1			T1	2		T2	332		T4	2
valid_sources[0x26]	51525	1			T2	386		T4	1		T7	39
valid_sources[0x27]	58797	1			T1	6		T2	383		T4	5
valid_sources[0x28]	52093	1			T1	2		T2	287		T4	3
valid_sources[0x29]	52417	1			T1	2		T2	334		T4	2
valid_sources[0x2a]	61923	1			T1	2		T2	372		T4	3
valid_sources[0x2b]	52124	1			T1	4		T2	329		T4	2
valid_sources[0x2c]	51817	1			T1	2		T2	281		T4	4
valid_sources[0x2d]	50281	1			T1	2		T2	289		T4	4
valid_sources[0x2e]	67502	1			T1	3		T2	359		T4	1
valid_sources[0x2f]	51918	1			T1	6		T2	296		T4	1
valid_sources[0x30]	63339	1			T1	6		T2	311		T4	3
valid_sources[0x31]	52266	1			T1	6		T2	261		T4	3
valid_sources[0x32]	62852	1			T1	2		T2	333		T4	6
valid_sources[0x33]	56915	1			T1	5		T2	278		T4	3
valid_sources[0x34]	54133	1			T1	5		T2	305		T4	3
valid_sources[0x35]	57279	1			T1	4		T2	393		T7	10
valid_sources[0x36]	55374	1			T1	1		T2	271		T5	148
valid_sources[0x37]	51522	1			T1	4		T2	282		T4	2
valid_sources[0x38]	53376	1			T1	4		T2	229		T4	7
valid_sources[0x39]	65664	1			T1	2		T2	319		T4	4
valid_sources[0x3a]	56201	1			T1	3		T2	332		T4	4
valid_sources[0x3b]	56828	1			T2	273		T4	2		T5	32
valid_sources[0x3c]	51103	1			T1	1		T2	305		T4	3
valid_sources[0x3d]	55462	1			T2	268		T4	5		T5	83
valid_sources[0x3e]	52259	1			T1	4		T2	358		T4	1
valid_sources[0x3f]	54753	1			T2	335		T5	134		T9	34
valid_sources[0x40]	59702	1			T1	4		T2	290		T4	1
valid_sources[0x41]	60407	1			T1	2		T2	310		T4	3
valid_sources[0x42]	50640	1			T2	271		T4	2		T5	48
valid_sources[0x43]	57055	1			T1	3		T2	302		T4	2
valid_sources[0x44]	51418	1			T1	7		T2	364		T4	5
valid_sources[0x45]	59609	1			T1	1		T2	341		T4	2
valid_sources[0x46]	54073	1			T1	10		T2	357		T4	4
valid_sources[0x47]	55142	1			T2	273		T4	4		T5	101
valid_sources[0x48]	53879	1			T1	1		T2	332		T4	5
valid_sources[0x49]	56690	1			T1	5		T2	340		T4	2
valid_sources[0x4a]	55310	1			T1	4		T2	310		T4	2
valid_sources[0x4b]	52982	1			T1	1		T2	355		T4	3
valid_sources[0x4c]	56579	1			T1	9		T2	297		T4	1
valid_sources[0x4d]	55321	1			T1	1		T2	305		T4	5
valid_sources[0x4e]	51487	1			T1	4		T2	300		T4	3
valid_sources[0x4f]	58345	1			T2	296		T4	1		T7	2
valid_sources[0x50]	51694	1			T2	280		T4	3		T5	61
valid_sources[0x51]	52034	1			T1	1		T2	293		T4	2
valid_sources[0x52]	51242	1			T1	2		T2	289		T4	2
valid_sources[0x53]	54921	1			T1	1		T2	345		T4	5
valid_sources[0x54]	59026	1			T1	2		T2	272		T4	4
valid_sources[0x55]	55405	1			T1	4		T2	291		T4	5
valid_sources[0x56]	61903	1			T1	11		T2	340		T4	2
valid_sources[0x57]	67305	1			T1	3		T2	307		T4	1
valid_sources[0x58]	55464	1			T1	7		T2	332		T4	1
valid_sources[0x59]	54869	1			T1	6		T2	261		T4	5
valid_sources[0x5a]	52505	1			T1	2		T2	334		T4	5
valid_sources[0x5b]	60394	1			T1	2		T2	326		T4	3
valid_sources[0x5c]	54207	1			T1	3		T2	308		T4	1
valid_sources[0x5d]	52475	1			T1	1		T2	275		T4	2
valid_sources[0x5e]	53207	1			T1	9		T2	274		T4	3
valid_sources[0x5f]	55263	1			T1	2		T2	289		T4	3
valid_sources[0x60]	54612	1			T1	7		T2	316		T4	2
valid_sources[0x61]	57474	1			T1	2		T2	329		T4	2
valid_sources[0x62]	52319	1			T1	4		T2	366		T4	2
valid_sources[0x63]	62262	1			T1	7		T2	308		T4	3
valid_sources[0x64]	54965	1			T1	9		T2	350		T4	3
valid_sources[0x65]	53317	1			T1	2		T2	232		T4	2
valid_sources[0x66]	56256	1			T1	2		T2	314		T4	1
valid_sources[0x67]	52551	1			T1	1		T2	303		T4	6
valid_sources[0x68]	54624	1			T1	3		T2	300		T4	3
valid_sources[0x69]	52712	1			T2	265		T4	6		T5	156
valid_sources[0x6a]	52472	1			T1	6		T2	291		T4	2
valid_sources[0x6b]	54107	1			T1	4		T2	329		T4	4
valid_sources[0x6c]	52724	1			T2	319		T4	3		T7	20
valid_sources[0x6d]	64954	1			T1	3		T2	290		T4	3
valid_sources[0x6e]	52108	1			T1	1		T2	317		T4	3
valid_sources[0x6f]	53573	1			T1	1		T2	302		T4	4
valid_sources[0x70]	55304	1			T1	7		T2	292		T4	2
valid_sources[0x71]	68224	1			T2	303		T4	3		T7	3
valid_sources[0x72]	63884	1			T1	4		T2	302		T4	1
valid_sources[0x73]	65692	1			T1	7		T2	306		T4	2
valid_sources[0x74]	52831	1			T1	3		T2	400		T4	1
valid_sources[0x75]	55244	1			T1	4		T2	337		T4	2
valid_sources[0x76]	68984	1			T1	8		T2	287		T4	1
valid_sources[0x77]	60857	1			T1	1		T2	304		T4	1
valid_sources[0x78]	52438	1			T2	271		T4	3		T5	186
valid_sources[0x79]	51593	1			T1	3		T2	316		T4	1
valid_sources[0x7a]	51826	1			T1	2		T2	376		T4	5
valid_sources[0x7b]	53912	1			T1	1		T2	284		T4	6
valid_sources[0x7c]	53963	1			T1	6		T2	303		T4	1
valid_sources[0x7d]	51595	1			T1	5		T2	300		T4	2
valid_sources[0x7e]	56846	1			T1	2		T2	315		T4	2
valid_sources[0x7f]	54455	1			T1	3		T2	379		T4	3
valid_sources[0x80]	54864	1			T1	6		T2	318		T5	106

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

3423722

1

T1

337

T2

28842

T3

1067

values[0x0]

all_enables

biggest_size

1885068

1

T1

43

T2

2339

T3

83

values[0x1]

all_enables

biggest_size

1809497

1

T1

21

T2

1594

T3

53

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	245505	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

8863622

1

T1

40

T2

1340

T3

120

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	2264694	1			T1	20		T2	670		T3	60
values[0x0]	3325352	1			T1	11		T2	325		T3	34
values[0x1]	3519081	1			T1	9		T2	345		T3	26

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	88711	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

9020416

1

T1

40

T2

1340

T3

120

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	35319	1			T2	3		T94	1		T96	1
valid_sources[0x01]	36299	1			T2	9		T5	1		T94	1
valid_sources[0x02]	36170	1			T2	4		T5	1		T146	1
valid_sources[0x03]	35258	1			T1	6		T2	7		T5	3
valid_sources[0x04]	36107	1			T2	5		T93	1		T59	2
valid_sources[0x05]	35852	1			T2	6		T3	5		T94	2
valid_sources[0x06]	34069	1			T2	6		T95	3		T96	2
valid_sources[0x07]	34493	1			T2	6		T5	1		T95	1
valid_sources[0x08]	35983	1			T2	3		T93	1		T95	1
valid_sources[0x09]	35139	1			T2	1		T146	6		T94	1
valid_sources[0x0a]	34490	1			T2	3		T5	1		T9	9
valid_sources[0x0b]	36461	1			T2	6		T95	1		T97	1
valid_sources[0x0c]	33897	1			T2	6		T5	1		T93	1
valid_sources[0x0d]	34934	1			T2	4		T5	1		T9	6
valid_sources[0x0e]	36292	1			T2	4		T94	2		T95	3
valid_sources[0x0f]	35892	1			T2	2		T93	1		T146	1
valid_sources[0x10]	34025	1			T2	3		T3	3		T97	1
valid_sources[0x11]	34447	1			T2	6		T6	2		T146	3
valid_sources[0x12]	35460	1			T2	4		T5	2		T12	364
valid_sources[0x13]	34670	1			T2	3		T5	1		T93	1
valid_sources[0x14]	34920	1			T2	3		T95	2		T12	349
valid_sources[0x15]	34783	1			T2	4		T5	3		T94	1
valid_sources[0x16]	34214	1			T2	2		T5	1		T95	2
valid_sources[0x17]	34771	1			T2	6		T94	1		T95	2
valid_sources[0x18]	36173	1			T2	4		T60	7		T12	357
valid_sources[0x19]	34892	1			T2	5		T105	1		T95	1
valid_sources[0x1a]	36722	1			T2	4		T5	2		T96	2
valid_sources[0x1b]	35805	1			T2	10		T5	1		T146	2
valid_sources[0x1c]	35270	1			T2	2		T5	1		T9	8
valid_sources[0x1d]	37133	1			T2	3		T5	1		T94	1
valid_sources[0x1e]	35548	1			T2	10		T93	1		T6	2
valid_sources[0x1f]	35917	1			T2	3		T5	2		T93	1
valid_sources[0x20]	35404	1			T2	6		T94	3		T95	2
valid_sources[0x21]	36229	1			T2	4		T3	6		T94	1
valid_sources[0x22]	35082	1			T2	4		T5	1		T96	2
valid_sources[0x23]	36535	1			T2	4		T95	1		T97	4
valid_sources[0x24]	36261	1			T2	7		T93	1		T59	13
valid_sources[0x25]	37487	1			T2	5		T5	1		T97	3
valid_sources[0x26]	35727	1			T2	4		T3	1		T5	1
valid_sources[0x27]	35677	1			T2	7		T93	1		T105	3
valid_sources[0x28]	36512	1			T2	9		T3	3		T97	1
valid_sources[0x29]	34830	1			T2	4		T5	1		T93	1
valid_sources[0x2a]	36402	1			T2	9		T5	1		T95	2
valid_sources[0x2b]	36482	1			T2	5		T87	2		T12	319
valid_sources[0x2c]	34571	1			T2	6		T3	3		T96	1
valid_sources[0x2d]	34453	1			T2	4		T105	17		T95	1
valid_sources[0x2e]	35701	1			T2	3		T5	1		T94	1
valid_sources[0x2f]	34404	1			T2	4		T5	1		T94	2
valid_sources[0x30]	35391	1			T2	7		T95	2		T87	1
valid_sources[0x31]	35393	1			T2	5		T5	1		T93	1
valid_sources[0x32]	34747	1			T2	4		T5	1		T104	31
valid_sources[0x33]	37350	1			T2	9		T3	1		T5	2
valid_sources[0x34]	35036	1			T2	7		T5	1		T95	1
valid_sources[0x35]	35336	1			T2	4		T3	4		T5	1
valid_sources[0x36]	34121	1			T2	4		T94	1		T12	321
valid_sources[0x37]	36076	1			T2	5		T5	1		T93	2
valid_sources[0x38]	35421	1			T2	10		T5	2		T96	2
valid_sources[0x39]	35566	1			T2	6		T3	1		T5	1
valid_sources[0x3a]	35603	1			T2	2		T96	2		T87	1
valid_sources[0x3b]	35030	1			T2	6		T94	1		T95	2
valid_sources[0x3c]	34144	1			T2	3		T5	1		T93	1
valid_sources[0x3d]	35434	1			T2	1		T94	3		T87	1
valid_sources[0x3e]	34712	1			T2	3		T94	1		T12	350
valid_sources[0x3f]	34879	1			T2	4		T5	2		T94	2
valid_sources[0x40]	36076	1			T2	5		T5	1		T95	2
valid_sources[0x41]	35184	1			T2	6		T95	1		T97	2
valid_sources[0x42]	36194	1			T2	2		T97	1		T12	326
valid_sources[0x43]	36328	1			T2	6		T97	1		T12	365
valid_sources[0x44]	36081	1			T2	4		T3	3		T93	4
valid_sources[0x45]	35662	1			T2	6		T5	3		T94	1
valid_sources[0x46]	35877	1			T2	4		T5	1		T94	2
valid_sources[0x47]	34348	1			T2	6		T5	1		T146	6
valid_sources[0x48]	35259	1			T2	3		T5	1		T146	4
valid_sources[0x49]	36427	1			T2	2		T5	2		T146	8
valid_sources[0x4a]	35300	1			T2	4		T5	2		T93	1
valid_sources[0x4b]	36428	1			T2	6		T94	1		T96	1
valid_sources[0x4c]	35182	1			T2	6		T5	2		T94	1
valid_sources[0x4d]	37027	1			T2	7		T93	2		T146	4
valid_sources[0x4e]	36331	1			T2	2		T5	2		T146	5
valid_sources[0x4f]	35628	1			T2	6		T95	1		T12	320
valid_sources[0x50]	35957	1			T2	9		T5	1		T93	1
valid_sources[0x51]	36323	1			T2	1		T146	5		T12	337
valid_sources[0x52]	35531	1			T2	10		T3	3		T5	1
valid_sources[0x53]	35519	1			T2	10		T5	1		T93	1
valid_sources[0x54]	35995	1			T2	9		T94	2		T96	2
valid_sources[0x55]	35349	1			T2	4		T94	1		T95	1
valid_sources[0x56]	34444	1			T2	11		T3	4		T5	1
valid_sources[0x57]	36128	1			T2	9		T5	1		T96	1
valid_sources[0x58]	35571	1			T2	5		T3	2		T5	1
valid_sources[0x59]	36082	1			T2	1		T96	1		T97	1
valid_sources[0x5a]	35219	1			T2	2		T3	2		T5	1
valid_sources[0x5b]	36012	1			T2	8		T94	1		T97	1
valid_sources[0x5c]	36297	1			T2	7		T5	1		T93	1
valid_sources[0x5d]	35595	1			T2	3		T94	1		T12	318
valid_sources[0x5e]	35216	1			T2	10		T94	1		T105	3
valid_sources[0x5f]	35149	1			T2	6		T93	2		T12	330
valid_sources[0x60]	37106	1			T2	4		T5	1		T95	1
valid_sources[0x61]	35411	1			T2	13		T95	2		T12	360
valid_sources[0x62]	34816	1			T2	9		T95	1		T87	1
valid_sources[0x63]	35685	1			T2	8		T6	1		T95	2
valid_sources[0x64]	34947	1			T2	1		T93	1		T12	328
valid_sources[0x65]	35802	1			T2	5		T93	1		T146	12
valid_sources[0x66]	36155	1			T1	2		T2	6		T5	1
valid_sources[0x67]	35636	1			T2	3		T5	2		T96	12
valid_sources[0x68]	35899	1			T2	6		T5	1		T94	1
valid_sources[0x69]	35739	1			T2	3		T94	2		T95	3
valid_sources[0x6a]	35389	1			T2	9		T93	1		T94	1
valid_sources[0x6b]	35022	1			T2	7		T60	10		T12	309
valid_sources[0x6c]	35980	1			T2	4		T97	1		T12	336
valid_sources[0x6d]	37286	1			T2	12		T9	20		T12	356
valid_sources[0x6e]	35083	1			T2	2		T5	3		T9	33
valid_sources[0x6f]	36363	1			T2	4		T95	2		T97	2
valid_sources[0x70]	35009	1			T2	6		T5	2		T93	1
valid_sources[0x71]	37216	1			T2	3		T95	1		T12	343
valid_sources[0x72]	35705	1			T2	7		T5	2		T97	2
valid_sources[0x73]	34879	1			T2	9		T5	1		T104	1
valid_sources[0x74]	35374	1			T2	9		T146	1		T12	318
valid_sources[0x75]	35780	1			T2	4		T5	4		T93	1
valid_sources[0x76]	35408	1			T2	7		T5	1		T95	1
valid_sources[0x77]	35307	1			T2	6		T94	1		T12	302
valid_sources[0x78]	35447	1			T2	6		T93	1		T12	321
valid_sources[0x79]	35407	1			T2	5		T3	1		T9	18
valid_sources[0x7a]	34145	1			T2	4		T5	2		T93	1
valid_sources[0x7b]	36251	1			T2	9		T5	1		T94	1
valid_sources[0x7c]	36124	1			T2	6		T94	1		T97	1
valid_sources[0x7d]	35322	1			T2	2		T5	1		T95	1
valid_sources[0x7e]	35029	1			T2	8		T5	1		T12	330
valid_sources[0x7f]	35694	1			T2	5		T94	2		T97	1
valid_sources[0x80]	35675	1			T2	4		T5	2		T96	4

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

2250992

1

T1

20

T2

670

T3

60

values[0x0]

all_enables

biggest_size

3308533

1

T1

11

T2

325

T3

34

values[0x1]

all_enables

biggest_size

3304097

1

T1

9

T2

345

T3

26