Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 6829051 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 6971938 1 T1 966 T2 201 T3 4744



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 7922010 1 T1 2244 T2 747 T3 11949
values[0x0] 2241535 1 T1 145 T2 98 T3 551
values[0x1] 3637444 1 T1 131 T2 122 T3 545



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 4425100 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 9375889 1 T1 1343 T2 428 T3 6682



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 49728 1 T1 1 T3 53 T5 30
valid_sources[0x01] 48041 1 T1 8 T3 63 T5 32
valid_sources[0x02] 49010 1 T1 8 T3 40 T5 42
valid_sources[0x03] 67648 1 T1 23 T2 8 T3 42
valid_sources[0x04] 54836 1 T1 7 T2 5 T3 52
valid_sources[0x05] 49303 1 T1 7 T2 3 T3 49
valid_sources[0x06] 47213 1 T1 9 T2 1 T3 45
valid_sources[0x07] 48772 1 T1 16 T2 14 T3 51
valid_sources[0x08] 55401 1 T1 7 T2 5 T3 51
valid_sources[0x09] 47103 1 T1 7 T2 3 T3 57
valid_sources[0x0a] 47806 1 T1 14 T2 4 T3 61
valid_sources[0x0b] 55315 1 T1 12 T2 10 T3 59
valid_sources[0x0c] 53386 1 T1 12 T2 2 T3 66
valid_sources[0x0d] 49293 1 T1 6 T2 1 T3 40
valid_sources[0x0e] 51496 1 T1 8 T2 9 T3 61
valid_sources[0x0f] 47346 1 T1 2 T2 10 T3 57
valid_sources[0x10] 46488 1 T1 4 T3 66 T5 36
valid_sources[0x11] 55309 1 T1 10 T2 9 T3 45
valid_sources[0x12] 58569 1 T1 12 T2 7 T3 49
valid_sources[0x13] 47385 1 T1 11 T2 7 T3 55
valid_sources[0x14] 49828 1 T1 12 T3 48 T5 36
valid_sources[0x15] 47676 1 T1 14 T3 67 T5 51
valid_sources[0x16] 52128 1 T1 12 T3 49 T5 39
valid_sources[0x17] 50736 1 T1 9 T2 4 T3 41
valid_sources[0x18] 62563 1 T1 10 T2 3 T3 44
valid_sources[0x19] 51678 1 T1 2 T2 4 T3 70
valid_sources[0x1a] 55275 1 T1 7 T2 3 T3 47
valid_sources[0x1b] 48640 1 T1 9 T2 1 T3 48
valid_sources[0x1c] 51056 1 T1 16 T2 3 T3 52
valid_sources[0x1d] 51021 1 T1 14 T2 6 T3 72
valid_sources[0x1e] 47663 1 T1 6 T2 2 T3 54
valid_sources[0x1f] 49401 1 T1 26 T3 48 T5 39
valid_sources[0x20] 49278 1 T1 16 T2 9 T3 50
valid_sources[0x21] 47750 1 T1 11 T2 9 T3 61
valid_sources[0x22] 46633 1 T1 9 T2 3 T3 54
valid_sources[0x23] 47892 1 T1 11 T2 1 T3 56
valid_sources[0x24] 59280 1 T1 4 T2 7 T3 40
valid_sources[0x25] 50537 1 T1 9 T2 8 T3 39
valid_sources[0x26] 49486 1 T1 8 T2 3 T3 42
valid_sources[0x27] 59760 1 T1 15 T2 3 T3 49
valid_sources[0x28] 63366 1 T1 13 T2 5 T3 45
valid_sources[0x29] 50025 1 T1 6 T2 1 T3 45
valid_sources[0x2a] 58995 1 T1 10 T2 5 T3 41
valid_sources[0x2b] 60407 1 T1 8 T3 56 T5 35
valid_sources[0x2c] 48549 1 T1 11 T2 5 T3 68
valid_sources[0x2d] 47846 1 T1 12 T2 3 T3 44
valid_sources[0x2e] 53277 1 T1 8 T3 56 T5 41
valid_sources[0x2f] 48989 1 T1 9 T2 2 T3 47
valid_sources[0x30] 53484 1 T1 9 T2 1 T3 55
valid_sources[0x31] 87410 1 T1 8 T2 2 T3 58
valid_sources[0x32] 47954 1 T1 3 T2 6 T3 53
valid_sources[0x33] 50864 1 T1 12 T3 54 T5 30
valid_sources[0x34] 50086 1 T1 6 T2 2 T3 46
valid_sources[0x35] 55000 1 T1 13 T2 8 T3 46
valid_sources[0x36] 47376 1 T1 14 T3 55 T5 29
valid_sources[0x37] 53519 1 T1 6 T2 5 T3 57
valid_sources[0x38] 51217 1 T1 9 T2 4 T3 57
valid_sources[0x39] 49058 1 T1 13 T2 8 T3 56
valid_sources[0x3a] 52649 1 T1 10 T2 3 T3 45
valid_sources[0x3b] 47890 1 T1 13 T2 10 T3 56
valid_sources[0x3c] 55901 1 T1 12 T2 2 T3 47
valid_sources[0x3d] 47837 1 T1 8 T2 1 T3 60
valid_sources[0x3e] 50576 1 T1 4 T2 1 T3 56
valid_sources[0x3f] 48025 1 T1 19 T2 4 T3 45
valid_sources[0x40] 58697 1 T1 9 T2 1 T3 50
valid_sources[0x41] 67745 1 T1 14 T2 6 T3 53
valid_sources[0x42] 58663 1 T1 14 T2 4 T3 53
valid_sources[0x43] 50992 1 T1 16 T2 16 T3 40
valid_sources[0x44] 56612 1 T1 5 T2 4 T3 51
valid_sources[0x45] 51495 1 T1 9 T2 9 T3 50
valid_sources[0x46] 51545 1 T1 11 T2 6 T3 45
valid_sources[0x47] 46467 1 T1 9 T2 3 T3 41
valid_sources[0x48] 46614 1 T1 4 T3 48 T5 36
valid_sources[0x49] 69573 1 T1 5 T2 6 T3 41
valid_sources[0x4a] 48872 1 T1 6 T2 3 T3 55
valid_sources[0x4b] 62033 1 T1 6 T3 55 T5 29
valid_sources[0x4c] 75895 1 T1 9 T2 5 T3 47
valid_sources[0x4d] 105753 1 T1 21 T2 1 T3 54
valid_sources[0x4e] 49017 1 T1 9 T2 4 T3 46
valid_sources[0x4f] 49710 1 T1 8 T3 55 T5 39
valid_sources[0x50] 47784 1 T1 12 T2 2 T3 51
valid_sources[0x51] 51992 1 T1 18 T2 3 T3 49
valid_sources[0x52] 51598 1 T1 7 T2 5 T3 43
valid_sources[0x53] 61316 1 T1 13 T2 11 T3 43
valid_sources[0x54] 58360 1 T1 6 T2 4 T3 60
valid_sources[0x55] 46424 1 T1 12 T2 4 T3 57
valid_sources[0x56] 71649 1 T1 2 T2 11 T3 57
valid_sources[0x57] 50178 1 T1 8 T2 1 T3 61
valid_sources[0x58] 54603 1 T1 7 T2 3 T3 48
valid_sources[0x59] 51700 1 T1 7 T2 6 T3 49
valid_sources[0x5a] 53681 1 T1 24 T2 6 T3 53
valid_sources[0x5b] 47642 1 T1 11 T3 52 T5 35
valid_sources[0x5c] 51857 1 T1 8 T2 1 T3 48
valid_sources[0x5d] 51621 1 T1 8 T3 41 T5 29
valid_sources[0x5e] 46314 1 T1 6 T2 3 T3 48
valid_sources[0x5f] 51728 1 T1 13 T2 1 T3 49
valid_sources[0x60] 45047 1 T1 15 T2 4 T3 47
valid_sources[0x61] 62025 1 T1 9 T2 2 T3 51
valid_sources[0x62] 52344 1 T1 10 T2 3 T3 50
valid_sources[0x63] 82063 1 T1 9 T2 4 T3 63
valid_sources[0x64] 50983 1 T1 12 T3 59 T5 34
valid_sources[0x65] 130835 1 T1 8 T2 2 T3 40
valid_sources[0x66] 49354 1 T1 8 T2 6 T3 48
valid_sources[0x67] 49987 1 T1 11 T2 1 T3 40
valid_sources[0x68] 46830 1 T1 7 T2 3 T3 61
valid_sources[0x69] 48862 1 T1 13 T2 5 T3 48
valid_sources[0x6a] 47911 1 T1 18 T2 9 T3 43
valid_sources[0x6b] 57322 1 T1 5 T3 49 T5 31
valid_sources[0x6c] 52698 1 T1 9 T2 11 T3 52
valid_sources[0x6d] 49659 1 T1 6 T2 3 T3 48
valid_sources[0x6e] 52024 1 T1 11 T2 2 T3 67
valid_sources[0x6f] 49019 1 T1 6 T2 6 T3 52
valid_sources[0x70] 49435 1 T1 4 T2 13 T3 49
valid_sources[0x71] 51829 1 T1 8 T2 1 T3 62
valid_sources[0x72] 48142 1 T1 12 T2 8 T3 51
valid_sources[0x73] 52972 1 T1 10 T2 4 T3 47
valid_sources[0x74] 62769 1 T1 6 T2 7 T3 38
valid_sources[0x75] 47886 1 T1 8 T3 66 T5 50
valid_sources[0x76] 74801 1 T1 12 T2 1 T3 59
valid_sources[0x77] 49066 1 T1 8 T2 1 T3 49
valid_sources[0x78] 88912 1 T1 8 T2 9 T3 40
valid_sources[0x79] 45767 1 T1 7 T3 62 T5 33
valid_sources[0x7a] 49018 1 T1 13 T2 12 T3 52
valid_sources[0x7b] 47250 1 T1 9 T2 2 T3 61
valid_sources[0x7c] 53218 1 T1 11 T2 7 T3 45
valid_sources[0x7d] 47641 1 T1 3 T2 3 T3 42
valid_sources[0x7e] 57734 1 T1 21 T2 6 T3 68
valid_sources[0x7f] 48574 1 T1 15 T3 50 T5 37
valid_sources[0x80] 151373 1 T1 7 T3 39 T5 49



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 3325923 1 T1 839 T2 112 T3 4371
values[0x0] all_enables biggest_size 1860440 1 T1 78 T2 47 T3 228
values[0x1] all_enables biggest_size 1785575 1 T1 49 T2 42 T3 145


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 241108 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 8713438 1 T1 80 T3 160 T5 20



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 2228803 1 T1 40 T3 80 T5 10
values[0x0] 3268752 1 T1 18 T3 37 T5 6
values[0x1] 3456991 1 T1 22 T3 43 T5 4



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 87022 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 8867524 1 T1 80 T3 160 T5 20



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 35818 1 T8 6 T104 2 T6 1725
valid_sources[0x01] 35026 1 T8 7 T6 1268 T12 151
valid_sources[0x02] 35072 1 T8 10 T6 1984 T12 175
valid_sources[0x03] 35329 1 T8 4 T104 1 T6 1722
valid_sources[0x04] 34358 1 T8 6 T6 1216 T12 123
valid_sources[0x05] 35221 1 T8 5 T6 1604 T12 125
valid_sources[0x06] 35954 1 T8 5 T6 1457 T12 143
valid_sources[0x07] 35622 1 T8 2 T14 2 T104 1
valid_sources[0x08] 34890 1 T1 1 T3 1 T8 4
valid_sources[0x09] 34518 1 T1 2 T8 1 T104 1
valid_sources[0x0a] 33439 1 T3 3 T8 4 T14 1
valid_sources[0x0b] 35266 1 T8 4 T104 1 T6 1778
valid_sources[0x0c] 34809 1 T1 3 T8 10 T14 1
valid_sources[0x0d] 34479 1 T3 2 T8 6 T100 200
valid_sources[0x0e] 35943 1 T3 4 T8 3 T6 1404
valid_sources[0x0f] 35101 1 T8 10 T6 1047 T12 155
valid_sources[0x10] 36339 1 T1 2 T8 1 T6 1351
valid_sources[0x11] 35441 1 T3 2 T8 8 T6 1318
valid_sources[0x12] 34324 1 T1 1 T8 3 T6 1277
valid_sources[0x13] 36542 1 T1 1 T3 1 T5 1
valid_sources[0x14] 33866 1 T8 8 T6 1463 T12 145
valid_sources[0x15] 35038 1 T8 4 T6 1532 T12 129
valid_sources[0x16] 34520 1 T1 1 T8 7 T14 1
valid_sources[0x17] 34641 1 T8 4 T6 1270 T12 133
valid_sources[0x18] 35396 1 T1 1 T3 1 T8 3
valid_sources[0x19] 35474 1 T8 3 T6 1545 T12 124
valid_sources[0x1a] 35272 1 T8 6 T6 1513 T12 162
valid_sources[0x1b] 35106 1 T8 4 T104 1 T6 1501
valid_sources[0x1c] 34929 1 T8 10 T104 1 T6 1324
valid_sources[0x1d] 35235 1 T8 5 T103 3 T6 1375
valid_sources[0x1e] 34614 1 T8 3 T104 1 T6 1590
valid_sources[0x1f] 33903 1 T8 3 T104 1 T6 1043
valid_sources[0x20] 34563 1 T8 2 T104 1 T6 1359
valid_sources[0x21] 35431 1 T3 3 T8 6 T6 899
valid_sources[0x22] 35878 1 T8 4 T6 1465 T190 1
valid_sources[0x23] 34074 1 T8 9 T104 1 T6 1252
valid_sources[0x24] 35635 1 T4 6 T8 6 T6 1395
valid_sources[0x25] 35302 1 T8 8 T6 1341 T12 117
valid_sources[0x26] 35480 1 T8 4 T14 1 T6 1707
valid_sources[0x27] 35890 1 T1 1 T8 6 T6 2015
valid_sources[0x28] 34220 1 T3 3 T5 2 T4 8
valid_sources[0x29] 34756 1 T1 2 T8 7 T14 1
valid_sources[0x2a] 36245 1 T5 1 T8 6 T6 1347
valid_sources[0x2b] 34507 1 T8 7 T6 1639 T12 130
valid_sources[0x2c] 37023 1 T3 1 T8 9 T104 1
valid_sources[0x2d] 35205 1 T8 11 T104 1 T6 1630
valid_sources[0x2e] 35411 1 T8 7 T6 1331 T12 138
valid_sources[0x2f] 35968 1 T3 1 T8 2 T6 1592
valid_sources[0x30] 34450 1 T8 9 T104 1 T6 1691
valid_sources[0x31] 34543 1 T8 6 T6 1308 T12 163
valid_sources[0x32] 34838 1 T8 7 T104 1 T6 1791
valid_sources[0x33] 36179 1 T4 3 T8 3 T104 1
valid_sources[0x34] 33288 1 T8 11 T6 1385 T12 144
valid_sources[0x35] 35031 1 T8 8 T104 1 T6 1212
valid_sources[0x36] 34951 1 T8 8 T14 1 T104 2
valid_sources[0x37] 35791 1 T4 1 T8 4 T6 1085
valid_sources[0x38] 34714 1 T1 1 T8 4 T104 1
valid_sources[0x39] 35444 1 T8 4 T6 1296 T12 152
valid_sources[0x3a] 34166 1 T8 3 T6 1602 T12 123
valid_sources[0x3b] 34249 1 T8 7 T104 1 T6 1475
valid_sources[0x3c] 35366 1 T5 1 T8 5 T6 1201
valid_sources[0x3d] 36172 1 T1 1 T8 2 T104 1
valid_sources[0x3e] 33785 1 T3 3 T8 1 T6 1456
valid_sources[0x3f] 34764 1 T8 5 T6 1310 T12 137
valid_sources[0x40] 33937 1 T8 2 T6 951 T12 136
valid_sources[0x41] 35255 1 T8 4 T6 870 T12 141
valid_sources[0x42] 33559 1 T3 1 T8 17 T104 1
valid_sources[0x43] 34731 1 T8 2 T6 1403 T12 139
valid_sources[0x44] 33646 1 T3 7 T8 6 T6 1371
valid_sources[0x45] 34796 1 T8 10 T104 1 T6 1143
valid_sources[0x46] 35373 1 T8 9 T104 1 T6 1038
valid_sources[0x47] 33971 1 T1 1 T8 9 T104 1
valid_sources[0x48] 34817 1 T1 1 T8 4 T14 1
valid_sources[0x49] 35735 1 T8 8 T104 1 T6 1357
valid_sources[0x4a] 36168 1 T3 1 T8 4 T6 1382
valid_sources[0x4b] 34606 1 T3 2 T8 7 T104 2
valid_sources[0x4c] 34540 1 T8 5 T6 834 T12 156
valid_sources[0x4d] 33855 1 T3 1 T8 2 T104 1
valid_sources[0x4e] 36442 1 T4 1 T8 3 T104 1
valid_sources[0x4f] 34239 1 T8 5 T6 1430 T12 155
valid_sources[0x50] 32900 1 T3 1 T8 5 T6 1158
valid_sources[0x51] 35994 1 T3 6 T8 4 T6 1289
valid_sources[0x52] 33339 1 T3 4 T8 3 T6 1253
valid_sources[0x53] 36542 1 T8 7 T103 3 T6 1308
valid_sources[0x54] 35349 1 T8 7 T6 1354 T12 141
valid_sources[0x55] 33166 1 T1 1 T8 6 T6 1297
valid_sources[0x56] 34002 1 T8 2 T6 1058 T190 1
valid_sources[0x57] 34068 1 T1 1 T8 9 T6 1141
valid_sources[0x58] 36175 1 T8 8 T104 1 T6 1804
valid_sources[0x59] 33428 1 T8 6 T6 1163 T12 148
valid_sources[0x5a] 35669 1 T8 4 T6 2427 T12 133
valid_sources[0x5b] 34571 1 T3 1 T8 6 T6 1085
valid_sources[0x5c] 34952 1 T8 6 T6 1583 T12 128
valid_sources[0x5d] 34725 1 T8 9 T6 980 T12 154
valid_sources[0x5e] 35591 1 T8 8 T6 1849 T190 1
valid_sources[0x5f] 34992 1 T8 11 T6 1872 T12 134
valid_sources[0x60] 34685 1 T8 8 T6 1135 T12 143
valid_sources[0x61] 34702 1 T8 5 T6 1069 T12 150
valid_sources[0x62] 35560 1 T5 1 T8 2 T104 1
valid_sources[0x63] 34236 1 T5 1 T8 4 T6 1002
valid_sources[0x64] 34416 1 T8 2 T6 1468 T12 108
valid_sources[0x65] 33989 1 T3 5 T8 6 T104 1
valid_sources[0x66] 35499 1 T8 5 T6 2045 T12 163
valid_sources[0x67] 35202 1 T8 13 T6 1117 T12 164
valid_sources[0x68] 35088 1 T8 2 T6 1067 T12 123
valid_sources[0x69] 33487 1 T8 4 T6 1608 T12 144
valid_sources[0x6a] 37666 1 T1 1 T8 8 T6 1237
valid_sources[0x6b] 34066 1 T1 1 T8 4 T6 1306
valid_sources[0x6c] 34089 1 T8 2 T6 1621 T12 131
valid_sources[0x6d] 36016 1 T8 5 T14 1 T103 5
valid_sources[0x6e] 34982 1 T3 6 T8 4 T6 1374
valid_sources[0x6f] 33709 1 T1 3 T8 4 T6 1094
valid_sources[0x70] 33175 1 T8 5 T6 1167 T12 127
valid_sources[0x71] 33846 1 T1 3 T8 3 T104 1
valid_sources[0x72] 34370 1 T8 8 T6 949 T12 131
valid_sources[0x73] 34840 1 T1 5 T8 5 T104 1
valid_sources[0x74] 34503 1 T3 2 T8 3 T6 1128
valid_sources[0x75] 34810 1 T8 3 T104 1 T6 1572
valid_sources[0x76] 34897 1 T3 3 T8 8 T6 1197
valid_sources[0x77] 36688 1 T8 4 T6 1365 T12 171
valid_sources[0x78] 34880 1 T1 2 T3 1 T8 5
valid_sources[0x79] 35312 1 T8 8 T6 1146 T12 116
valid_sources[0x7a] 35038 1 T1 1 T8 2 T6 1064
valid_sources[0x7b] 34599 1 T1 1 T8 6 T6 1878
valid_sources[0x7c] 37299 1 T5 1 T8 4 T103 3
valid_sources[0x7d] 35429 1 T1 2 T8 10 T103 4
valid_sources[0x7e] 35672 1 T8 8 T104 1 T6 1706
valid_sources[0x7f] 33985 1 T8 6 T6 783 T12 152
valid_sources[0x80] 34689 1 T8 4 T6 1375 T12 152



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 2215571 1 T1 40 T3 80 T5 10
values[0x0] all_enables biggest_size 3252297 1 T1 18 T3 37 T5 6
values[0x1] all_enables biggest_size 3245570 1 T1 22 T3 43 T5 4

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%