Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	7676550	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

7643823

1

T1

249

T2

5109

T3

4260

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	8890229	1			T1	999		T2	10217		T3	7841
values[0x0]	2445257	1			T1	156		T2	623		T3	656
values[0x1]	3984887	1			T1	138		T2	657		T3	684

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	4975791	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

10344582

1

T1

559

T2

6488

T3

5260

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	61332	1			T1	8		T2	61		T3	39
valid_sources[0x01]	61576	1			T1	7		T2	50		T3	53
valid_sources[0x02]	54180	1			T1	7		T2	47		T3	38
valid_sources[0x03]	59863	1			T1	4		T2	46		T3	37
valid_sources[0x04]	55909	1			T1	4		T2	53		T3	27
valid_sources[0x05]	54752	1			T1	5		T2	35		T3	29
valid_sources[0x06]	52563	1			T1	10		T2	53		T3	37
valid_sources[0x07]	67337	1			T1	4		T2	53		T3	36
valid_sources[0x08]	58849	1			T1	3		T2	37		T3	37
valid_sources[0x09]	54505	1			T1	5		T2	38		T3	41
valid_sources[0x0a]	61609	1			T1	3		T2	42		T3	40
valid_sources[0x0b]	53342	1			T1	4		T2	36		T3	32
valid_sources[0x0c]	60371	1			T1	5		T2	50		T3	21
valid_sources[0x0d]	53142	1			T1	11		T2	55		T3	26
valid_sources[0x0e]	54842	1			T1	5		T2	58		T3	39
valid_sources[0x0f]	62189	1			T1	2		T2	48		T3	35
valid_sources[0x10]	52891	1			T1	1		T2	47		T3	38
valid_sources[0x11]	130085	1			T1	5		T2	47		T3	28
valid_sources[0x12]	55439	1			T1	3		T2	37		T3	40
valid_sources[0x13]	56040	1			T1	2		T2	42		T3	48
valid_sources[0x14]	56841	1			T1	6		T2	34		T3	18
valid_sources[0x15]	75000	1			T1	10		T2	49		T3	34
valid_sources[0x16]	57593	1			T1	2		T2	51		T3	38
valid_sources[0x17]	54499	1			T1	4		T2	46		T3	45
valid_sources[0x18]	59298	1			T1	5		T2	53		T3	33
valid_sources[0x19]	58992	1			T1	2		T2	56		T3	65
valid_sources[0x1a]	62778	1			T1	1		T2	38		T3	28
valid_sources[0x1b]	60877	1			T1	7		T2	42		T3	37
valid_sources[0x1c]	54917	1			T1	5		T2	45		T3	40
valid_sources[0x1d]	61598	1			T1	6		T2	40		T3	27
valid_sources[0x1e]	58874	1			T1	4		T2	41		T3	42
valid_sources[0x1f]	57868	1			T1	4		T2	45		T3	50
valid_sources[0x20]	52101	1			T1	4		T2	49		T3	41
valid_sources[0x21]	54591	1			T1	1		T2	44		T3	42
valid_sources[0x22]	96066	1			T1	6		T2	41		T3	33
valid_sources[0x23]	58848	1			T1	2		T2	46		T3	43
valid_sources[0x24]	52214	1			T1	5		T2	39		T3	35
valid_sources[0x25]	58672	1			T1	9		T2	36		T3	32
valid_sources[0x26]	56163	1			T1	4		T2	46		T3	36
valid_sources[0x27]	64892	1			T1	5		T2	60		T3	29
valid_sources[0x28]	65388	1			T1	4		T2	56		T3	39
valid_sources[0x29]	62809	1			T1	6		T2	55		T3	32
valid_sources[0x2a]	61440	1			T1	6		T2	39		T3	25
valid_sources[0x2b]	53798	1			T1	2		T2	51		T3	34
valid_sources[0x2c]	59957	1			T1	1		T2	37		T3	39
valid_sources[0x2d]	58065	1			T1	1		T2	35		T3	39
valid_sources[0x2e]	58185	1			T1	2		T2	53		T3	22
valid_sources[0x2f]	51918	1			T1	9		T2	40		T3	31
valid_sources[0x30]	52965	1			T1	6		T2	45		T3	41
valid_sources[0x31]	56096	1			T1	4		T2	32		T3	40
valid_sources[0x32]	53333	1			T1	7		T2	41		T3	43
valid_sources[0x33]	56181	1			T1	6		T2	40		T3	44
valid_sources[0x34]	59319	1			T1	10		T2	45		T3	54
valid_sources[0x35]	163585	1			T1	6		T2	28		T3	26
valid_sources[0x36]	57692	1			T1	5		T2	47		T3	37
valid_sources[0x37]	60624	1			T1	4		T2	45		T3	40
valid_sources[0x38]	54214	1			T1	9		T2	38		T3	38
valid_sources[0x39]	52164	1			T1	3		T2	48		T3	33
valid_sources[0x3a]	58840	1			T1	2		T2	41		T3	34
valid_sources[0x3b]	72875	1			T1	3		T2	45		T3	35
valid_sources[0x3c]	55133	1			T1	5		T2	62		T3	34
valid_sources[0x3d]	85494	1			T1	7		T2	36		T3	35
valid_sources[0x3e]	51091	1			T1	5		T2	42		T3	38
valid_sources[0x3f]	52222	1			T1	4		T2	41		T3	24
valid_sources[0x40]	65091	1			T1	5		T2	39		T3	30
valid_sources[0x41]	59875	1			T1	6		T2	37		T3	27
valid_sources[0x42]	53454	1			T1	3		T2	34		T3	32
valid_sources[0x43]	56638	1			T1	9		T2	47		T3	44
valid_sources[0x44]	57296	1			T1	4		T2	47		T3	37
valid_sources[0x45]	58747	1			T1	3		T2	53		T3	37
valid_sources[0x46]	53549	1			T1	6		T2	46		T3	47
valid_sources[0x47]	52445	1			T1	2		T2	47		T3	36
valid_sources[0x48]	55462	1			T1	4		T2	46		T3	20
valid_sources[0x49]	51902	1			T1	10		T2	44		T3	30
valid_sources[0x4a]	52263	1			T1	3		T2	48		T3	38
valid_sources[0x4b]	53049	1			T1	3		T2	59		T3	33
valid_sources[0x4c]	66935	1			T1	4		T2	35		T3	31
valid_sources[0x4d]	55789	1			T1	5		T2	51		T3	38
valid_sources[0x4e]	56634	1			T1	10		T2	39		T3	33
valid_sources[0x4f]	62975	1			T1	2		T2	44		T3	35
valid_sources[0x50]	61930	1			T1	3		T2	48		T3	45
valid_sources[0x51]	53072	1			T1	6		T2	39		T3	35
valid_sources[0x52]	52905	1			T1	7		T2	39		T3	43
valid_sources[0x53]	56312	1			T1	3		T2	40		T3	38
valid_sources[0x54]	63878	1			T1	2		T2	46		T3	30
valid_sources[0x55]	54546	1			T1	1		T2	40		T3	32
valid_sources[0x56]	57481	1			T1	2		T2	48		T3	42
valid_sources[0x57]	53294	1			T1	3		T2	43		T3	38
valid_sources[0x58]	55493	1			T1	2		T2	50		T3	33
valid_sources[0x59]	53276	1			T1	8		T2	46		T3	53
valid_sources[0x5a]	59047	1			T1	8		T2	40		T3	39
valid_sources[0x5b]	62032	1			T1	9		T2	40		T3	36
valid_sources[0x5c]	58694	1			T1	3		T2	34		T3	62
valid_sources[0x5d]	58878	1			T1	3		T2	39		T3	42
valid_sources[0x5e]	56336	1			T1	5		T2	51		T3	36
valid_sources[0x5f]	53364	1			T1	5		T2	46		T3	24
valid_sources[0x60]	59168	1			T1	5		T2	57		T3	26
valid_sources[0x61]	55986	1			T1	6		T2	36		T3	34
valid_sources[0x62]	68719	1			T1	3		T2	54		T3	32
valid_sources[0x63]	55116	1			T1	6		T2	43		T3	37
valid_sources[0x64]	52321	1			T1	3		T2	44		T3	37
valid_sources[0x65]	55191	1			T1	2		T2	46		T3	37
valid_sources[0x66]	55665	1			T1	3		T2	50		T3	30
valid_sources[0x67]	51673	1			T1	4		T2	48		T3	33
valid_sources[0x68]	69330	1			T1	3		T2	41		T3	50
valid_sources[0x69]	55617	1			T1	6		T2	55		T3	31
valid_sources[0x6a]	60978	1			T1	9		T2	43		T3	39
valid_sources[0x6b]	66019	1			T1	11		T2	51		T3	42
valid_sources[0x6c]	105082	1			T1	5		T2	36		T3	30
valid_sources[0x6d]	52913	1			T1	8		T2	46		T3	39
valid_sources[0x6e]	67995	1			T1	9		T2	46		T3	39
valid_sources[0x6f]	56168	1			T1	3		T2	36		T3	31
valid_sources[0x70]	56132	1			T1	3		T2	46		T3	55
valid_sources[0x71]	77511	1			T1	6		T2	41		T3	45
valid_sources[0x72]	54449	1			T1	6		T2	32		T3	33
valid_sources[0x73]	58812	1			T1	2		T2	32		T3	35
valid_sources[0x74]	52142	1			T2	38		T3	30		T4	28
valid_sources[0x75]	55020	1			T1	7		T2	50		T3	29
valid_sources[0x76]	55165	1			T1	10		T2	50		T3	49
valid_sources[0x77]	59615	1			T1	2		T2	54		T3	32
valid_sources[0x78]	52474	1			T1	11		T2	38		T3	32
valid_sources[0x79]	51963	1			T1	2		T2	62		T3	41
valid_sources[0x7a]	65559	1			T1	5		T2	52		T3	27
valid_sources[0x7b]	63081	1			T1	5		T2	31		T3	34
valid_sources[0x7c]	53603	1			T1	4		T2	43		T3	40
valid_sources[0x7d]	66594	1			T1	3		T2	47		T3	34
valid_sources[0x7e]	54895	1			T1	5		T2	44		T3	44
valid_sources[0x7f]	65176	1			T1	2		T2	39		T3	27
valid_sources[0x80]	55642	1			T1	6		T2	37		T3	32

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

3667374

1

T1

127

T2

4617

T3

3642

values[0x0]

all_enables

biggest_size

2029052

1

T1

71

T2

297

T3

340

values[0x1]

all_enables

biggest_size

1947397

1

T1

51

T2

195

T3

278

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	263927	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

9515029

1

T2

180

T3

20

T4

180

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	2432959	1			T2	90		T3	10		T4	90
values[0x0]	3565354	1			T2	41		T3	4		T4	37
values[0x1]	3780643	1			T2	49		T3	6		T4	53

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	95276	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

9683680

1

T2

180

T3

20

T4

180

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	39201	1			T10	1		T17	8		T7	632
valid_sources[0x01]	38375	1			T17	8		T106	1		T7	570
valid_sources[0x02]	38914	1			T17	2		T106	2		T197	1
valid_sources[0x03]	38109	1			T17	6		T106	2		T29	1
valid_sources[0x04]	36589	1			T17	5		T29	1		T108	1
valid_sources[0x05]	37230	1			T4	180		T10	1		T17	2
valid_sources[0x06]	37280	1			T67	2		T17	7		T29	1
valid_sources[0x07]	38453	1			T10	1		T67	1		T17	5
valid_sources[0x08]	38104	1			T17	2		T106	1		T29	1
valid_sources[0x09]	38685	1			T10	1		T67	2		T17	3
valid_sources[0x0a]	39868	1			T17	2		T106	1		T7	746
valid_sources[0x0b]	37786	1			T10	2		T67	3		T116	2
valid_sources[0x0c]	37620	1			T108	1		T7	700		T261	1
valid_sources[0x0d]	36207	1			T10	1		T67	2		T17	5
valid_sources[0x0e]	37640	1			T17	4		T106	1		T7	221
valid_sources[0x0f]	36880	1			T17	2		T106	1		T108	1
valid_sources[0x10]	38123	1			T10	1		T116	6		T17	4
valid_sources[0x11]	36228	1			T17	6		T108	1		T7	231
valid_sources[0x12]	37668	1			T67	2		T106	7		T7	347
valid_sources[0x13]	36553	1			T10	1		T67	1		T17	2
valid_sources[0x14]	38326	1			T116	3		T17	3		T106	1
valid_sources[0x15]	39575	1			T17	7		T106	1		T111	5
valid_sources[0x16]	36990	1			T17	4		T197	1		T7	410
valid_sources[0x17]	36503	1			T17	4		T106	2		T29	1
valid_sources[0x18]	38950	1			T67	1		T17	4		T29	1
valid_sources[0x19]	39983	1			T67	1		T17	5		T29	1
valid_sources[0x1a]	39025	1			T17	13		T7	480		T261	3
valid_sources[0x1b]	35811	1			T17	13		T29	1		T108	2
valid_sources[0x1c]	38586	1			T116	1		T17	7		T106	2
valid_sources[0x1d]	37542	1			T17	2		T106	1		T197	1
valid_sources[0x1e]	37981	1			T17	8		T106	1		T108	1
valid_sources[0x1f]	38599	1			T17	2		T7	606		T13	706
valid_sources[0x20]	38491	1			T17	4		T106	1		T325	2
valid_sources[0x21]	39040	1			T17	6		T106	2		T108	1
valid_sources[0x22]	37794	1			T17	3		T108	1		T197	1
valid_sources[0x23]	38604	1			T10	1		T17	3		T106	1
valid_sources[0x24]	38646	1			T17	4		T106	1		T211	13
valid_sources[0x25]	38580	1			T10	1		T67	2		T17	4
valid_sources[0x26]	37129	1			T17	1		T211	10		T197	2
valid_sources[0x27]	40313	1			T67	3		T116	2		T17	2
valid_sources[0x28]	38909	1			T67	1		T17	5		T106	1
valid_sources[0x29]	38805	1			T67	4		T17	8		T29	1
valid_sources[0x2a]	38785	1			T17	4		T29	1		T325	1
valid_sources[0x2b]	37970	1			T17	12		T106	3		T107	20
valid_sources[0x2c]	37466	1			T10	1		T17	6		T106	2
valid_sources[0x2d]	37175	1			T67	1		T17	5		T197	1
valid_sources[0x2e]	37433	1			T17	9		T108	1		T211	7
valid_sources[0x2f]	37632	1			T10	1		T67	3		T17	2
valid_sources[0x30]	39051	1			T67	1		T17	4		T106	1
valid_sources[0x31]	38819	1			T17	2		T108	1		T197	1
valid_sources[0x32]	38376	1			T17	3		T108	1		T7	287
valid_sources[0x33]	38090	1			T17	5		T29	1		T108	1
valid_sources[0x34]	36916	1			T10	3		T17	10		T106	1
valid_sources[0x35]	37439	1			T17	10		T106	1		T29	1
valid_sources[0x36]	38229	1			T116	2		T17	5		T211	13
valid_sources[0x37]	38944	1			T116	3		T17	4		T106	1
valid_sources[0x38]	36916	1			T67	1		T17	1		T7	647
valid_sources[0x39]	39305	1			T17	2		T105	5		T29	2
valid_sources[0x3a]	36637	1			T67	1		T17	4		T197	2
valid_sources[0x3b]	39361	1			T17	2		T29	4		T108	1
valid_sources[0x3c]	40271	1			T67	1		T17	5		T106	2
valid_sources[0x3d]	37361	1			T5	3		T17	2		T106	2
valid_sources[0x3e]	39732	1			T17	7		T106	1		T29	2
valid_sources[0x3f]	39073	1			T67	1		T17	3		T106	1
valid_sources[0x40]	38324	1			T17	4		T29	1		T110	3
valid_sources[0x41]	37691	1			T17	4		T108	1		T7	457
valid_sources[0x42]	38571	1			T17	6		T197	1		T7	350
valid_sources[0x43]	39496	1			T17	5		T106	2		T108	1
valid_sources[0x44]	37505	1			T17	9		T7	192		T13	711
valid_sources[0x45]	38463	1			T67	1		T17	1		T29	1
valid_sources[0x46]	36773	1			T17	5		T106	1		T7	355
valid_sources[0x47]	38885	1			T17	7		T110	2		T7	321
valid_sources[0x48]	36734	1			T17	5		T108	1		T7	381
valid_sources[0x49]	40682	1			T17	3		T106	1		T7	567
valid_sources[0x4a]	39950	1			T17	4		T7	761		T13	712
valid_sources[0x4b]	38493	1			T10	1		T67	1		T116	2
valid_sources[0x4c]	38184	1			T67	2		T17	3		T29	1
valid_sources[0x4d]	39657	1			T17	3		T108	1		T325	3
valid_sources[0x4e]	36277	1			T17	5		T106	1		T7	348
valid_sources[0x4f]	38284	1			T17	2		T106	1		T7	579
valid_sources[0x50]	37369	1			T36	8		T67	1		T116	3
valid_sources[0x51]	38096	1			T17	3		T7	386		T13	736
valid_sources[0x52]	37854	1			T67	1		T17	5		T29	1
valid_sources[0x53]	37254	1			T10	1		T17	3		T29	1
valid_sources[0x54]	38284	1			T17	2		T108	2		T197	1
valid_sources[0x55]	38771	1			T17	2		T106	1		T7	486
valid_sources[0x56]	37654	1			T17	7		T108	1		T7	605
valid_sources[0x57]	36207	1			T28	120		T17	2		T106	1
valid_sources[0x58]	38683	1			T116	1		T17	4		T106	5
valid_sources[0x59]	38573	1			T116	2		T17	5		T29	1
valid_sources[0x5a]	36925	1			T67	1		T17	2		T105	4
valid_sources[0x5b]	39542	1			T36	3		T67	1		T116	1
valid_sources[0x5c]	37423	1			T10	2		T116	2		T17	6
valid_sources[0x5d]	36787	1			T17	8		T106	1		T108	1
valid_sources[0x5e]	37987	1			T67	1		T17	3		T7	427
valid_sources[0x5f]	38973	1			T116	1		T17	4		T106	2
valid_sources[0x60]	37529	1			T17	1		T106	1		T197	1
valid_sources[0x61]	37306	1			T17	7		T108	2		T7	377
valid_sources[0x62]	37807	1			T67	2		T17	3		T7	413
valid_sources[0x63]	37776	1			T17	6		T29	2		T7	315
valid_sources[0x64]	37215	1			T17	9		T7	238		T13	661
valid_sources[0x65]	38390	1			T67	1		T17	4		T29	1
valid_sources[0x66]	37143	1			T36	9		T17	6		T111	11
valid_sources[0x67]	39584	1			T67	1		T17	4		T106	1
valid_sources[0x68]	37844	1			T17	3		T29	1		T196	1
valid_sources[0x69]	37983	1			T17	6		T108	2		T211	2
valid_sources[0x6a]	40089	1			T17	2		T106	2		T29	1
valid_sources[0x6b]	36551	1			T67	1		T17	8		T108	1
valid_sources[0x6c]	37189	1			T17	6		T29	1		T108	1
valid_sources[0x6d]	36804	1			T67	1		T17	5		T105	1
valid_sources[0x6e]	39903	1			T17	9		T106	1		T197	1
valid_sources[0x6f]	37844	1			T67	2		T17	3		T29	1
valid_sources[0x70]	40288	1			T116	3		T17	6		T6	840
valid_sources[0x71]	37290	1			T67	1		T17	4		T106	2
valid_sources[0x72]	37128	1			T10	1		T36	3		T17	6
valid_sources[0x73]	40539	1			T17	6		T29	1		T197	2
valid_sources[0x74]	38249	1			T17	9		T108	2		T197	1
valid_sources[0x75]	39411	1			T67	1		T17	7		T108	1
valid_sources[0x76]	39011	1			T10	1		T17	6		T29	1
valid_sources[0x77]	39039	1			T17	7		T108	1		T7	586
valid_sources[0x78]	38247	1			T10	1		T67	1		T17	10
valid_sources[0x79]	37610	1			T17	2		T29	1		T108	2
valid_sources[0x7a]	37867	1			T17	1		T29	2		T197	1
valid_sources[0x7b]	39555	1			T17	2		T106	2		T29	2
valid_sources[0x7c]	39787	1			T10	3		T17	14		T29	1
valid_sources[0x7d]	38430	1			T67	1		T17	5		T29	3
valid_sources[0x7e]	38539	1			T10	1		T17	7		T29	1
valid_sources[0x7f]	37951	1			T67	1		T17	4		T196	1
valid_sources[0x80]	37028	1			T10	2		T116	4		T17	6

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

2419270

1

T2

90

T3

10

T4

90

values[0x0]

all_enables

biggest_size

3547259

1

T2

41

T3

4

T4

37

values[0x1]

all_enables

biggest_size

3548500

1

T2

49

T3

6

T4

53