Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	8115005	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

7836414

1

T1

36

T2

245

T3

688

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	9515959	1			T1	1		T2	761		T3	2108
values[0x0]	2455184	1			T1	70		T2	139		T3	94
values[0x1]	3980276	1			T1	70		T2	129		T3	123

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	5302379	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

10649040

1

T1

51

T2

445

T3

1133

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	66632	1			T2	5		T3	6		T4	437
valid_sources[0x01]	54694	1			T1	1		T2	1		T3	9
valid_sources[0x02]	56785	1			T2	3		T3	10		T4	427
valid_sources[0x03]	59542	1			T2	5		T3	10		T4	458
valid_sources[0x04]	60193	1			T1	1		T2	10		T3	9
valid_sources[0x05]	54743	1			T1	1		T2	2		T3	4
valid_sources[0x06]	64404	1			T1	2		T2	1		T3	7
valid_sources[0x07]	59856	1			T2	3		T3	5		T4	472
valid_sources[0x08]	55390	1			T2	7		T3	5		T4	441
valid_sources[0x09]	56667	1			T1	1		T2	5		T3	5
valid_sources[0x0a]	75179	1			T2	2		T3	5		T4	447
valid_sources[0x0b]	69670	1			T2	3		T3	3		T4	426
valid_sources[0x0c]	58488	1			T1	1		T2	5		T3	16
valid_sources[0x0d]	93010	1			T2	5		T3	3		T4	436
valid_sources[0x0e]	57849	1			T1	2		T2	5		T3	4
valid_sources[0x0f]	56102	1			T2	4		T3	1		T4	421
valid_sources[0x10]	60077	1			T2	3		T3	15		T4	430
valid_sources[0x11]	80225	1			T2	6		T3	9		T4	456
valid_sources[0x12]	58294	1			T2	1		T3	14		T4	445
valid_sources[0x13]	54265	1			T2	2		T3	12		T4	445
valid_sources[0x14]	59691	1			T1	3		T2	4		T3	2
valid_sources[0x15]	56339	1			T3	15		T4	446		T8	7
valid_sources[0x16]	110111	1			T1	4		T2	4		T3	8
valid_sources[0x17]	54616	1			T1	1		T2	3		T3	11
valid_sources[0x18]	59374	1			T1	1		T2	5		T3	4
valid_sources[0x19]	56042	1			T1	1		T3	15		T4	425
valid_sources[0x1a]	61075	1			T1	1		T2	4		T3	5
valid_sources[0x1b]	61007	1			T2	1		T3	16		T4	434
valid_sources[0x1c]	57169	1			T1	1		T2	7		T3	10
valid_sources[0x1d]	54732	1			T2	2		T3	5		T4	450
valid_sources[0x1e]	55679	1			T1	1		T2	6		T3	7
valid_sources[0x1f]	57612	1			T1	1		T2	6		T3	5
valid_sources[0x20]	93589	1			T2	4		T3	13		T4	465
valid_sources[0x21]	54604	1			T1	1		T2	5		T3	11
valid_sources[0x22]	56351	1			T1	1		T2	6		T3	5
valid_sources[0x23]	61970	1			T2	4		T3	9		T4	462
valid_sources[0x24]	68668	1			T2	4		T3	6		T4	462
valid_sources[0x25]	56863	1			T1	1		T2	2		T3	3
valid_sources[0x26]	55738	1			T2	5		T3	5		T4	432
valid_sources[0x27]	61229	1			T1	1		T2	6		T3	4
valid_sources[0x28]	55017	1			T2	3		T3	8		T4	424
valid_sources[0x29]	53882	1			T2	6		T3	11		T4	430
valid_sources[0x2a]	69599	1			T1	1		T2	3		T3	21
valid_sources[0x2b]	54865	1			T1	1		T2	3		T3	6
valid_sources[0x2c]	61554	1			T2	3		T3	3		T4	436
valid_sources[0x2d]	56073	1			T1	1		T2	6		T3	20
valid_sources[0x2e]	53853	1			T2	3		T3	9		T4	426
valid_sources[0x2f]	60859	1			T1	2		T2	5		T3	10
valid_sources[0x30]	60189	1			T1	1		T2	5		T3	9
valid_sources[0x31]	73238	1			T2	2		T3	19		T4	435
valid_sources[0x32]	54274	1			T2	2		T3	3		T4	403
valid_sources[0x33]	58413	1			T1	2		T2	3		T3	8
valid_sources[0x34]	59333	1			T2	2		T3	5		T4	485
valid_sources[0x35]	56207	1			T1	1		T3	4		T4	439
valid_sources[0x36]	55130	1			T2	1		T3	6		T4	433
valid_sources[0x37]	66149	1			T2	2		T3	15		T4	441
valid_sources[0x38]	57195	1			T1	3		T2	2		T3	10
valid_sources[0x39]	57109	1			T2	3		T3	10		T4	396
valid_sources[0x3a]	57200	1			T1	1		T2	4		T3	9
valid_sources[0x3b]	58992	1			T3	10		T4	406		T8	3
valid_sources[0x3c]	61434	1			T1	2		T2	5		T3	7
valid_sources[0x3d]	75073	1			T2	4		T3	8		T4	426
valid_sources[0x3e]	68622	1			T1	1		T2	3		T3	10
valid_sources[0x3f]	53599	1			T2	1		T3	5		T4	406
valid_sources[0x40]	55893	1			T2	5		T3	4		T4	416
valid_sources[0x41]	56721	1			T1	1		T2	1		T3	8
valid_sources[0x42]	56962	1			T1	1		T2	5		T3	6
valid_sources[0x43]	107067	1			T1	2		T2	6		T3	11
valid_sources[0x44]	66627	1			T2	3		T3	12		T4	471
valid_sources[0x45]	57371	1			T2	3		T3	11		T4	438
valid_sources[0x46]	56153	1			T2	7		T3	2		T4	449
valid_sources[0x47]	55428	1			T1	1		T2	4		T3	5
valid_sources[0x48]	67111	1			T2	5		T3	10		T4	434
valid_sources[0x49]	55557	1			T1	1		T2	1		T3	13
valid_sources[0x4a]	58512	1			T2	4		T3	8		T4	423
valid_sources[0x4b]	70012	1			T2	6		T3	1		T4	425
valid_sources[0x4c]	55250	1			T2	6		T3	12		T4	430
valid_sources[0x4d]	65772	1			T2	2		T3	9		T4	501
valid_sources[0x4e]	55645	1			T2	5		T3	12		T4	476
valid_sources[0x4f]	54243	1			T2	4		T3	13		T4	443
valid_sources[0x50]	53197	1			T2	1		T3	13		T4	443
valid_sources[0x51]	56432	1			T1	1		T2	5		T3	7
valid_sources[0x52]	53446	1			T2	4		T3	21		T4	422
valid_sources[0x53]	78885	1			T2	1		T3	6		T4	434
valid_sources[0x54]	56537	1			T2	6		T3	10		T4	453
valid_sources[0x55]	60207	1			T2	7		T3	8		T4	426
valid_sources[0x56]	56978	1			T2	5		T3	20		T4	463
valid_sources[0x57]	61979	1			T1	4		T2	3		T3	5
valid_sources[0x58]	56472	1			T2	4		T3	5		T4	473
valid_sources[0x59]	65317	1			T2	6		T3	2		T4	425
valid_sources[0x5a]	62274	1			T2	7		T3	3		T4	435
valid_sources[0x5b]	56491	1			T2	4		T3	7		T4	462
valid_sources[0x5c]	65489	1			T2	5		T3	4		T4	420
valid_sources[0x5d]	56657	1			T2	3		T3	16		T4	416
valid_sources[0x5e]	56008	1			T2	10		T3	8		T4	425
valid_sources[0x5f]	53505	1			T2	1		T3	9		T4	445
valid_sources[0x60]	56176	1			T2	3		T3	19		T4	464
valid_sources[0x61]	57010	1			T2	4		T3	8		T4	414
valid_sources[0x62]	55070	1			T1	1		T2	5		T3	14
valid_sources[0x63]	55381	1			T2	2		T3	12		T4	443
valid_sources[0x64]	57169	1			T1	1		T2	1		T3	5
valid_sources[0x65]	60126	1			T1	1		T2	3		T3	4
valid_sources[0x66]	67383	1			T1	1		T2	4		T3	6
valid_sources[0x67]	68451	1			T2	3		T3	7		T4	436
valid_sources[0x68]	68314	1			T2	1		T3	2		T4	454
valid_sources[0x69]	75528	1			T2	6		T3	14		T4	464
valid_sources[0x6a]	166541	1			T1	1		T2	4		T3	13
valid_sources[0x6b]	60641	1			T2	7		T3	3		T4	459
valid_sources[0x6c]	57248	1			T1	5		T2	3		T3	10
valid_sources[0x6d]	58427	1			T2	9		T3	6		T4	464
valid_sources[0x6e]	64988	1			T2	3		T3	4		T4	478
valid_sources[0x6f]	55983	1			T1	1		T2	3		T3	1
valid_sources[0x70]	54899	1			T2	3		T3	9		T4	415
valid_sources[0x71]	64223	1			T1	3		T2	4		T3	6
valid_sources[0x72]	64328	1			T1	1		T2	4		T3	32
valid_sources[0x73]	62743	1			T2	4		T3	9		T4	456
valid_sources[0x74]	58129	1			T2	4		T3	7		T4	421
valid_sources[0x75]	61677	1			T2	4		T3	18		T4	431
valid_sources[0x76]	74691	1			T2	5		T3	9		T4	420
valid_sources[0x77]	55046	1			T2	1		T3	6		T4	398
valid_sources[0x78]	54720	1			T2	3		T3	4		T4	425
valid_sources[0x79]	63119	1			T1	1		T2	3		T3	5
valid_sources[0x7a]	59044	1			T1	1		T2	9		T3	16
valid_sources[0x7b]	54755	1			T1	1		T2	4		T3	10
valid_sources[0x7c]	66665	1			T2	3		T3	6		T4	462
valid_sources[0x7d]	56940	1			T2	6		T3	9		T4	448
valid_sources[0x7e]	61665	1			T2	7		T3	10		T4	459
valid_sources[0x7f]	59282	1			T2	3		T3	3		T4	423
valid_sources[0x80]	58208	1			T2	3		T3	11		T4	429

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

3856086

1

T1

1

T2

118

T3

608

values[0x0]

all_enables

biggest_size

2032754

1

T1

22

T2

76

T3

47

values[0x1]

all_enables

biggest_size

1947574

1

T1

13

T2

51

T3

33

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	261057	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

9481319

1

T3

120

T4

94868

T5

40

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	2428819	1			T3	60		T4	23995		T5	20
values[0x0]	3552245	1			T3	23		T4	35647		T5	8
values[0x1]	3761312	1			T3	37		T4	37730		T5	12

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	94367	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

9648009

1

T3

120

T4

96508

T5

40

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	37986	1			T4	358		T10	1		T6	79
valid_sources[0x01]	36982	1			T4	344		T10	1		T6	73
valid_sources[0x02]	38324	1			T4	394		T6	74		T87	1
valid_sources[0x03]	37855	1			T4	417		T6	69		T98	1
valid_sources[0x04]	36739	1			T4	384		T6	63		T99	4
valid_sources[0x05]	38443	1			T4	386		T15	1		T6	69
valid_sources[0x06]	39283	1			T3	2		T4	390		T10	1
valid_sources[0x07]	39670	1			T4	381		T6	76		T98	1
valid_sources[0x08]	38952	1			T3	1		T4	344		T6	70
valid_sources[0x09]	39194	1			T4	371		T10	3		T6	65
valid_sources[0x0a]	37599	1			T3	5		T4	397		T6	79
valid_sources[0x0b]	39412	1			T4	425		T10	2		T6	76
valid_sources[0x0c]	37674	1			T4	377		T10	2		T6	54
valid_sources[0x0d]	39928	1			T3	3		T4	367		T6	71
valid_sources[0x0e]	38068	1			T3	3		T4	396		T6	75
valid_sources[0x0f]	39592	1			T4	386		T6	78		T98	1
valid_sources[0x10]	38573	1			T3	1		T4	392		T6	83
valid_sources[0x11]	38616	1			T4	378		T5	1		T10	2
valid_sources[0x12]	38338	1			T4	398		T5	1		T10	2
valid_sources[0x13]	37815	1			T4	398		T5	1		T6	63
valid_sources[0x14]	38046	1			T4	365		T10	1		T6	60
valid_sources[0x15]	36828	1			T4	376		T5	5		T6	71
valid_sources[0x16]	37797	1			T4	383		T6	70		T98	3
valid_sources[0x17]	39120	1			T4	435		T6	86		T98	3
valid_sources[0x18]	37922	1			T4	374		T10	4		T6	78
valid_sources[0x19]	38577	1			T4	388		T6	72		T98	1
valid_sources[0x1a]	37997	1			T3	1		T4	383		T6	75
valid_sources[0x1b]	39007	1			T4	368		T6	69		T99	2
valid_sources[0x1c]	37907	1			T4	374		T6	86		T90	1
valid_sources[0x1d]	39052	1			T4	384		T6	89		T7	62
valid_sources[0x1e]	38547	1			T3	1		T4	373		T5	1
valid_sources[0x1f]	39130	1			T4	389		T10	2		T6	81
valid_sources[0x20]	37363	1			T4	386		T10	2		T15	13
valid_sources[0x21]	36025	1			T4	374		T10	1		T6	76
valid_sources[0x22]	37694	1			T4	360		T10	1		T6	78
valid_sources[0x23]	36911	1			T3	2		T4	424		T6	74
valid_sources[0x24]	37911	1			T4	387		T10	1		T6	81
valid_sources[0x25]	36563	1			T4	351		T6	79		T99	3
valid_sources[0x26]	38994	1			T4	362		T6	57		T99	2
valid_sources[0x27]	37024	1			T4	375		T10	3		T6	75
valid_sources[0x28]	39155	1			T3	1		T4	345		T10	1
valid_sources[0x29]	37760	1			T3	3		T4	365		T10	1
valid_sources[0x2a]	38226	1			T4	367		T10	2		T6	84
valid_sources[0x2b]	38728	1			T3	1		T4	394		T6	72
valid_sources[0x2c]	38075	1			T4	407		T6	66		T87	3
valid_sources[0x2d]	36914	1			T4	383		T6	58		T87	1
valid_sources[0x2e]	38332	1			T4	376		T6	73		T98	2
valid_sources[0x2f]	38128	1			T4	372		T10	4		T6	72
valid_sources[0x30]	37976	1			T3	2		T4	385		T6	65
valid_sources[0x31]	38469	1			T4	388		T6	60		T98	1
valid_sources[0x32]	38000	1			T3	1		T4	424		T6	82
valid_sources[0x33]	38263	1			T3	2		T4	380		T6	61
valid_sources[0x34]	38215	1			T3	2		T4	366		T15	3
valid_sources[0x35]	37179	1			T3	1		T4	390		T10	1
valid_sources[0x36]	37891	1			T3	1		T4	372		T6	58
valid_sources[0x37]	38291	1			T3	1		T4	399		T10	1
valid_sources[0x38]	38733	1			T4	410		T6	58		T89	2
valid_sources[0x39]	38851	1			T4	375		T5	1		T6	65
valid_sources[0x3a]	38289	1			T3	1		T4	376		T5	2
valid_sources[0x3b]	36155	1			T4	378		T6	84		T87	1
valid_sources[0x3c]	40804	1			T4	400		T6	66		T90	1
valid_sources[0x3d]	36815	1			T4	411		T6	72		T101	1
valid_sources[0x3e]	38127	1			T4	388		T6	62		T98	2
valid_sources[0x3f]	38912	1			T4	408		T5	2		T6	80
valid_sources[0x40]	37436	1			T4	428		T6	72		T98	2
valid_sources[0x41]	37521	1			T4	387		T10	1		T15	2
valid_sources[0x42]	38827	1			T4	378		T5	1		T6	71
valid_sources[0x43]	38358	1			T4	375		T10	5		T6	82
valid_sources[0x44]	37307	1			T4	380		T6	85		T87	2
valid_sources[0x45]	38022	1			T3	1		T4	385		T6	52
valid_sources[0x46]	38402	1			T4	406		T10	1		T6	75
valid_sources[0x47]	36812	1			T4	396		T5	1		T6	68
valid_sources[0x48]	38787	1			T4	363		T6	81		T7	71
valid_sources[0x49]	35916	1			T4	364		T10	5		T6	74
valid_sources[0x4a]	37817	1			T4	362		T5	1		T10	1
valid_sources[0x4b]	38353	1			T4	363		T6	67		T89	1
valid_sources[0x4c]	37151	1			T4	382		T15	1		T6	85
valid_sources[0x4d]	38693	1			T4	392		T10	6		T6	80
valid_sources[0x4e]	37227	1			T4	383		T10	4		T6	73
valid_sources[0x4f]	37211	1			T3	1		T4	390		T10	3
valid_sources[0x50]	38898	1			T3	2		T4	374		T10	1
valid_sources[0x51]	38702	1			T4	356		T6	89		T98	2
valid_sources[0x52]	39838	1			T4	396		T6	69		T98	1
valid_sources[0x53]	37536	1			T4	351		T10	2		T6	77
valid_sources[0x54]	38360	1			T3	2		T4	332		T15	2
valid_sources[0x55]	37997	1			T4	395		T10	1		T6	71
valid_sources[0x56]	38051	1			T3	2		T4	353		T6	69
valid_sources[0x57]	35697	1			T3	1		T4	375		T6	53
valid_sources[0x58]	37924	1			T3	1		T4	371		T15	2
valid_sources[0x59]	37281	1			T4	376		T10	2		T6	83
valid_sources[0x5a]	35835	1			T4	390		T6	68		T98	1
valid_sources[0x5b]	37896	1			T3	1		T4	397		T6	72
valid_sources[0x5c]	38212	1			T4	397		T10	2		T6	71
valid_sources[0x5d]	39855	1			T4	379		T6	66		T98	1
valid_sources[0x5e]	37492	1			T4	381		T6	67		T89	1
valid_sources[0x5f]	35546	1			T4	431		T10	1		T15	3
valid_sources[0x60]	37651	1			T4	401		T6	76		T87	1
valid_sources[0x61]	37972	1			T4	393		T10	1		T15	6
valid_sources[0x62]	36052	1			T3	1		T4	392		T5	1
valid_sources[0x63]	37335	1			T4	376		T10	4		T6	63
valid_sources[0x64]	38583	1			T3	2		T4	408		T10	2
valid_sources[0x65]	38510	1			T3	1		T4	384		T6	70
valid_sources[0x66]	37768	1			T4	362		T6	79		T98	2
valid_sources[0x67]	38192	1			T4	411		T10	1		T6	78
valid_sources[0x68]	38505	1			T4	346		T6	68		T98	2
valid_sources[0x69]	39466	1			T3	1		T4	412		T10	2
valid_sources[0x6a]	38342	1			T4	372		T6	81		T7	66
valid_sources[0x6b]	37807	1			T4	359		T6	81		T63	17
valid_sources[0x6c]	36297	1			T4	346		T6	72		T98	3
valid_sources[0x6d]	39694	1			T4	375		T15	1		T6	58
valid_sources[0x6e]	37596	1			T4	375		T5	1		T10	1
valid_sources[0x6f]	36462	1			T3	1		T4	381		T6	82
valid_sources[0x70]	37397	1			T4	378		T10	1		T6	70
valid_sources[0x71]	39131	1			T3	3		T4	367		T5	1
valid_sources[0x72]	37289	1			T3	2		T4	379		T6	74
valid_sources[0x73]	38312	1			T3	1		T4	374		T6	68
valid_sources[0x74]	37267	1			T4	369		T15	2		T6	71
valid_sources[0x75]	37792	1			T4	365		T6	74		T98	2
valid_sources[0x76]	38734	1			T4	380		T10	6		T15	2
valid_sources[0x77]	39582	1			T4	353		T10	2		T6	63
valid_sources[0x78]	37584	1			T4	367		T6	65		T87	1
valid_sources[0x79]	37874	1			T4	371		T6	72		T98	1
valid_sources[0x7a]	38886	1			T4	418		T6	71		T87	1
valid_sources[0x7b]	36364	1			T4	336		T10	2		T6	70
valid_sources[0x7c]	38347	1			T4	361		T10	2		T15	3
valid_sources[0x7d]	39151	1			T4	387		T10	1		T6	66
valid_sources[0x7e]	39070	1			T4	371		T6	78		T99	1
valid_sources[0x7f]	39324	1			T4	378		T6	67		T98	2
valid_sources[0x80]	36405	1			T4	377		T10	2		T6	78

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

2415072

1

T3

60

T4

23952

T5

20

values[0x0]

all_enables

biggest_size

3534462

1

T3

23

T4

35471

T5

8

values[0x1]

all_enables

biggest_size

3531785

1

T3

37

T4

35445

T5

12