Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	7381654	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

7197525

1

T1

209

T2

53354

T3

6321

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	8537998	1			T1	668		T2	21198		T3	15975
values[0x0]	2304721	1			T1	114		T2	20887		T3	707
values[0x1]	3736460	1			T1	113		T2	38508		T3	665

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	4806253	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

9772926

1

T1

397

T2

68600

T3

8972

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	52855	1			T1	3		T2	361		T3	41
valid_sources[0x01]	52767	1			T1	1		T2	220		T3	63
valid_sources[0x02]	47582	1			T1	8		T2	228		T3	59
valid_sources[0x03]	56528	1			T1	13		T2	370		T3	57
valid_sources[0x04]	48017	1			T1	18		T2	372		T3	77
valid_sources[0x05]	91251	1			T1	11		T2	288		T3	80
valid_sources[0x06]	69345	1			T1	1		T2	177		T3	67
valid_sources[0x07]	48354	1			T1	4		T2	290		T3	71
valid_sources[0x08]	60470	1			T2	397		T3	79		T4	391
valid_sources[0x09]	54823	1			T1	6		T2	256		T3	74
valid_sources[0x0a]	51616	1			T2	296		T3	72		T4	1358
valid_sources[0x0b]	51010	1			T2	310		T3	73		T4	92
valid_sources[0x0c]	47620	1			T1	4		T2	378		T3	77
valid_sources[0x0d]	54932	1			T2	231		T3	75		T4	237
valid_sources[0x0e]	61874	1			T2	377		T3	84		T4	356
valid_sources[0x0f]	48192	1			T2	235		T3	61		T4	160
valid_sources[0x10]	54583	1			T1	16		T2	392		T3	65
valid_sources[0x11]	50406	1			T1	6		T2	281		T3	64
valid_sources[0x12]	51555	1			T2	374		T3	67		T4	407
valid_sources[0x13]	59101	1			T1	6		T2	366		T3	68
valid_sources[0x14]	66112	1			T2	268		T3	67		T4	930
valid_sources[0x15]	50058	1			T2	343		T3	68		T4	297
valid_sources[0x16]	57249	1			T1	3		T2	331		T3	80
valid_sources[0x17]	65812	1			T1	1		T2	268		T3	66
valid_sources[0x18]	68424	1			T2	220		T3	64		T4	485
valid_sources[0x19]	52838	1			T2	478		T3	58		T4	341
valid_sources[0x1a]	60669	1			T2	200		T3	58		T4	293
valid_sources[0x1b]	56890	1			T2	252		T3	68		T4	192
valid_sources[0x1c]	64777	1			T1	15		T2	390		T3	63
valid_sources[0x1d]	52522	1			T2	346		T3	74		T4	168
valid_sources[0x1e]	62595	1			T1	9		T2	342		T3	61
valid_sources[0x1f]	50831	1			T2	272		T3	65		T4	324
valid_sources[0x20]	51654	1			T2	201		T3	73		T4	600
valid_sources[0x21]	52592	1			T1	2		T2	314		T3	75
valid_sources[0x22]	50166	1			T1	4		T2	483		T3	70
valid_sources[0x23]	59282	1			T1	17		T2	321		T3	64
valid_sources[0x24]	56243	1			T1	1		T2	446		T3	81
valid_sources[0x25]	49332	1			T1	2		T2	230		T3	49
valid_sources[0x26]	53089	1			T2	275		T3	64		T4	468
valid_sources[0x27]	54950	1			T1	15		T2	361		T3	61
valid_sources[0x28]	48822	1			T1	21		T2	333		T3	70
valid_sources[0x29]	49129	1			T2	301		T3	64		T4	303
valid_sources[0x2a]	54283	1			T1	2		T2	248		T3	56
valid_sources[0x2b]	57412	1			T2	256		T3	79		T4	404
valid_sources[0x2c]	49955	1			T1	13		T2	268		T3	76
valid_sources[0x2d]	51617	1			T1	9		T2	396		T3	77
valid_sources[0x2e]	55414	1			T1	5		T2	297		T3	70
valid_sources[0x2f]	48003	1			T2	315		T3	58		T4	234
valid_sources[0x30]	57853	1			T1	6		T2	468		T3	69
valid_sources[0x31]	54410	1			T2	319		T3	58		T4	212
valid_sources[0x32]	51626	1			T1	6		T2	305		T3	63
valid_sources[0x33]	54558	1			T1	4		T2	309		T3	55
valid_sources[0x34]	53452	1			T1	3		T2	284		T3	88
valid_sources[0x35]	49383	1			T1	5		T2	273		T3	70
valid_sources[0x36]	53213	1			T1	1		T2	349		T3	68
valid_sources[0x37]	53725	1			T2	279		T3	59		T4	284
valid_sources[0x38]	51849	1			T1	5		T2	369		T3	78
valid_sources[0x39]	56035	1			T1	2		T2	345		T3	66
valid_sources[0x3a]	53333	1			T2	375		T3	69		T4	2050
valid_sources[0x3b]	51243	1			T2	471		T3	75		T4	203
valid_sources[0x3c]	49229	1			T2	287		T3	69		T4	385
valid_sources[0x3d]	54794	1			T2	338		T3	54		T4	1036
valid_sources[0x3e]	57196	1			T1	3		T2	348		T3	73
valid_sources[0x3f]	67944	1			T2	315		T3	62		T4	86
valid_sources[0x40]	62510	1			T1	6		T2	356		T3	79
valid_sources[0x41]	49141	1			T2	316		T3	69		T4	961
valid_sources[0x42]	47929	1			T2	302		T3	67		T4	168
valid_sources[0x43]	54814	1			T1	9		T2	231		T3	61
valid_sources[0x44]	54898	1			T2	377		T3	75		T4	296
valid_sources[0x45]	49981	1			T2	276		T3	76		T4	374
valid_sources[0x46]	48685	1			T1	1		T2	238		T3	66
valid_sources[0x47]	52840	1			T1	6		T2	351		T3	83
valid_sources[0x48]	49423	1			T2	348		T3	93		T4	129
valid_sources[0x49]	117692	1			T1	4		T2	347		T3	63
valid_sources[0x4a]	97175	1			T1	3		T2	321		T3	62
valid_sources[0x4b]	52783	1			T2	223		T3	73		T4	412
valid_sources[0x4c]	50234	1			T2	260		T3	61		T4	426
valid_sources[0x4d]	51084	1			T1	23		T2	318		T3	85
valid_sources[0x4e]	55649	1			T2	288		T3	70		T4	203
valid_sources[0x4f]	50272	1			T1	21		T2	430		T3	71
valid_sources[0x50]	51496	1			T2	588		T3	71		T4	105
valid_sources[0x51]	59784	1			T1	2		T2	346		T3	70
valid_sources[0x52]	52032	1			T1	4		T2	465		T3	74
valid_sources[0x53]	54990	1			T1	7		T2	187		T3	56
valid_sources[0x54]	48593	1			T1	4		T2	292		T3	54
valid_sources[0x55]	70525	1			T2	287		T3	62		T4	254
valid_sources[0x56]	52955	1			T1	24		T2	339		T3	74
valid_sources[0x57]	49995	1			T2	217		T3	65		T4	299
valid_sources[0x58]	54121	1			T1	2		T2	284		T3	71
valid_sources[0x59]	48690	1			T2	248		T3	75		T4	275
valid_sources[0x5a]	47316	1			T2	349		T3	77		T4	119
valid_sources[0x5b]	55555	1			T1	6		T2	256		T3	69
valid_sources[0x5c]	50188	1			T2	308		T3	63		T4	501
valid_sources[0x5d]	47940	1			T2	333		T3	60		T4	350
valid_sources[0x5e]	72045	1			T1	7		T2	436		T3	80
valid_sources[0x5f]	62954	1			T1	17		T2	273		T3	70
valid_sources[0x60]	51856	1			T1	1		T2	361		T3	63
valid_sources[0x61]	101566	1			T1	10		T2	270		T3	61
valid_sources[0x62]	49749	1			T1	3		T2	238		T3	53
valid_sources[0x63]	55690	1			T1	10		T2	288		T3	70
valid_sources[0x64]	48662	1			T2	280		T3	78		T4	846
valid_sources[0x65]	54606	1			T1	2		T2	246		T3	69
valid_sources[0x66]	67012	1			T1	3		T2	236		T3	67
valid_sources[0x67]	57143	1			T2	275		T3	82		T4	364
valid_sources[0x68]	50557	1			T2	470		T3	67		T4	408
valid_sources[0x69]	53017	1			T2	296		T3	87		T4	294
valid_sources[0x6a]	51300	1			T2	209		T3	77		T4	143
valid_sources[0x6b]	51537	1			T1	3		T2	230		T3	56
valid_sources[0x6c]	49847	1			T1	3		T2	279		T3	75
valid_sources[0x6d]	52525	1			T1	6		T2	252		T3	69
valid_sources[0x6e]	58411	1			T2	281		T3	64		T4	1788
valid_sources[0x6f]	49170	1			T2	258		T3	51		T4	186
valid_sources[0x70]	52385	1			T1	1		T2	357		T3	74
valid_sources[0x71]	50985	1			T1	1		T2	230		T3	97
valid_sources[0x72]	52704	1			T2	336		T3	59		T4	723
valid_sources[0x73]	50760	1			T1	6		T2	370		T3	52
valid_sources[0x74]	65047	1			T2	405		T3	63		T4	201
valid_sources[0x75]	52508	1			T2	344		T3	69		T4	345
valid_sources[0x76]	50877	1			T1	1		T2	221		T3	73
valid_sources[0x77]	55335	1			T1	2		T2	305		T3	70
valid_sources[0x78]	49274	1			T2	560		T3	71		T4	61
valid_sources[0x79]	52734	1			T2	323		T3	74		T4	283
valid_sources[0x7a]	57754	1			T1	6		T2	340		T3	84
valid_sources[0x7b]	52496	1			T2	393		T3	82		T4	227
valid_sources[0x7c]	55619	1			T1	9		T2	366		T3	61
valid_sources[0x7d]	63790	1			T1	3		T2	196		T3	60
valid_sources[0x7e]	52226	1			T1	6		T2	249		T3	62
valid_sources[0x7f]	52494	1			T1	1		T2	289		T3	57
valid_sources[0x80]	61869	1			T2	405		T3	85		T4	926

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

3480163

1

T1

111

T2

15298

T3

5821

values[0x0]

all_enables

biggest_size

1899113

1

T1

55

T2

19088

T3

314

values[0x1]

all_enables

biggest_size

1818249

1

T1

43

T2

18968

T3

186

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	245732	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

8935778

1

T2

100553

T3

200

T4

99456

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	2283449	1			T2	25508		T3	100		T4	25118
values[0x0]	3352500	1			T2	37695		T3	49		T4	37495
values[0x1]	3545561	1			T2	40368		T3	51		T4	39493

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	88721	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

9092789

1

T2

102537

T3

200

T4

101214

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	34233	1			T2	418		T4	290		T6	668
valid_sources[0x01]	37318	1			T2	398		T4	411		T6	703
valid_sources[0x02]	34684	1			T2	421		T4	344		T6	711
valid_sources[0x03]	35853	1			T2	409		T4	372		T6	682
valid_sources[0x04]	36604	1			T2	422		T4	484		T6	639
valid_sources[0x05]	37134	1			T2	416		T4	460		T6	614
valid_sources[0x06]	35946	1			T2	409		T4	398		T6	717
valid_sources[0x07]	35542	1			T2	400		T4	366		T6	606
valid_sources[0x08]	35397	1			T2	432		T4	437		T6	720
valid_sources[0x09]	35804	1			T2	427		T4	314		T6	596
valid_sources[0x0a]	34472	1			T2	404		T4	302		T6	630
valid_sources[0x0b]	33378	1			T2	407		T4	474		T6	722
valid_sources[0x0c]	36066	1			T2	359		T4	468		T6	663
valid_sources[0x0d]	35412	1			T2	404		T4	376		T6	624
valid_sources[0x0e]	36400	1			T2	386		T4	452		T6	646
valid_sources[0x0f]	34546	1			T2	408		T4	385		T6	665
valid_sources[0x10]	36562	1			T2	410		T4	369		T6	683
valid_sources[0x11]	35725	1			T2	388		T4	402		T6	674
valid_sources[0x12]	35409	1			T2	403		T4	393		T6	735
valid_sources[0x13]	36415	1			T2	368		T4	436		T6	664
valid_sources[0x14]	35324	1			T2	437		T4	384		T6	704
valid_sources[0x15]	36509	1			T2	375		T4	415		T6	701
valid_sources[0x16]	37691	1			T2	417		T4	365		T6	690
valid_sources[0x17]	36090	1			T2	382		T4	353		T6	708
valid_sources[0x18]	34958	1			T2	409		T4	334		T6	742
valid_sources[0x19]	34279	1			T2	424		T4	522		T6	798
valid_sources[0x1a]	35701	1			T2	390		T4	376		T6	778
valid_sources[0x1b]	36961	1			T2	409		T4	481		T6	725
valid_sources[0x1c]	35289	1			T2	382		T4	446		T6	703
valid_sources[0x1d]	36260	1			T2	409		T4	407		T6	649
valid_sources[0x1e]	37216	1			T2	451		T4	477		T6	639
valid_sources[0x1f]	36072	1			T2	440		T4	319		T6	683
valid_sources[0x20]	35479	1			T2	450		T4	411		T6	753
valid_sources[0x21]	34966	1			T2	427		T4	439		T6	700
valid_sources[0x22]	37118	1			T2	411		T4	319		T6	654
valid_sources[0x23]	35091	1			T2	424		T4	346		T6	607
valid_sources[0x24]	34342	1			T2	413		T4	401		T6	764
valid_sources[0x25]	33976	1			T2	411		T4	437		T6	701
valid_sources[0x26]	36779	1			T2	422		T4	395		T6	684
valid_sources[0x27]	35776	1			T2	379		T4	400		T6	727
valid_sources[0x28]	34465	1			T2	393		T4	373		T6	773
valid_sources[0x29]	35616	1			T2	412		T4	380		T6	724
valid_sources[0x2a]	36168	1			T2	424		T4	415		T6	800
valid_sources[0x2b]	35629	1			T2	415		T4	411		T6	646
valid_sources[0x2c]	36160	1			T2	456		T4	440		T6	740
valid_sources[0x2d]	36700	1			T2	371		T4	508		T6	668
valid_sources[0x2e]	36722	1			T2	429		T4	489		T6	706
valid_sources[0x2f]	36024	1			T2	449		T4	314		T6	674
valid_sources[0x30]	36325	1			T2	416		T4	430		T6	668
valid_sources[0x31]	35620	1			T2	444		T4	308		T6	649
valid_sources[0x32]	36698	1			T2	386		T4	546		T6	680
valid_sources[0x33]	35717	1			T2	353		T4	389		T6	690
valid_sources[0x34]	38815	1			T2	407		T4	395		T6	696
valid_sources[0x35]	37503	1			T2	421		T4	421		T6	690
valid_sources[0x36]	35927	1			T2	409		T4	381		T6	703
valid_sources[0x37]	36959	1			T2	398		T4	487		T6	679
valid_sources[0x38]	38036	1			T2	437		T4	376		T6	670
valid_sources[0x39]	37077	1			T2	390		T4	444		T6	775
valid_sources[0x3a]	35610	1			T2	424		T4	425		T6	647
valid_sources[0x3b]	34234	1			T2	397		T4	352		T6	652
valid_sources[0x3c]	34895	1			T2	429		T4	420		T6	685
valid_sources[0x3d]	34426	1			T2	379		T4	369		T6	631
valid_sources[0x3e]	36207	1			T2	381		T4	486		T6	737
valid_sources[0x3f]	35132	1			T2	429		T4	285		T6	611
valid_sources[0x40]	35345	1			T2	421		T3	200		T4	383
valid_sources[0x41]	38187	1			T2	402		T4	484		T6	734
valid_sources[0x42]	34402	1			T2	373		T4	458		T6	840
valid_sources[0x43]	35964	1			T2	376		T4	383		T6	728
valid_sources[0x44]	37504	1			T2	373		T4	449		T6	739
valid_sources[0x45]	34599	1			T2	370		T4	390		T6	775
valid_sources[0x46]	34930	1			T2	385		T4	426		T6	669
valid_sources[0x47]	35423	1			T2	401		T4	298		T6	717
valid_sources[0x48]	36200	1			T2	420		T4	454		T6	700
valid_sources[0x49]	35709	1			T2	393		T4	452		T6	744
valid_sources[0x4a]	35912	1			T2	399		T4	402		T6	752
valid_sources[0x4b]	37076	1			T2	384		T4	408		T6	658
valid_sources[0x4c]	34685	1			T2	433		T4	346		T6	703
valid_sources[0x4d]	34610	1			T2	427		T4	407		T6	674
valid_sources[0x4e]	35686	1			T2	402		T4	635		T6	698
valid_sources[0x4f]	36542	1			T2	419		T4	438		T6	745
valid_sources[0x50]	34563	1			T2	366		T4	353		T6	640
valid_sources[0x51]	37299	1			T2	412		T4	384		T6	695
valid_sources[0x52]	34275	1			T2	386		T4	319		T6	730
valid_sources[0x53]	36985	1			T2	415		T4	362		T6	686
valid_sources[0x54]	38860	1			T2	430		T4	381		T6	650
valid_sources[0x55]	35253	1			T2	390		T4	405		T6	703
valid_sources[0x56]	36289	1			T2	397		T4	424		T6	710
valid_sources[0x57]	36211	1			T2	444		T4	365		T6	706
valid_sources[0x58]	36649	1			T2	399		T4	326		T6	687
valid_sources[0x59]	35771	1			T2	399		T4	407		T6	641
valid_sources[0x5a]	35134	1			T2	417		T4	369		T6	803
valid_sources[0x5b]	35796	1			T2	428		T4	469		T6	725
valid_sources[0x5c]	37499	1			T2	418		T4	376		T6	739
valid_sources[0x5d]	35347	1			T2	399		T4	425		T6	727
valid_sources[0x5e]	35967	1			T2	436		T4	485		T6	736
valid_sources[0x5f]	34832	1			T2	379		T4	440		T6	772
valid_sources[0x60]	36351	1			T2	384		T4	323		T6	685
valid_sources[0x61]	35617	1			T2	382		T4	438		T6	679
valid_sources[0x62]	35805	1			T2	399		T4	261		T6	766
valid_sources[0x63]	35298	1			T2	391		T4	550		T6	653
valid_sources[0x64]	37519	1			T2	421		T4	289		T6	678
valid_sources[0x65]	35849	1			T2	418		T4	395		T6	761
valid_sources[0x66]	35926	1			T2	412		T4	419		T6	590
valid_sources[0x67]	36072	1			T2	426		T4	322		T6	711
valid_sources[0x68]	35117	1			T2	397		T4	427		T6	727
valid_sources[0x69]	36190	1			T2	388		T4	440		T6	823
valid_sources[0x6a]	36432	1			T2	411		T4	402		T6	751
valid_sources[0x6b]	36749	1			T2	409		T4	439		T6	666
valid_sources[0x6c]	34326	1			T2	403		T4	441		T6	645
valid_sources[0x6d]	34640	1			T2	387		T4	330		T6	696
valid_sources[0x6e]	37065	1			T2	376		T4	476		T6	683
valid_sources[0x6f]	34832	1			T2	411		T4	376		T6	654
valid_sources[0x70]	36140	1			T2	376		T4	390		T6	702
valid_sources[0x71]	35557	1			T2	413		T4	368		T6	714
valid_sources[0x72]	36309	1			T2	374		T4	443		T6	663
valid_sources[0x73]	36654	1			T2	400		T4	350		T6	712
valid_sources[0x74]	36804	1			T2	420		T4	386		T6	784
valid_sources[0x75]	35168	1			T2	403		T4	425		T6	649
valid_sources[0x76]	36290	1			T2	387		T4	486		T6	671
valid_sources[0x77]	33972	1			T2	390		T4	316		T6	737
valid_sources[0x78]	36733	1			T2	404		T4	260		T6	719
valid_sources[0x79]	36220	1			T2	443		T4	321		T6	652
valid_sources[0x7a]	36067	1			T2	411		T4	373		T6	625
valid_sources[0x7b]	34620	1			T2	412		T4	395		T6	582
valid_sources[0x7c]	36298	1			T2	401		T4	444		T6	735
valid_sources[0x7d]	36286	1			T2	407		T4	478		T6	726
valid_sources[0x7e]	36679	1			T2	378		T4	474		T6	747
valid_sources[0x7f]	34495	1			T2	390		T4	398		T6	617
valid_sources[0x80]	38054	1			T2	421		T4	406		T6	709

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

2270405

1

T2

25484

T3

100

T4

25086

values[0x0]

all_enables

biggest_size

3335638

1

T2

37473

T3

49

T4

37314

values[0x1]

all_enables

biggest_size

3329735

1

T2

37596

T3

51

T4

37056