Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	7255952	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

7242221

1

T1

154

T2

3285

T3

6

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	8389575	1			T1	282		T2	8011		T3	1
values[0x0]	2321019	1			T1	94		T2	427		T3	14
values[0x1]	3787579	1			T1	100		T2	403		T3	11

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	4702931	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

9795242

1

T1

232

T2

4614

T3

6

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	65332	1			T1	2		T2	43		T5	9
valid_sources[0x01]	55351	1			T1	2		T2	34		T5	8
valid_sources[0x02]	74616	1			T1	1		T2	52		T5	9
valid_sources[0x03]	53134	1			T1	5		T2	23		T5	11
valid_sources[0x04]	53603	1			T1	4		T2	34		T5	14
valid_sources[0x05]	55114	1			T1	4		T2	24		T5	8
valid_sources[0x06]	51178	1			T1	1		T2	30		T5	5
valid_sources[0x07]	65256	1			T1	3		T2	28		T5	10
valid_sources[0x08]	52996	1			T1	5		T2	58		T5	9
valid_sources[0x09]	59397	1			T1	5		T2	30		T5	6
valid_sources[0x0a]	52922	1			T1	2		T2	36		T5	6
valid_sources[0x0b]	52226	1			T2	42		T5	10		T6	15
valid_sources[0x0c]	53510	1			T2	37		T5	11		T6	22
valid_sources[0x0d]	54457	1			T1	1		T2	34		T5	9
valid_sources[0x0e]	57396	1			T1	1		T2	38		T5	7
valid_sources[0x0f]	56788	1			T1	1		T2	23		T5	12
valid_sources[0x10]	57145	1			T1	3		T2	21		T5	12
valid_sources[0x11]	54101	1			T1	5		T2	32		T5	7
valid_sources[0x12]	49386	1			T1	1		T2	44		T5	14
valid_sources[0x13]	51127	1			T2	40		T5	15		T6	27
valid_sources[0x14]	50921	1			T2	48		T5	6		T6	26
valid_sources[0x15]	50922	1			T1	1		T2	23		T5	12
valid_sources[0x16]	87846	1			T1	3		T2	42		T5	6
valid_sources[0x17]	52346	1			T1	1		T2	34		T5	9
valid_sources[0x18]	66569	1			T1	2		T2	33		T5	8
valid_sources[0x19]	53445	1			T2	43		T5	9		T6	13
valid_sources[0x1a]	49666	1			T2	37		T5	8		T6	32
valid_sources[0x1b]	54739	1			T1	2		T2	38		T5	9
valid_sources[0x1c]	50351	1			T1	1		T2	33		T5	9
valid_sources[0x1d]	63855	1			T1	7		T2	33		T5	14
valid_sources[0x1e]	59812	1			T2	45		T5	11		T6	37
valid_sources[0x1f]	53886	1			T2	31		T5	5		T6	16
valid_sources[0x20]	51122	1			T1	6		T2	36		T3	26
valid_sources[0x21]	56761	1			T1	2		T2	28		T5	7
valid_sources[0x22]	61933	1			T1	1		T2	29		T5	7
valid_sources[0x23]	54029	1			T1	8		T2	41		T5	7
valid_sources[0x24]	49428	1			T1	1		T2	27		T5	6
valid_sources[0x25]	53973	1			T1	1		T2	44		T5	3
valid_sources[0x26]	56397	1			T2	24		T5	9		T6	22
valid_sources[0x27]	57978	1			T1	1		T2	32		T5	11
valid_sources[0x28]	65569	1			T1	2		T2	33		T5	9
valid_sources[0x29]	62057	1			T1	2		T2	43		T5	7
valid_sources[0x2a]	68362	1			T1	2		T2	39		T5	16
valid_sources[0x2b]	50616	1			T1	2		T2	31		T5	6
valid_sources[0x2c]	50418	1			T2	34		T5	9		T6	30
valid_sources[0x2d]	49509	1			T1	4		T2	50		T5	6
valid_sources[0x2e]	50113	1			T1	3		T2	46		T5	5
valid_sources[0x2f]	50361	1			T1	6		T2	30		T5	9
valid_sources[0x30]	56780	1			T1	1		T2	36		T5	10
valid_sources[0x31]	62439	1			T2	25		T5	11		T6	22
valid_sources[0x32]	50633	1			T1	1		T2	28		T5	11
valid_sources[0x33]	51561	1			T1	1		T2	32		T5	8
valid_sources[0x34]	53062	1			T1	1		T2	31		T5	6
valid_sources[0x35]	51358	1			T2	31		T5	4		T6	24
valid_sources[0x36]	63150	1			T1	1		T2	33		T5	10
valid_sources[0x37]	54744	1			T1	1		T2	32		T5	7
valid_sources[0x38]	59831	1			T1	2		T2	37		T5	11
valid_sources[0x39]	50760	1			T1	1		T2	34		T5	8
valid_sources[0x3a]	59937	1			T1	3		T2	29		T5	14
valid_sources[0x3b]	52829	1			T2	38		T5	14		T6	42
valid_sources[0x3c]	50981	1			T1	2		T2	46		T5	9
valid_sources[0x3d]	59682	1			T1	3		T2	43		T5	3
valid_sources[0x3e]	49678	1			T2	18		T5	8		T6	26
valid_sources[0x3f]	64606	1			T1	6		T2	23		T5	11
valid_sources[0x40]	56635	1			T1	2		T2	41		T5	6
valid_sources[0x41]	60754	1			T1	2		T2	24		T5	12
valid_sources[0x42]	52509	1			T2	38		T5	10		T6	11
valid_sources[0x43]	51855	1			T2	48		T5	11		T6	11
valid_sources[0x44]	53285	1			T2	42		T5	8		T6	25
valid_sources[0x45]	48305	1			T1	2		T2	42		T5	7
valid_sources[0x46]	58685	1			T1	4		T2	36		T5	13
valid_sources[0x47]	50917	1			T1	2		T2	29		T5	10
valid_sources[0x48]	56260	1			T1	2		T2	35		T5	10
valid_sources[0x49]	49484	1			T1	4		T2	19		T5	6
valid_sources[0x4a]	59726	1			T2	35		T5	10		T6	19
valid_sources[0x4b]	62090	1			T1	5		T2	31		T5	9
valid_sources[0x4c]	54624	1			T1	1		T2	46		T5	10
valid_sources[0x4d]	50561	1			T1	4		T2	29		T5	5
valid_sources[0x4e]	52115	1			T1	3		T2	29		T5	13
valid_sources[0x4f]	52179	1			T1	3		T2	32		T5	9
valid_sources[0x50]	63934	1			T1	2		T2	39		T5	8
valid_sources[0x51]	57415	1			T1	2		T2	23		T5	3
valid_sources[0x52]	52835	1			T1	1		T2	31		T5	7
valid_sources[0x53]	50970	1			T1	2		T2	40		T5	14
valid_sources[0x54]	59628	1			T1	1		T2	32		T5	15
valid_sources[0x55]	52888	1			T1	4		T2	36		T5	7
valid_sources[0x56]	51472	1			T1	1		T2	39		T5	12
valid_sources[0x57]	50252	1			T2	28		T5	7		T6	11
valid_sources[0x58]	64365	1			T1	3		T2	36		T5	9
valid_sources[0x59]	52704	1			T1	3		T2	27		T5	7
valid_sources[0x5a]	51899	1			T1	2		T2	40		T5	11
valid_sources[0x5b]	51587	1			T1	3		T2	41		T5	8
valid_sources[0x5c]	53868	1			T1	3		T2	35		T5	5
valid_sources[0x5d]	55838	1			T2	24		T5	10		T6	22
valid_sources[0x5e]	56392	1			T1	1		T2	27		T5	7
valid_sources[0x5f]	53444	1			T1	1		T2	33		T5	17
valid_sources[0x60]	66371	1			T1	1		T2	28		T5	7
valid_sources[0x61]	50576	1			T2	25		T5	12		T6	21
valid_sources[0x62]	56845	1			T2	32		T5	6		T6	24
valid_sources[0x63]	49930	1			T1	5		T2	33		T5	12
valid_sources[0x64]	54384	1			T1	3		T2	27		T5	7
valid_sources[0x65]	52002	1			T1	2		T2	31		T5	8
valid_sources[0x66]	53715	1			T1	1		T2	31		T5	5
valid_sources[0x67]	51128	1			T1	2		T2	35		T5	10
valid_sources[0x68]	50204	1			T1	1		T2	26		T5	9
valid_sources[0x69]	50053	1			T1	3		T2	32		T5	14
valid_sources[0x6a]	56445	1			T2	35		T5	11		T6	12
valid_sources[0x6b]	51013	1			T1	2		T2	24		T5	8
valid_sources[0x6c]	62477	1			T2	24		T5	5		T6	42
valid_sources[0x6d]	59676	1			T1	2		T2	41		T5	11
valid_sources[0x6e]	53128	1			T2	37		T5	14		T6	39
valid_sources[0x6f]	51486	1			T1	2		T2	40		T5	9
valid_sources[0x70]	49118	1			T1	2		T2	28		T5	9
valid_sources[0x71]	66554	1			T1	1		T2	27		T5	12
valid_sources[0x72]	50876	1			T2	36		T5	7		T6	26
valid_sources[0x73]	51089	1			T1	4		T2	26		T5	9
valid_sources[0x74]	58509	1			T1	3		T2	29		T5	12
valid_sources[0x75]	48343	1			T2	42		T5	9		T6	39
valid_sources[0x76]	50336	1			T1	2		T2	41		T5	8
valid_sources[0x77]	53897	1			T1	2		T2	42		T5	10
valid_sources[0x78]	51191	1			T1	3		T2	30		T5	10
valid_sources[0x79]	51491	1			T1	2		T2	28		T5	6
valid_sources[0x7a]	57292	1			T2	44		T5	10		T6	20
valid_sources[0x7b]	53530	1			T1	4		T2	19		T5	14
valid_sources[0x7c]	49931	1			T2	53		T5	7		T6	30
valid_sources[0x7d]	50037	1			T2	30		T5	9		T6	21
valid_sources[0x7e]	57157	1			T1	16		T2	45		T5	5
valid_sources[0x7f]	57654	1			T2	25		T5	5		T6	14
valid_sources[0x80]	56056	1			T1	5		T2	46		T5	7

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

3471637

1

T1

80

T2

2982

T3

1

values[0x0]

all_enables

biggest_size

1923247

1

T1

39

T2

179

T3

4

values[0x1]

all_enables

biggest_size

1847337

1

T1

35

T2

124

T3

1

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	251253	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

9050361

1

T2

140

T5

40

T6

40

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	2310632	1			T2	70		T5	20		T6	20
values[0x0]	3392617	1			T2	35		T5	12		T6	9
values[0x1]	3598365	1			T2	35		T5	8		T6	11

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	90634	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

9210980

1

T2

140

T5

40

T6

40

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	36388	1			T7	1065		T9	443		T238	1
valid_sources[0x01]	35303	1			T7	1977		T9	437		T107	4
valid_sources[0x02]	36300	1			T7	1770		T10	1		T9	499
valid_sources[0x03]	36424	1			T7	1801		T9	453		T104	2
valid_sources[0x04]	36434	1			T7	1080		T116	1		T9	417
valid_sources[0x05]	35529	1			T7	1749		T10	4		T79	1
valid_sources[0x06]	38090	1			T7	1531		T79	2		T116	1
valid_sources[0x07]	37266	1			T7	1447		T11	1		T79	3
valid_sources[0x08]	36266	1			T7	1365		T79	2		T9	444
valid_sources[0x09]	34388	1			T7	1670		T79	2		T29	2
valid_sources[0x0a]	36526	1			T7	1449		T10	4		T205	4
valid_sources[0x0b]	38007	1			T7	1471		T113	1		T116	1
valid_sources[0x0c]	32298	1			T7	599		T29	2		T9	452
valid_sources[0x0d]	37017	1			T7	1688		T114	1		T9	429
valid_sources[0x0e]	37895	1			T7	1681		T10	4		T9	472
valid_sources[0x0f]	35880	1			T7	891		T113	4		T9	493
valid_sources[0x10]	35390	1			T7	1667		T11	1		T116	1
valid_sources[0x11]	36231	1			T7	1254		T11	1		T113	2
valid_sources[0x12]	35987	1			T7	1220		T10	1		T11	1
valid_sources[0x13]	35847	1			T7	1167		T79	1		T116	4
valid_sources[0x14]	39580	1			T7	2816		T116	1		T9	383
valid_sources[0x15]	36163	1			T7	1222		T79	1		T205	3
valid_sources[0x16]	34638	1			T7	1252		T79	2		T139	2
valid_sources[0x17]	37057	1			T6	40		T7	521		T11	1
valid_sources[0x18]	36439	1			T7	982		T79	1		T29	19
valid_sources[0x19]	34687	1			T7	1366		T11	1		T79	1
valid_sources[0x1a]	35965	1			T7	2009		T9	512		T104	2
valid_sources[0x1b]	36198	1			T7	787		T10	1		T9	390
valid_sources[0x1c]	36046	1			T7	690		T11	1		T79	1
valid_sources[0x1d]	36994	1			T7	1798		T11	2		T116	4
valid_sources[0x1e]	37685	1			T7	1809		T11	1		T79	2
valid_sources[0x1f]	34262	1			T7	1233		T79	2		T29	1
valid_sources[0x20]	36808	1			T7	709		T11	1		T9	490
valid_sources[0x21]	35169	1			T7	1432		T11	1		T9	406
valid_sources[0x22]	38020	1			T7	1242		T114	2		T9	434
valid_sources[0x23]	35694	1			T7	1197		T10	1		T79	1
valid_sources[0x24]	36283	1			T7	1883		T114	2		T16	4
valid_sources[0x25]	37319	1			T7	776		T9	452		T149	1
valid_sources[0x26]	34768	1			T7	1764		T11	3		T79	2
valid_sources[0x27]	36995	1			T7	1054		T9	443		T104	1
valid_sources[0x28]	34851	1			T7	1023		T79	3		T9	415
valid_sources[0x29]	37010	1			T7	2245		T10	3		T79	2
valid_sources[0x2a]	36873	1			T7	1195		T116	1		T9	516
valid_sources[0x2b]	35589	1			T7	2259		T9	430		T104	3
valid_sources[0x2c]	38448	1			T7	1694		T11	1		T79	2
valid_sources[0x2d]	34687	1			T7	1174		T11	4		T79	3
valid_sources[0x2e]	36587	1			T7	1159		T10	2		T9	512
valid_sources[0x2f]	35430	1			T7	1647		T79	1		T9	475
valid_sources[0x30]	35498	1			T7	1497		T10	2		T9	502
valid_sources[0x31]	36295	1			T7	888		T79	1		T139	3
valid_sources[0x32]	37001	1			T7	2367		T10	5		T79	1
valid_sources[0x33]	36730	1			T7	1146		T10	1		T79	1
valid_sources[0x34]	36966	1			T7	2001		T79	3		T9	453
valid_sources[0x35]	35245	1			T7	1052		T10	7		T9	429
valid_sources[0x36]	37638	1			T7	1842		T11	1		T79	4
valid_sources[0x37]	37033	1			T7	1036		T79	1		T9	465
valid_sources[0x38]	36764	1			T7	950		T11	1		T79	3
valid_sources[0x39]	35904	1			T7	1333		T114	1		T139	20
valid_sources[0x3a]	34172	1			T7	770		T116	1		T9	433
valid_sources[0x3b]	34944	1			T7	1151		T114	2		T116	1
valid_sources[0x3c]	36428	1			T7	1009		T11	4		T9	511
valid_sources[0x3d]	33719	1			T7	1468		T10	5		T9	495
valid_sources[0x3e]	35718	1			T2	140		T7	2308		T79	5
valid_sources[0x3f]	39382	1			T7	1694		T10	3		T79	3
valid_sources[0x40]	34450	1			T7	1024		T114	1		T116	3
valid_sources[0x41]	35340	1			T7	1082		T9	431		T104	2
valid_sources[0x42]	36754	1			T7	1434		T10	2		T79	2
valid_sources[0x43]	37270	1			T7	1584		T114	1		T9	514
valid_sources[0x44]	35275	1			T7	1104		T9	446		T13	151
valid_sources[0x45]	37047	1			T7	1460		T116	1		T9	480
valid_sources[0x46]	36622	1			T5	40		T7	2427		T10	8
valid_sources[0x47]	35636	1			T7	1195		T10	3		T114	1
valid_sources[0x48]	34737	1			T7	736		T10	6		T79	1
valid_sources[0x49]	36112	1			T7	1250		T11	1		T9	392
valid_sources[0x4a]	37792	1			T7	1305		T114	1		T8	6
valid_sources[0x4b]	35017	1			T7	1016		T116	4		T16	44
valid_sources[0x4c]	34766	1			T7	1622		T11	1		T16	22
valid_sources[0x4d]	35692	1			T7	1912		T9	464		T149	1
valid_sources[0x4e]	36167	1			T7	2036		T29	3		T9	494
valid_sources[0x4f]	34842	1			T7	1214		T29	6		T205	11
valid_sources[0x50]	37143	1			T7	2292		T11	1		T79	1
valid_sources[0x51]	35446	1			T7	1647		T11	3		T9	417
valid_sources[0x52]	34636	1			T7	656		T11	1		T79	3
valid_sources[0x53]	35625	1			T7	2188		T10	3		T79	1
valid_sources[0x54]	39294	1			T7	2209		T9	461		T105	6
valid_sources[0x55]	36481	1			T7	1164		T11	1		T9	486
valid_sources[0x56]	36408	1			T7	1516		T9	419		T104	1
valid_sources[0x57]	36508	1			T7	2207		T8	1		T9	500
valid_sources[0x58]	35740	1			T7	1129		T10	3		T9	394
valid_sources[0x59]	34226	1			T7	428		T10	3		T79	3
valid_sources[0x5a]	37083	1			T7	1096		T9	496		T104	1
valid_sources[0x5b]	40295	1			T7	3002		T79	2		T114	1
valid_sources[0x5c]	36422	1			T7	1534		T10	1		T9	537
valid_sources[0x5d]	34979	1			T7	1039		T114	1		T116	3
valid_sources[0x5e]	36423	1			T7	1971		T10	2		T79	1
valid_sources[0x5f]	38386	1			T7	1385		T11	1		T114	1
valid_sources[0x60]	37041	1			T7	1407		T139	2		T9	519
valid_sources[0x61]	35998	1			T7	1185		T10	4		T9	502
valid_sources[0x62]	38760	1			T7	1273		T139	2		T9	443
valid_sources[0x63]	36876	1			T7	1727		T11	1		T116	1
valid_sources[0x64]	35053	1			T7	487		T11	3		T79	2
valid_sources[0x65]	35103	1			T7	1408		T113	1		T9	449
valid_sources[0x66]	35962	1			T7	648		T113	2		T9	434
valid_sources[0x67]	37257	1			T7	1211		T114	1		T116	3
valid_sources[0x68]	35439	1			T7	869		T10	2		T9	476
valid_sources[0x69]	36270	1			T7	760		T79	1		T9	504
valid_sources[0x6a]	38715	1			T7	1753		T11	1		T114	1
valid_sources[0x6b]	35039	1			T7	716		T79	2		T113	2
valid_sources[0x6c]	35661	1			T7	913		T116	1		T139	11
valid_sources[0x6d]	37709	1			T7	931		T79	1		T9	433
valid_sources[0x6e]	37782	1			T7	1727		T79	3		T9	455
valid_sources[0x6f]	36880	1			T7	662		T9	465		T13	313
valid_sources[0x70]	37555	1			T7	1359		T8	2		T9	462
valid_sources[0x71]	37589	1			T7	1177		T79	2		T114	1
valid_sources[0x72]	34405	1			T7	1015		T10	2		T9	468
valid_sources[0x73]	35196	1			T7	970		T11	2		T79	1
valid_sources[0x74]	35606	1			T7	1794		T10	2		T139	1
valid_sources[0x75]	35950	1			T7	2112		T10	1		T9	433
valid_sources[0x76]	37707	1			T7	1351		T116	1		T9	515
valid_sources[0x77]	34018	1			T7	1493		T9	437		T104	2
valid_sources[0x78]	34923	1			T7	707		T9	476		T104	3
valid_sources[0x79]	37308	1			T7	817		T10	4		T11	1
valid_sources[0x7a]	34717	1			T7	836		T29	1		T9	493
valid_sources[0x7b]	36835	1			T7	1494		T79	2		T9	484
valid_sources[0x7c]	37104	1			T7	2079		T205	10		T9	442
valid_sources[0x7d]	36709	1			T7	1050		T79	1		T9	550
valid_sources[0x7e]	38359	1			T7	1479		T10	2		T11	2
valid_sources[0x7f]	38160	1			T7	1729		T79	3		T114	1
valid_sources[0x80]	36751	1			T7	1126		T10	1		T11	4

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

2297694

1

T2

70

T5

20

T6

20

values[0x0]

all_enables

biggest_size

3375219

1

T2

35

T5

12

T6

9

values[0x1]

all_enables

biggest_size

3377448

1

T2

35

T5

8

T6

11