Group : otp_ctrl_env_pkg::otp_ctrl_buf_err_code_cg_wrap::buf_err_code_cg
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Group : otp_ctrl_env_pkg::otp_ctrl_buf_err_code_cg_wrap::buf_err_code_cg
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
83.33 66.67 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv

6 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
buf_err_code_cg_wrap[OtpSecret0ErrIdx] 0.00 1 100 1 64 64
buf_err_code_cg_wrap[OtpHwCfg1ErrIdx] 66.67 1 100 1 64 64
buf_err_code_cg_wrap[OtpHwCfg0ErrIdx] 83.33 1 100 1 64 64
buf_err_code_cg_wrap[OtpOwnerSwCfgErrIdx] 83.33 1 100 1 64 64
buf_err_code_cg_wrap[OtpRotCreatorAuthCodesignErrIdx] 83.33 1 100 1 64 64
buf_err_code_cg_wrap[OtpRotCreatorAuthStateErrIdx] 83.33 1 100 1 64 64




Group Instance : buf_err_code_cg_wrap[OtpSecret0ErrIdx]
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
0.00 1 100 1 64 64




Summary for Group Instance buf_err_code_cg_wrap[OtpSecret0ErrIdx]

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 6 0 0.00


Variables for Group Instance buf_err_code_cg_wrap[OtpSecret0ErrIdx]
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
err_code_vals 6 6 0 0.00 100 1 1 0



Group Instance : buf_err_code_cg_wrap[OtpHwCfg1ErrIdx]
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
66.67 1 100 1 64 64




Summary for Group Instance buf_err_code_cg_wrap[OtpHwCfg1ErrIdx]

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 2 4 66.67


Variables for Group Instance buf_err_code_cg_wrap[OtpHwCfg1ErrIdx]
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
err_code_vals 6 2 4 66.67 100 1 1 0



Group Instance : buf_err_code_cg_wrap[OtpHwCfg0ErrIdx]
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
83.33 1 100 1 64 64




Summary for Group Instance buf_err_code_cg_wrap[OtpHwCfg0ErrIdx]

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 1 5 83.33


Variables for Group Instance buf_err_code_cg_wrap[OtpHwCfg0ErrIdx]
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
err_code_vals 6 1 5 83.33 100 1 1 0



Group Instance : buf_err_code_cg_wrap[OtpOwnerSwCfgErrIdx]
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
83.33 1 100 1 64 64




Summary for Group Instance buf_err_code_cg_wrap[OtpOwnerSwCfgErrIdx]

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 1 5 83.33


Variables for Group Instance buf_err_code_cg_wrap[OtpOwnerSwCfgErrIdx]
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
err_code_vals 6 1 5 83.33 100 1 1 0



Group Instance : buf_err_code_cg_wrap[OtpRotCreatorAuthCodesignErrIdx]
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
83.33 1 100 1 64 64




Summary for Group Instance buf_err_code_cg_wrap[OtpRotCreatorAuthCodesignErrIdx]

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 1 5 83.33


Variables for Group Instance buf_err_code_cg_wrap[OtpRotCreatorAuthCodesignErrIdx]
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
err_code_vals 6 1 5 83.33 100 1 1 0



Group Instance : buf_err_code_cg_wrap[OtpRotCreatorAuthStateErrIdx]
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
83.33 1 100 1 64 64




Summary for Group Instance buf_err_code_cg_wrap[OtpRotCreatorAuthStateErrIdx]

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 1 5 83.33


Variables for Group Instance buf_err_code_cg_wrap[OtpRotCreatorAuthStateErrIdx]
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
err_code_vals 6 1 5 83.33 100 1 1 0


Summary for Variable err_code_vals

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 6 0 0.00


User Defined Bins for err_code_vals

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
fsm_err 0 1 1
check_fail 0 1 1
ecc_uncorr_err 0 1 1
ecc_corr_err 0 1 1
macro_err 0 1 1
no_err 0 1 1


Excluded/Illegal bins
NAMECOUNTSTATUS
illegal_err 0 Illegal


Summary for Variable err_code_vals

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 2 4 66.67


User Defined Bins for err_code_vals

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
check_fail 0 1 1
macro_err 0 1 1


Excluded/Illegal bins
NAMECOUNTSTATUS
illegal_err 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
fsm_err 118899 1 T2 118 T9 1 T10 226
ecc_uncorr_err 249 1 T25 1 T54 1 T120 1
ecc_corr_err 73 1 T37 30 T38 43 - -
no_err 154293 1 T1 608 T2 28 T3 34


Summary for Variable err_code_vals

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 1 5 83.33


User Defined Bins for err_code_vals

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
macro_err 0 1 1


Excluded/Illegal bins
NAMECOUNTSTATUS
illegal_err 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
fsm_err 118924 1 T2 118 T10 226 T63 28
check_fail 6 1 T60 1 T61 1 T62 1
ecc_uncorr_err 225 1 T24 1 T50 33 T80 63
ecc_corr_err 160 1 T42 51 T56 46 T59 63
no_err 154325 1 T1 608 T2 28 T3 34


Summary for Variable err_code_vals

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 1 5 83.33


User Defined Bins for err_code_vals

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
macro_err 0 1 1


Excluded/Illegal bins
NAMECOUNTSTATUS
illegal_err 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
fsm_err 119112 1 T2 118 T9 1 T10 226
check_fail 6 1 T30 1 T31 1 T32 1
ecc_uncorr_err 43 1 T11 1 T27 13 T102 1
ecc_corr_err 101 1 T27 8 T28 31 T29 62
no_err 154668 1 T1 608 T2 28 T3 35


Summary for Variable err_code_vals

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 1 5 83.33


User Defined Bins for err_code_vals

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
macro_err 0 1 1


Excluded/Illegal bins
NAMECOUNTSTATUS
illegal_err 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
fsm_err 118902 1 T2 118 T9 1 T10 226
check_fail 34 1 T44 1 T45 1 T46 1
ecc_uncorr_err 183 1 T47 1 T81 1 T106 1
ecc_corr_err 198 1 T41 50 T42 57 T43 20
no_err 154487 1 T1 608 T2 28 T3 35


Summary for Variable err_code_vals

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 1 5 83.33


User Defined Bins for err_code_vals

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
macro_err 0 1 1


Excluded/Illegal bins
NAMECOUNTSTATUS
illegal_err 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
fsm_err 118933 1 T2 118 T9 1 T10 226
check_fail 23 1 T51 1 T52 1 T53 1
ecc_uncorr_err 191 1 T79 1 T113 1 T114 1
ecc_corr_err 117 1 T49 9 T50 33 T37 34
no_err 154464 1 T1 608 T2 28 T3 35

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