Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	7736555	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

7775535

1

T1

1839

T2

845

T3

476

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	8808236	1			T1	3875		T2	1729		T3	1778
values[0x0]	2534886	1			T1	237		T2	115		T3	59
values[0x1]	4168968	1			T1	248		T2	94		T3	66

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	4963530	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

10548560

1

T1

2403

T2

1085

T3

892

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	53999	1			T1	3		T8	1		T9	17
valid_sources[0x01]	65152	1			T1	26		T3	4		T8	3
valid_sources[0x02]	54579	1			T1	22		T3	6		T8	3
valid_sources[0x03]	54607	1			T1	20		T3	23		T8	3
valid_sources[0x04]	55792	1			T1	20		T3	11		T8	3
valid_sources[0x05]	63203	1			T1	19		T3	2		T8	2
valid_sources[0x06]	51151	1			T1	12		T3	4		T8	2
valid_sources[0x07]	69791	1			T1	4		T8	2		T9	20
valid_sources[0x08]	54304	1			T1	14		T2	1938		T8	1
valid_sources[0x09]	81961	1			T1	17		T8	2		T9	16
valid_sources[0x0a]	59510	1			T1	13		T3	33		T8	4
valid_sources[0x0b]	57391	1			T1	17		T3	5		T8	4
valid_sources[0x0c]	56063	1			T1	23		T3	3		T8	7
valid_sources[0x0d]	52391	1			T1	41		T8	3		T9	9
valid_sources[0x0e]	58863	1			T1	19		T3	2		T8	1
valid_sources[0x0f]	59467	1			T1	14		T3	4		T8	4
valid_sources[0x10]	55902	1			T1	21		T8	2		T9	12
valid_sources[0x11]	57587	1			T1	22		T3	22		T8	2
valid_sources[0x12]	58516	1			T1	9		T3	2		T8	2
valid_sources[0x13]	52297	1			T1	28		T3	5		T8	5
valid_sources[0x14]	57428	1			T1	13		T8	3		T9	4
valid_sources[0x15]	55767	1			T1	30		T8	1		T9	8
valid_sources[0x16]	53102	1			T1	17		T8	1		T9	6
valid_sources[0x17]	64042	1			T1	19		T8	1		T9	12
valid_sources[0x18]	56563	1			T1	18		T8	1		T9	4
valid_sources[0x19]	54522	1			T1	11		T3	14		T8	2
valid_sources[0x1a]	58153	1			T1	23		T3	22		T8	4
valid_sources[0x1b]	57062	1			T1	24		T9	16		T6	88
valid_sources[0x1c]	54346	1			T1	10		T3	22		T8	4
valid_sources[0x1d]	74763	1			T1	18		T3	1		T8	3
valid_sources[0x1e]	57738	1			T1	9		T8	1		T9	11
valid_sources[0x1f]	57429	1			T1	9		T3	38		T8	3
valid_sources[0x20]	52084	1			T1	31		T8	1		T9	11
valid_sources[0x21]	56482	1			T1	26		T3	24		T8	4
valid_sources[0x22]	64585	1			T1	10		T3	2		T8	3
valid_sources[0x23]	58082	1			T1	11		T8	4		T9	17
valid_sources[0x24]	65297	1			T1	19		T8	1		T9	13
valid_sources[0x25]	57256	1			T1	14		T8	1		T9	15
valid_sources[0x26]	70066	1			T1	14		T8	7		T9	13
valid_sources[0x27]	54586	1			T1	28		T3	14		T8	2
valid_sources[0x28]	56434	1			T1	15		T8	2		T9	14
valid_sources[0x29]	56324	1			T1	9		T8	1		T9	16
valid_sources[0x2a]	56333	1			T1	20		T8	2		T9	7
valid_sources[0x2b]	63369	1			T1	30		T3	21		T8	2
valid_sources[0x2c]	52945	1			T1	18		T3	3		T8	4
valid_sources[0x2d]	55850	1			T1	24		T8	3		T9	13
valid_sources[0x2e]	60018	1			T1	12		T3	10		T8	3
valid_sources[0x2f]	63415	1			T1	14		T9	13		T6	100
valid_sources[0x30]	59733	1			T1	18		T3	3		T8	2
valid_sources[0x31]	56948	1			T1	16		T8	2		T9	14
valid_sources[0x32]	57540	1			T1	15		T3	3		T8	2
valid_sources[0x33]	58983	1			T1	9		T3	30		T8	2
valid_sources[0x34]	53975	1			T1	14		T3	15		T8	2
valid_sources[0x35]	54963	1			T1	14		T3	11		T8	5
valid_sources[0x36]	56604	1			T1	8		T3	23		T8	2
valid_sources[0x37]	59216	1			T1	9		T3	5		T8	3
valid_sources[0x38]	54060	1			T1	20		T3	18		T8	3
valid_sources[0x39]	57149	1			T1	11		T3	15		T8	2
valid_sources[0x3a]	53294	1			T1	20		T3	10		T9	11
valid_sources[0x3b]	58229	1			T1	13		T3	14		T8	2
valid_sources[0x3c]	80966	1			T1	7		T3	38		T8	1
valid_sources[0x3d]	54568	1			T1	23		T8	1		T9	17
valid_sources[0x3e]	54141	1			T1	19		T3	24		T8	1
valid_sources[0x3f]	64747	1			T1	15		T3	19		T8	2
valid_sources[0x40]	57408	1			T1	14		T8	2		T9	19
valid_sources[0x41]	60589	1			T1	14		T8	3		T9	4
valid_sources[0x42]	61914	1			T1	36		T3	3		T8	3
valid_sources[0x43]	59414	1			T1	6		T3	6		T8	1
valid_sources[0x44]	125559	1			T1	11		T3	2		T8	2
valid_sources[0x45]	132525	1			T1	17		T3	18		T4	74891
valid_sources[0x46]	54068	1			T1	19		T3	1		T8	5
valid_sources[0x47]	78666	1			T1	21		T8	5		T9	18
valid_sources[0x48]	55359	1			T1	22		T3	1		T8	4
valid_sources[0x49]	70441	1			T1	24		T8	2		T9	18
valid_sources[0x4a]	53514	1			T1	10		T3	6		T8	2
valid_sources[0x4b]	55285	1			T1	10		T3	10		T8	4
valid_sources[0x4c]	66964	1			T1	9		T8	1		T9	13
valid_sources[0x4d]	59123	1			T1	7		T3	4		T8	1
valid_sources[0x4e]	53473	1			T1	8		T8	3		T9	20
valid_sources[0x4f]	55573	1			T1	29		T3	6		T8	2
valid_sources[0x50]	54260	1			T1	11		T8	1		T9	10
valid_sources[0x51]	52867	1			T1	22		T8	7		T9	10
valid_sources[0x52]	57036	1			T1	11		T3	7		T8	5
valid_sources[0x53]	68500	1			T1	19		T3	11		T8	3
valid_sources[0x54]	58583	1			T1	29		T8	3		T9	7
valid_sources[0x55]	58768	1			T1	18		T8	1		T9	9
valid_sources[0x56]	56856	1			T1	12		T3	10		T8	4
valid_sources[0x57]	55522	1			T1	22		T8	2		T9	12
valid_sources[0x58]	53285	1			T1	18		T3	39		T8	2
valid_sources[0x59]	60709	1			T1	24		T3	10		T8	2
valid_sources[0x5a]	56199	1			T1	21		T3	14		T8	3
valid_sources[0x5b]	56536	1			T1	29		T8	4		T9	5
valid_sources[0x5c]	59520	1			T1	15		T3	13		T8	2
valid_sources[0x5d]	54110	1			T1	16		T3	5		T9	3
valid_sources[0x5e]	56808	1			T1	47		T3	3		T8	1
valid_sources[0x5f]	62473	1			T1	4		T3	12		T8	4
valid_sources[0x60]	64509	1			T1	22		T3	4		T8	2
valid_sources[0x61]	54666	1			T1	18		T8	1		T9	5
valid_sources[0x62]	53654	1			T1	19		T3	18		T8	3
valid_sources[0x63]	56341	1			T1	16		T8	4		T9	14
valid_sources[0x64]	52193	1			T1	6		T8	2		T9	16
valid_sources[0x65]	56063	1			T1	21		T3	4		T8	3
valid_sources[0x66]	52609	1			T1	20		T3	13		T8	2
valid_sources[0x67]	52050	1			T1	41		T8	4		T9	17
valid_sources[0x68]	68564	1			T1	32		T3	11		T8	1
valid_sources[0x69]	62502	1			T1	8		T3	20		T9	19
valid_sources[0x6a]	56510	1			T1	26		T3	11		T8	2
valid_sources[0x6b]	52873	1			T1	14		T8	6		T9	23
valid_sources[0x6c]	57115	1			T1	5		T3	17		T8	3
valid_sources[0x6d]	59353	1			T1	16		T8	2		T9	14
valid_sources[0x6e]	62237	1			T1	17		T3	13		T8	5
valid_sources[0x6f]	61092	1			T1	8		T3	5		T8	1
valid_sources[0x70]	58970	1			T1	19		T8	2		T9	26
valid_sources[0x71]	68866	1			T1	20		T8	3		T9	8
valid_sources[0x72]	56590	1			T1	5		T3	1		T9	13
valid_sources[0x73]	60785	1			T1	11		T3	2		T8	2
valid_sources[0x74]	57420	1			T1	10		T3	23		T8	3
valid_sources[0x75]	57771	1			T1	17		T8	1		T9	10
valid_sources[0x76]	62322	1			T1	25		T8	1		T9	8
valid_sources[0x77]	53152	1			T1	23		T8	1		T9	10
valid_sources[0x78]	59561	1			T1	28		T3	8		T8	4
valid_sources[0x79]	61382	1			T1	34		T3	2		T8	2
valid_sources[0x7a]	55461	1			T1	14		T3	5		T8	5
valid_sources[0x7b]	56244	1			T1	14		T8	2		T9	11
valid_sources[0x7c]	54928	1			T1	22		T3	7		T8	2
valid_sources[0x7d]	64896	1			T1	23		T3	8		T8	4
valid_sources[0x7e]	60887	1			T1	8		T3	21		T8	1
valid_sources[0x7f]	61334	1			T1	21		T8	1		T9	10
valid_sources[0x80]	66992	1			T1	14		T3	1		T8	3

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

3618719

1

T1

1648

T2

738

T3

409

values[0x0]

all_enables

biggest_size

2117817

1

T1

114

T2

65

T3

40

values[0x1]

all_enables

biggest_size

2038999

1

T1

77

T2

42

T3

27

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	277993	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

10115484

1

T1

60

T2

40

T3

40

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	2582982	1			T1	30		T2	20		T3	20
values[0x0]	3793683	1			T1	16		T2	11		T3	9
values[0x1]	4016812	1			T1	14		T2	9		T3	11

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	99885	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

10293592

1

T1

60

T2

40

T3

40

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	40554	1			T2	2		T6	61		T7	141
valid_sources[0x01]	41771	1			T4	157		T6	111		T7	149
valid_sources[0x02]	38370	1			T12	1		T6	101		T7	295
valid_sources[0x03]	38913	1			T4	43		T6	89		T7	99
valid_sources[0x04]	41319	1			T12	1		T6	57		T7	415
valid_sources[0x05]	41047	1			T6	79		T7	529		T68	1
valid_sources[0x06]	39425	1			T12	1		T6	79		T7	94
valid_sources[0x07]	40096	1			T6	103		T109	3		T133	3
valid_sources[0x08]	42173	1			T6	124		T34	1		T7	333
valid_sources[0x09]	40080	1			T12	1		T6	77		T34	2
valid_sources[0x0a]	38591	1			T6	44		T7	140		T107	1
valid_sources[0x0b]	42162	1			T12	1		T6	81		T7	115
valid_sources[0x0c]	39445	1			T12	2		T6	67		T13	517
valid_sources[0x0d]	41754	1			T8	1		T12	2		T6	61
valid_sources[0x0e]	39060	1			T4	3		T12	1		T6	89
valid_sources[0x0f]	41813	1			T4	21		T6	85		T7	608
valid_sources[0x10]	40379	1			T6	115		T7	321		T68	2
valid_sources[0x11]	40999	1			T12	1		T6	74		T7	63
valid_sources[0x12]	40634	1			T12	1		T6	92		T7	124
valid_sources[0x13]	41115	1			T2	4		T4	47		T6	85
valid_sources[0x14]	42094	1			T12	2		T6	92		T7	797
valid_sources[0x15]	40382	1			T4	11		T12	1		T6	52
valid_sources[0x16]	39035	1			T2	1		T12	2		T6	101
valid_sources[0x17]	39070	1			T12	4		T6	72		T101	2
valid_sources[0x18]	41070	1			T12	2		T6	97		T34	3
valid_sources[0x19]	41687	1			T12	1		T6	86		T7	10
valid_sources[0x1a]	38909	1			T4	57		T12	1		T6	61
valid_sources[0x1b]	40072	1			T12	1		T6	89		T7	34
valid_sources[0x1c]	41247	1			T6	66		T34	2		T13	575
valid_sources[0x1d]	40118	1			T1	60		T4	20		T8	1
valid_sources[0x1e]	40161	1			T12	1		T6	99		T7	1109
valid_sources[0x1f]	40886	1			T6	80		T7	173		T109	1
valid_sources[0x20]	39734	1			T6	88		T7	423		T112	1
valid_sources[0x21]	42488	1			T6	79		T7	78		T68	1
valid_sources[0x22]	40822	1			T4	3		T12	1		T6	74
valid_sources[0x23]	40045	1			T2	5		T6	55		T7	280
valid_sources[0x24]	38460	1			T12	2		T6	78		T7	120
valid_sources[0x25]	40497	1			T6	80		T7	390		T109	2
valid_sources[0x26]	42492	1			T6	79		T7	558		T112	1
valid_sources[0x27]	42126	1			T6	60		T7	427		T100	2
valid_sources[0x28]	40842	1			T12	1		T6	43		T7	322
valid_sources[0x29]	40411	1			T9	1		T12	1		T6	93
valid_sources[0x2a]	40700	1			T12	2		T6	53		T7	386
valid_sources[0x2b]	40627	1			T2	2		T6	76		T7	183
valid_sources[0x2c]	39488	1			T12	1		T6	51		T34	3
valid_sources[0x2d]	40134	1			T12	2		T6	82		T34	2
valid_sources[0x2e]	37630	1			T12	1		T6	86		T34	8
valid_sources[0x2f]	41124	1			T4	33		T6	225		T7	513
valid_sources[0x30]	40964	1			T6	103		T7	613		T133	3
valid_sources[0x31]	39820	1			T4	12		T12	1		T6	127
valid_sources[0x32]	40244	1			T4	5		T8	1		T12	1
valid_sources[0x33]	42543	1			T6	77		T7	14		T112	2
valid_sources[0x34]	40623	1			T6	46		T7	404		T100	1
valid_sources[0x35]	40301	1			T12	2		T6	56		T7	288
valid_sources[0x36]	37688	1			T8	1		T12	1		T6	88
valid_sources[0x37]	41822	1			T9	4		T6	47		T7	304
valid_sources[0x38]	39627	1			T12	3		T6	40		T7	144
valid_sources[0x39]	39323	1			T6	60		T13	557		T25	359
valid_sources[0x3a]	38486	1			T2	1		T12	1		T6	109
valid_sources[0x3b]	41204	1			T2	4		T12	3		T6	75
valid_sources[0x3c]	39643	1			T12	1		T6	39		T133	1
valid_sources[0x3d]	38675	1			T12	1		T6	54		T7	33
valid_sources[0x3e]	40872	1			T6	120		T34	2		T7	621
valid_sources[0x3f]	39281	1			T4	4		T6	127		T7	892
valid_sources[0x40]	40811	1			T6	77		T7	242		T109	3
valid_sources[0x41]	39392	1			T6	47		T109	1		T100	1
valid_sources[0x42]	40060	1			T4	6		T6	62		T34	3
valid_sources[0x43]	41532	1			T8	1		T12	1		T6	109
valid_sources[0x44]	40984	1			T9	14		T6	72		T7	337
valid_sources[0x45]	40581	1			T6	106		T7	467		T133	1
valid_sources[0x46]	41607	1			T6	137		T34	1		T109	5
valid_sources[0x47]	39528	1			T6	85		T7	388		T154	10
valid_sources[0x48]	41853	1			T2	2		T6	50		T34	5
valid_sources[0x49]	40718	1			T6	50		T7	744		T112	1
valid_sources[0x4a]	40713	1			T6	41		T7	125		T133	2
valid_sources[0x4b]	40361	1			T2	1		T12	1		T6	119
valid_sources[0x4c]	42147	1			T12	4		T6	116		T7	267
valid_sources[0x4d]	40748	1			T2	4		T6	82		T7	477
valid_sources[0x4e]	40316	1			T6	55		T7	127		T154	14
valid_sources[0x4f]	38173	1			T4	17		T9	9		T6	96
valid_sources[0x50]	41733	1			T2	1		T6	44		T34	6
valid_sources[0x51]	39300	1			T12	3		T6	85		T7	112
valid_sources[0x52]	40162	1			T6	105		T7	224		T133	2
valid_sources[0x53]	41542	1			T8	1		T12	1		T6	75
valid_sources[0x54]	40574	1			T4	38		T6	76		T7	408
valid_sources[0x55]	40392	1			T8	1		T12	2		T6	37
valid_sources[0x56]	40355	1			T6	54		T34	3		T7	393
valid_sources[0x57]	41041	1			T12	1		T6	72		T7	558
valid_sources[0x58]	40174	1			T6	70		T34	5		T7	190
valid_sources[0x59]	41483	1			T12	2		T6	138		T7	159
valid_sources[0x5a]	40693	1			T12	1		T6	62		T7	224
valid_sources[0x5b]	40219	1			T4	8		T6	70		T34	3
valid_sources[0x5c]	38990	1			T9	1		T6	50		T7	201
valid_sources[0x5d]	38919	1			T6	79		T7	155		T13	550
valid_sources[0x5e]	42794	1			T6	105		T7	201		T112	1
valid_sources[0x5f]	39046	1			T2	1		T12	2		T6	88
valid_sources[0x60]	37479	1			T2	1		T6	66		T34	2
valid_sources[0x61]	39998	1			T12	1		T6	49		T7	161
valid_sources[0x62]	39484	1			T12	1		T6	89		T7	36
valid_sources[0x63]	40696	1			T6	51		T113	3		T107	1
valid_sources[0x64]	40063	1			T6	93		T7	719		T68	1
valid_sources[0x65]	41877	1			T9	1		T12	2		T6	47
valid_sources[0x66]	40901	1			T12	1		T6	113		T34	3
valid_sources[0x67]	38815	1			T4	2		T9	4		T12	2
valid_sources[0x68]	41572	1			T12	1		T6	61		T7	81
valid_sources[0x69]	40991	1			T12	3		T6	98		T7	47
valid_sources[0x6a]	41317	1			T12	2		T6	103		T7	349
valid_sources[0x6b]	40155	1			T12	1		T6	109		T13	568
valid_sources[0x6c]	39830	1			T6	63		T7	1028		T109	1
valid_sources[0x6d]	38718	1			T6	78		T7	40		T147	4
valid_sources[0x6e]	41966	1			T12	3		T6	86		T7	754
valid_sources[0x6f]	41857	1			T11	20		T12	4		T6	62
valid_sources[0x70]	39911	1			T9	2		T12	1		T6	60
valid_sources[0x71]	40904	1			T12	1		T6	62		T7	309
valid_sources[0x72]	43857	1			T4	20		T6	98		T7	482
valid_sources[0x73]	40208	1			T6	50		T13	586		T25	349
valid_sources[0x74]	39444	1			T6	61		T68	3		T13	528
valid_sources[0x75]	39224	1			T6	109		T7	246		T101	4
valid_sources[0x76]	41710	1			T6	130		T7	121		T109	1
valid_sources[0x77]	38143	1			T9	2		T6	77		T7	220
valid_sources[0x78]	41304	1			T4	41		T12	1		T6	161
valid_sources[0x79]	38864	1			T6	35		T34	1		T7	47
valid_sources[0x7a]	40704	1			T6	79		T109	2		T113	2
valid_sources[0x7b]	40176	1			T2	1		T12	1		T6	49
valid_sources[0x7c]	42544	1			T6	91		T7	191		T154	37
valid_sources[0x7d]	41484	1			T6	74		T7	1700		T109	1
valid_sources[0x7e]	41001	1			T9	1		T12	1		T6	102
valid_sources[0x7f]	43311	1			T6	90		T7	118		T154	5
valid_sources[0x80]	40714	1			T12	1		T6	68		T7	212

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

2569621

1

T1

30

T2

20

T3

20

values[0x0]

all_enables

biggest_size

3774602

1

T1

16

T2

11

T3

9

values[0x1]

all_enables

biggest_size

3771261

1

T1

14

T2

9

T3

11