Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	5778570	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

5580267

1

T1

158

T2

141

T3

226

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	6697048	1			T1	1565		T2	726		T3	516
values[0x0]	1783889	1			T1	40		T2	27		T3	140
values[0x1]	2877900	1			T1	20		T2	26		T3	146

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	3770710	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

7588127

1

T1

646

T2

320

T3

359

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	39322	1			T1	2		T3	2		T5	50
valid_sources[0x01]	35885	1			T1	3		T5	72		T8	8
valid_sources[0x02]	38404	1			T1	13		T2	20		T5	41
valid_sources[0x03]	41799	1			T1	9		T3	4		T5	60
valid_sources[0x04]	39003	1			T1	2		T2	5		T5	54
valid_sources[0x05]	38132	1			T1	12		T2	1		T3	10
valid_sources[0x06]	38821	1			T1	16		T2	12		T3	1
valid_sources[0x07]	40477	1			T1	6		T2	2		T5	43
valid_sources[0x08]	41425	1			T1	18		T5	42		T8	5
valid_sources[0x09]	41293	1			T1	13		T5	34		T8	8
valid_sources[0x0a]	43959	1			T1	4		T2	7		T5	57
valid_sources[0x0b]	43972	1			T1	7		T5	49		T8	5
valid_sources[0x0c]	37101	1			T1	25		T3	1		T5	58
valid_sources[0x0d]	127019	1			T1	12		T5	54		T8	16
valid_sources[0x0e]	38143	1			T1	7		T3	19		T5	42
valid_sources[0x0f]	40871	1			T1	12		T2	30		T5	57
valid_sources[0x10]	37950	1			T1	4		T2	7		T3	5
valid_sources[0x11]	44192	1			T1	2		T5	53		T8	14
valid_sources[0x12]	44275	1			T2	18		T5	45		T8	1
valid_sources[0x13]	39772	1			T1	6		T3	6		T5	52
valid_sources[0x14]	42319	1			T1	3		T3	4		T5	41
valid_sources[0x15]	40801	1			T1	7		T2	5		T5	50
valid_sources[0x16]	46456	1			T1	3		T5	54		T8	12
valid_sources[0x17]	40894	1			T1	10		T5	48		T8	16
valid_sources[0x18]	44399	1			T1	14		T3	3		T5	55
valid_sources[0x19]	37794	1			T1	5		T2	4		T5	61
valid_sources[0x1a]	41264	1			T1	12		T5	64		T8	17
valid_sources[0x1b]	39807	1			T1	19		T3	11		T5	46
valid_sources[0x1c]	42626	1			T1	13		T2	6		T5	54
valid_sources[0x1d]	47227	1			T1	16		T3	1		T5	48
valid_sources[0x1e]	42494	1			T1	1		T2	18		T3	25
valid_sources[0x1f]	48017	1			T1	2		T3	4		T5	45
valid_sources[0x20]	39484	1			T1	3		T5	57		T8	8
valid_sources[0x21]	39878	1			T1	5		T2	2		T3	9
valid_sources[0x22]	38797	1			T1	11		T2	7		T3	10
valid_sources[0x23]	40405	1			T1	9		T5	49		T8	15
valid_sources[0x24]	39827	1			T1	4		T2	16		T5	55
valid_sources[0x25]	43635	1			T1	12		T2	9		T3	2
valid_sources[0x26]	42084	1			T2	5		T3	6		T5	53
valid_sources[0x27]	53279	1			T1	5		T5	50		T8	5
valid_sources[0x28]	41031	1			T1	16		T3	5		T5	66
valid_sources[0x29]	41353	1			T2	6		T5	40		T8	9
valid_sources[0x2a]	40085	1			T1	16		T3	7		T5	45
valid_sources[0x2b]	38867	1			T3	2		T5	64		T8	10
valid_sources[0x2c]	41195	1			T1	3		T5	52		T8	16
valid_sources[0x2d]	39843	1			T1	6		T3	14		T5	45
valid_sources[0x2e]	48915	1			T5	52		T8	7		T4	23
valid_sources[0x2f]	40306	1			T1	2		T5	54		T8	9
valid_sources[0x30]	42336	1			T1	15		T2	4		T5	61
valid_sources[0x31]	40136	1			T1	5		T2	2		T5	36
valid_sources[0x32]	39217	1			T1	10		T2	20		T3	15
valid_sources[0x33]	44867	1			T1	11		T5	44		T8	2
valid_sources[0x34]	38834	1			T1	6		T2	28		T5	46
valid_sources[0x35]	37908	1			T2	6		T3	1		T5	51
valid_sources[0x36]	47545	1			T1	7		T5	49		T4	12
valid_sources[0x37]	37169	1			T1	6		T5	51		T8	1
valid_sources[0x38]	38448	1			T1	6		T5	57		T8	4
valid_sources[0x39]	94718	1			T1	8		T2	10		T5	65
valid_sources[0x3a]	38245	1			T1	5		T5	45		T8	26
valid_sources[0x3b]	42148	1			T1	7		T5	55		T8	1
valid_sources[0x3c]	37857	1			T1	17		T5	55		T8	5
valid_sources[0x3d]	50817	1			T1	13		T5	73		T8	8
valid_sources[0x3e]	59017	1			T2	5		T3	8		T5	61
valid_sources[0x3f]	41338	1			T1	3		T2	12		T5	55
valid_sources[0x40]	50266	1			T1	2		T5	52		T8	26
valid_sources[0x41]	45839	1			T1	5		T2	28		T5	67
valid_sources[0x42]	39298	1			T5	42		T8	21		T4	7
valid_sources[0x43]	37413	1			T1	1		T2	2		T3	8
valid_sources[0x44]	56443	1			T1	8		T5	57		T8	15
valid_sources[0x45]	36761	1			T1	13		T3	2		T5	59
valid_sources[0x46]	43411	1			T1	5		T3	2		T5	62
valid_sources[0x47]	38322	1			T1	14		T5	43		T8	2
valid_sources[0x48]	73348	1			T1	8		T3	5		T5	45
valid_sources[0x49]	42116	1			T5	62		T8	10		T4	11
valid_sources[0x4a]	40688	1			T5	40		T8	14		T4	17
valid_sources[0x4b]	49730	1			T1	3		T5	43		T8	21
valid_sources[0x4c]	50739	1			T1	7		T2	19		T3	2
valid_sources[0x4d]	37048	1			T1	5		T3	3		T5	44
valid_sources[0x4e]	42908	1			T1	5		T5	59		T8	15
valid_sources[0x4f]	40676	1			T1	14		T5	53		T8	7
valid_sources[0x50]	39740	1			T1	1		T5	52		T8	8
valid_sources[0x51]	46008	1			T1	6		T5	55		T8	6
valid_sources[0x52]	42191	1			T1	7		T3	8		T5	48
valid_sources[0x53]	40548	1			T1	18		T5	59		T8	9
valid_sources[0x54]	38598	1			T1	3		T2	13		T3	3
valid_sources[0x55]	37872	1			T2	2		T5	59		T8	11
valid_sources[0x56]	41605	1			T1	8		T3	5		T5	61
valid_sources[0x57]	42071	1			T1	1		T5	42		T8	1
valid_sources[0x58]	41326	1			T1	4		T3	14		T5	63
valid_sources[0x59]	39171	1			T2	2		T5	39		T4	29
valid_sources[0x5a]	50435	1			T1	5		T5	40		T8	8
valid_sources[0x5b]	38676	1			T1	1		T2	8		T5	53
valid_sources[0x5c]	136465	1			T1	6		T5	55		T8	10
valid_sources[0x5d]	38096	1			T1	1		T3	7		T5	55
valid_sources[0x5e]	38194	1			T1	5		T2	8		T5	55
valid_sources[0x5f]	38630	1			T1	3		T2	9		T3	20
valid_sources[0x60]	37409	1			T1	4		T3	17		T5	53
valid_sources[0x61]	42097	1			T1	1		T2	15		T3	18
valid_sources[0x62]	36639	1			T1	13		T2	4		T3	5
valid_sources[0x63]	42347	1			T1	16		T2	28		T5	54
valid_sources[0x64]	38739	1			T1	7		T5	76		T8	4
valid_sources[0x65]	40730	1			T1	6		T5	46		T8	9
valid_sources[0x66]	37975	1			T5	60		T8	2		T4	5
valid_sources[0x67]	36618	1			T1	1		T2	5		T3	1
valid_sources[0x68]	40641	1			T1	9		T3	2		T5	51
valid_sources[0x69]	45494	1			T1	9		T3	2		T5	48
valid_sources[0x6a]	44577	1			T1	2		T3	7		T5	51
valid_sources[0x6b]	36667	1			T1	5		T5	40		T8	5
valid_sources[0x6c]	37243	1			T1	3		T2	11		T3	2
valid_sources[0x6d]	38981	1			T1	8		T5	37		T8	11
valid_sources[0x6e]	38564	1			T1	10		T2	3		T3	5
valid_sources[0x6f]	97119	1			T2	1		T5	46		T4	23
valid_sources[0x70]	55308	1			T1	7		T5	65		T8	4
valid_sources[0x71]	46327	1			T1	14		T2	6		T3	6
valid_sources[0x72]	41859	1			T5	46		T8	7		T9	8
valid_sources[0x73]	42923	1			T1	14		T5	47		T8	4
valid_sources[0x74]	40363	1			T1	6		T3	5		T5	44
valid_sources[0x75]	39292	1			T1	2		T5	57		T8	4
valid_sources[0x76]	50947	1			T1	3		T2	3		T3	13
valid_sources[0x77]	47266	1			T1	13		T2	7		T3	26
valid_sources[0x78]	37523	1			T1	15		T5	59		T8	7
valid_sources[0x79]	49310	1			T1	10		T3	5		T5	59
valid_sources[0x7a]	39307	1			T1	6		T2	1		T3	3
valid_sources[0x7b]	43635	1			T1	8		T2	21		T5	66
valid_sources[0x7c]	40316	1			T1	5		T2	5		T3	7
valid_sources[0x7d]	39164	1			T1	11		T3	14		T5	56
valid_sources[0x7e]	49763	1			T1	3		T3	2		T5	60
valid_sources[0x7f]	42270	1			T1	4		T5	58		T8	21
valid_sources[0x80]	38498	1			T1	9		T5	50		T8	16

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

2708550

1

T1

130

T2

125

T3

115

values[0x0]

all_enables

biggest_size

1469034

1

T1

22

T2

11

T3

58

values[0x1]

all_enables

biggest_size

1402683

1

T1

6

T2

5

T3

53

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	191192	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

6831351

1

T1

40

T2

40

T5

20

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	1753114	1			T1	20		T2	20		T5	10
values[0x0]	2559686	1			T1	9		T2	12		T5	6
values[0x1]	2709743	1			T1	11		T2	8		T5	4

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	70220	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

6952323

1

T1

40

T2

40

T5

20

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	27533	1			T6	677		T13	335		T109	1
valid_sources[0x01]	27159	1			T8	1		T29	2		T6	728
valid_sources[0x02]	27335	1			T12	1		T29	2		T67	1
valid_sources[0x03]	27266	1			T1	1		T39	2		T6	1091
valid_sources[0x04]	26597	1			T12	1		T29	2		T103	1
valid_sources[0x05]	27500	1			T8	1		T12	3		T103	1
valid_sources[0x06]	27565	1			T6	500		T13	349		T113	1
valid_sources[0x07]	27802	1			T8	4		T29	2		T6	479
valid_sources[0x08]	26938	1			T2	2		T67	1		T6	530
valid_sources[0x09]	28438	1			T1	2		T6	550		T13	150
valid_sources[0x0a]	27256	1			T8	1		T10	1		T29	1
valid_sources[0x0b]	27224	1			T2	6		T10	2		T12	1
valid_sources[0x0c]	28312	1			T12	2		T29	1		T67	1
valid_sources[0x0d]	27285	1			T6	521		T13	277		T14	186
valid_sources[0x0e]	27419	1			T5	1		T29	1		T6	620
valid_sources[0x0f]	27323	1			T6	834		T13	520		T14	237
valid_sources[0x10]	28287	1			T8	3		T6	489		T13	392
valid_sources[0x11]	27699	1			T8	3		T6	588		T7	1
valid_sources[0x12]	28112	1			T103	1		T67	2		T6	762
valid_sources[0x13]	28062	1			T8	1		T12	2		T67	1
valid_sources[0x14]	27209	1			T10	1		T29	1		T67	2
valid_sources[0x15]	28529	1			T8	1		T29	1		T6	750
valid_sources[0x16]	28133	1			T12	1		T29	2		T39	2
valid_sources[0x17]	27189	1			T10	2		T103	1		T67	2
valid_sources[0x18]	28579	1			T39	2		T6	808		T13	260
valid_sources[0x19]	27918	1			T67	3		T39	3		T6	375
valid_sources[0x1a]	27024	1			T8	1		T10	2		T6	552
valid_sources[0x1b]	26464	1			T5	3		T8	1		T10	1
valid_sources[0x1c]	26930	1			T1	1		T12	2		T29	1
valid_sources[0x1d]	27285	1			T1	5		T29	1		T6	488
valid_sources[0x1e]	27428	1			T10	5		T29	2		T6	882
valid_sources[0x1f]	26117	1			T10	3		T12	1		T29	2
valid_sources[0x20]	26035	1			T10	1		T12	1		T29	1
valid_sources[0x21]	27333	1			T29	1		T67	1		T6	1094
valid_sources[0x22]	26542	1			T1	3		T8	3		T10	6
valid_sources[0x23]	26549	1			T8	1		T12	1		T6	434
valid_sources[0x24]	27465	1			T8	1		T10	1		T6	390
valid_sources[0x25]	27569	1			T8	1		T9	1		T29	1
valid_sources[0x26]	26726	1			T8	1		T12	1		T39	1
valid_sources[0x27]	26636	1			T8	3		T12	2		T67	2
valid_sources[0x28]	27476	1			T6	490		T13	152		T333	2
valid_sources[0x29]	28403	1			T1	1		T8	3		T67	1
valid_sources[0x2a]	26493	1			T67	1		T6	727		T13	182
valid_sources[0x2b]	27165	1			T8	2		T10	5		T29	2
valid_sources[0x2c]	27705	1			T8	2		T6	434		T13	240
valid_sources[0x2d]	27141	1			T8	2		T28	180		T67	1
valid_sources[0x2e]	28430	1			T39	1		T6	733		T13	353
valid_sources[0x2f]	26965	1			T1	1		T5	1		T8	2
valid_sources[0x30]	28153	1			T12	1		T39	2		T6	1052
valid_sources[0x31]	28605	1			T12	1		T29	4		T6	561
valid_sources[0x32]	27714	1			T5	1		T8	2		T67	3
valid_sources[0x33]	27491	1			T8	1		T29	4		T67	1
valid_sources[0x34]	26547	1			T2	1		T8	1		T12	1
valid_sources[0x35]	27772	1			T67	1		T6	651		T13	446
valid_sources[0x36]	27826	1			T12	1		T6	655		T13	281
valid_sources[0x37]	27659	1			T8	1		T12	1		T6	1202
valid_sources[0x38]	27963	1			T103	1		T6	697		T13	220
valid_sources[0x39]	27374	1			T29	1		T67	1		T6	772
valid_sources[0x3a]	27096	1			T6	543		T13	306		T113	1
valid_sources[0x3b]	26981	1			T2	1		T8	1		T6	661
valid_sources[0x3c]	28018	1			T5	2		T8	1		T12	4
valid_sources[0x3d]	27209	1			T8	1		T10	3		T12	1
valid_sources[0x3e]	28087	1			T1	2		T12	2		T39	3
valid_sources[0x3f]	27746	1			T67	3		T39	3		T6	462
valid_sources[0x40]	26586	1			T12	2		T29	1		T6	495
valid_sources[0x41]	28245	1			T5	1		T12	1		T29	1
valid_sources[0x42]	27050	1			T102	1		T6	562		T7	1
valid_sources[0x43]	27491	1			T8	4		T12	1		T67	1
valid_sources[0x44]	26653	1			T12	1		T67	2		T39	1
valid_sources[0x45]	27664	1			T29	1		T6	799		T13	500
valid_sources[0x46]	26959	1			T4	10		T12	2		T6	424
valid_sources[0x47]	27364	1			T8	3		T12	4		T29	2
valid_sources[0x48]	27644	1			T12	2		T6	618		T13	364
valid_sources[0x49]	27184	1			T8	1		T12	1		T29	2
valid_sources[0x4a]	27922	1			T8	1		T29	1		T67	1
valid_sources[0x4b]	29331	1			T6	782		T13	459		T14	179
valid_sources[0x4c]	27947	1			T8	2		T102	1		T29	1
valid_sources[0x4d]	27137	1			T8	1		T12	2		T29	2
valid_sources[0x4e]	28095	1			T8	2		T29	2		T67	1
valid_sources[0x4f]	26782	1			T103	1		T6	506		T13	438
valid_sources[0x50]	27943	1			T8	1		T29	1		T6	499
valid_sources[0x51]	27887	1			T2	1		T12	2		T6	650
valid_sources[0x52]	27880	1			T8	4		T6	674		T13	296
valid_sources[0x53]	27837	1			T8	1		T67	2		T6	506
valid_sources[0x54]	26764	1			T8	1		T12	2		T67	1
valid_sources[0x55]	27273	1			T12	1		T6	529		T13	310
valid_sources[0x56]	26621	1			T8	1		T12	1		T6	572
valid_sources[0x57]	27295	1			T8	1		T12	2		T67	1
valid_sources[0x58]	28669	1			T8	1		T12	2		T29	1
valid_sources[0x59]	28112	1			T29	1		T6	731		T7	1
valid_sources[0x5a]	27792	1			T29	2		T103	1		T6	694
valid_sources[0x5b]	26655	1			T103	1		T6	548		T7	1
valid_sources[0x5c]	27668	1			T8	1		T12	1		T6	599
valid_sources[0x5d]	27715	1			T8	4		T29	2		T6	674
valid_sources[0x5e]	27571	1			T1	2		T2	4		T8	1
valid_sources[0x5f]	27295	1			T8	2		T12	1		T39	8
valid_sources[0x60]	27376	1			T8	3		T10	1		T12	1
valid_sources[0x61]	27589	1			T8	1		T6	587		T13	495
valid_sources[0x62]	27311	1			T2	2		T102	1		T29	1
valid_sources[0x63]	27841	1			T102	1		T67	1		T6	1015
valid_sources[0x64]	27900	1			T12	2		T6	436		T13	402
valid_sources[0x65]	27519	1			T8	1		T29	2		T67	1
valid_sources[0x66]	28054	1			T6	603		T13	584		T333	1
valid_sources[0x67]	27958	1			T1	2		T2	1		T29	1
valid_sources[0x68]	27784	1			T1	1		T8	2		T10	1
valid_sources[0x69]	26115	1			T8	1		T10	3		T12	1
valid_sources[0x6a]	26799	1			T5	1		T8	1		T6	546
valid_sources[0x6b]	28529	1			T29	1		T67	1		T6	525
valid_sources[0x6c]	26877	1			T8	1		T12	1		T29	4
valid_sources[0x6d]	27571	1			T10	2		T102	1		T29	1
valid_sources[0x6e]	28270	1			T1	1		T12	1		T67	1
valid_sources[0x6f]	27695	1			T2	2		T103	1		T6	467
valid_sources[0x70]	27738	1			T1	1		T39	3		T6	603
valid_sources[0x71]	27609	1			T8	1		T103	1		T67	1
valid_sources[0x72]	26727	1			T10	2		T12	1		T6	439
valid_sources[0x73]	26662	1			T8	1		T6	366		T13	318
valid_sources[0x74]	27663	1			T8	1		T12	1		T102	1
valid_sources[0x75]	27600	1			T12	1		T6	466		T13	290
valid_sources[0x76]	27291	1			T9	5		T12	1		T102	1
valid_sources[0x77]	26231	1			T2	3		T10	5		T12	2
valid_sources[0x78]	26838	1			T8	1		T12	1		T29	1
valid_sources[0x79]	27082	1			T29	1		T6	469		T13	487
valid_sources[0x7a]	27698	1			T29	1		T6	478		T7	1
valid_sources[0x7b]	26599	1			T6	589		T13	447		T14	185
valid_sources[0x7c]	27066	1			T29	4		T6	720		T13	286
valid_sources[0x7d]	28044	1			T12	2		T6	630		T13	281
valid_sources[0x7e]	28969	1			T29	2		T67	2		T6	636
valid_sources[0x7f]	26727	1			T6	450		T13	295		T109	1
valid_sources[0x80]	27462	1			T12	2		T102	1		T6	537

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

1740064

1

T1

20

T2

20

T5

10

values[0x0]

all_enables

biggest_size

2546623

1

T1

9

T2

12

T5

6

values[0x1]

all_enables

biggest_size

2544664

1

T1

11

T2

8

T5

4