Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	6961073	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

6736824

1

T1

190

T2

294

T3

5351

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	8074633	1			T1	400		T2	1035		T3	5209
values[0x0]	2153362	1			T1	112		T2	154		T3	3764
values[0x1]	3469902	1			T1	117		T2	161		T3	3880

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	4545957	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

9151940

1

T1

312

T2

602

T3

7008

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	55018	1			T1	2		T4	665		T5	29
valid_sources[0x01]	54130	1			T1	2		T2	21		T4	608
valid_sources[0x02]	46038	1			T1	1		T2	14		T4	682
valid_sources[0x03]	50127	1			T1	3		T2	5		T4	597
valid_sources[0x04]	47459	1			T1	2		T4	713		T9	2
valid_sources[0x05]	49459	1			T1	3		T4	634		T9	13
valid_sources[0x06]	48848	1			T1	3		T2	10		T4	622
valid_sources[0x07]	47613	1			T1	3		T2	5		T4	650
valid_sources[0x08]	52230	1			T1	2		T2	1		T4	688
valid_sources[0x09]	64710	1			T1	3		T2	2		T4	609
valid_sources[0x0a]	50493	1			T1	1		T4	663		T9	5
valid_sources[0x0b]	50243	1			T1	1		T2	18		T4	546
valid_sources[0x0c]	47970	1			T1	3		T2	4		T4	607
valid_sources[0x0d]	47894	1			T1	3		T2	1		T4	637
valid_sources[0x0e]	53767	1			T2	11		T4	532		T5	22
valid_sources[0x0f]	49575	1			T1	4		T2	2		T4	500
valid_sources[0x10]	53032	1			T1	3		T2	11		T4	639
valid_sources[0x11]	48770	1			T1	3		T2	7		T4	585
valid_sources[0x12]	102658	1			T1	1		T4	462		T5	8
valid_sources[0x13]	54793	1			T1	3		T2	9		T4	645
valid_sources[0x14]	49558	1			T1	3		T4	674		T9	5
valid_sources[0x15]	51868	1			T1	2		T4	564		T5	4
valid_sources[0x16]	52074	1			T2	10		T4	558		T5	8
valid_sources[0x17]	49576	1			T1	2		T2	3		T4	653
valid_sources[0x18]	47756	1			T1	1		T4	684		T5	11
valid_sources[0x19]	62362	1			T1	4		T2	2		T4	506
valid_sources[0x1a]	57467	1			T1	5		T2	7		T4	652
valid_sources[0x1b]	51737	1			T1	3		T2	3		T4	620
valid_sources[0x1c]	52146	1			T1	2		T2	1		T4	601
valid_sources[0x1d]	48082	1			T1	3		T4	443		T9	17
valid_sources[0x1e]	51015	1			T1	4		T2	11		T4	615
valid_sources[0x1f]	55676	1			T1	4		T4	556		T5	3
valid_sources[0x20]	95314	1			T1	1		T2	6		T4	595
valid_sources[0x21]	47465	1			T1	5		T4	570		T5	21
valid_sources[0x22]	46745	1			T1	6		T2	5		T4	606
valid_sources[0x23]	48553	1			T4	501		T6	1059		T11	1
valid_sources[0x24]	46780	1			T1	5		T2	9		T4	526
valid_sources[0x25]	47576	1			T1	3		T2	15		T4	636
valid_sources[0x26]	47348	1			T1	2		T2	13		T4	604
valid_sources[0x27]	65222	1			T2	4		T3	12853		T4	704
valid_sources[0x28]	50447	1			T1	4		T4	584		T5	13
valid_sources[0x29]	86860	1			T1	4		T2	9		T4	675
valid_sources[0x2a]	49216	1			T1	3		T4	613		T5	8
valid_sources[0x2b]	48042	1			T1	3		T2	3		T4	609
valid_sources[0x2c]	51430	1			T2	4		T4	612		T9	6
valid_sources[0x2d]	48360	1			T1	2		T4	597		T5	7
valid_sources[0x2e]	46389	1			T1	1		T2	9		T4	636
valid_sources[0x2f]	49189	1			T1	4		T2	2		T4	660
valid_sources[0x30]	50999	1			T1	3		T4	561		T5	7
valid_sources[0x31]	46949	1			T1	2		T4	569		T5	7
valid_sources[0x32]	48730	1			T1	1		T4	643		T5	18
valid_sources[0x33]	57567	1			T2	3		T4	522		T9	18
valid_sources[0x34]	48037	1			T1	3		T2	2		T4	551
valid_sources[0x35]	47364	1			T1	2		T2	4		T4	456
valid_sources[0x36]	48071	1			T2	8		T4	646		T10	2
valid_sources[0x37]	49532	1			T2	6		T4	639		T5	15
valid_sources[0x38]	53632	1			T1	2		T2	7		T4	551
valid_sources[0x39]	48650	1			T1	2		T2	9		T4	600
valid_sources[0x3a]	49785	1			T1	2		T4	704		T5	14
valid_sources[0x3b]	47639	1			T1	3		T4	518		T9	8
valid_sources[0x3c]	49839	1			T1	3		T2	20		T4	611
valid_sources[0x3d]	52122	1			T1	4		T2	8		T4	679
valid_sources[0x3e]	48484	1			T1	2		T2	3		T4	640
valid_sources[0x3f]	47565	1			T4	658		T5	22		T9	7
valid_sources[0x40]	63563	1			T1	1		T4	578		T5	1
valid_sources[0x41]	51362	1			T1	3		T4	515		T5	11
valid_sources[0x42]	48127	1			T1	3		T2	15		T4	532
valid_sources[0x43]	48538	1			T1	8		T2	6		T4	617
valid_sources[0x44]	48446	1			T1	2		T2	5		T4	511
valid_sources[0x45]	50849	1			T1	2		T4	542		T9	10
valid_sources[0x46]	51776	1			T1	1		T2	11		T4	581
valid_sources[0x47]	46895	1			T1	3		T2	6		T4	657
valid_sources[0x48]	47124	1			T1	3		T2	24		T4	508
valid_sources[0x49]	49150	1			T1	3		T4	645		T9	2
valid_sources[0x4a]	50314	1			T2	16		T4	661		T9	5
valid_sources[0x4b]	46467	1			T1	3		T2	6		T4	523
valid_sources[0x4c]	61246	1			T1	3		T4	677		T5	13
valid_sources[0x4d]	47677	1			T1	5		T2	16		T4	683
valid_sources[0x4e]	57509	1			T2	17		T4	734		T9	4
valid_sources[0x4f]	52754	1			T1	2		T2	2		T4	481
valid_sources[0x50]	49388	1			T1	4		T2	4		T4	618
valid_sources[0x51]	57054	1			T1	2		T2	2		T4	578
valid_sources[0x52]	47062	1			T1	4		T2	9		T4	508
valid_sources[0x53]	49456	1			T1	2		T2	8		T4	539
valid_sources[0x54]	47945	1			T1	3		T4	596		T9	11
valid_sources[0x55]	48649	1			T1	4		T4	664		T9	7
valid_sources[0x56]	49461	1			T1	5		T4	577		T9	5
valid_sources[0x57]	45569	1			T1	6		T2	3		T4	614
valid_sources[0x58]	47864	1			T1	2		T2	9		T4	548
valid_sources[0x59]	52146	1			T1	3		T4	600		T5	9
valid_sources[0x5a]	47984	1			T1	3		T2	5		T4	632
valid_sources[0x5b]	48134	1			T1	3		T4	541		T9	1
valid_sources[0x5c]	49846	1			T1	1		T2	1		T4	698
valid_sources[0x5d]	49871	1			T1	3		T2	17		T4	599
valid_sources[0x5e]	50732	1			T1	3		T2	2		T4	559
valid_sources[0x5f]	54275	1			T1	1		T2	18		T4	733
valid_sources[0x60]	46597	1			T1	5		T2	14		T4	534
valid_sources[0x61]	50251	1			T1	4		T2	11		T4	596
valid_sources[0x62]	47867	1			T4	672		T5	14		T9	9
valid_sources[0x63]	50821	1			T1	3		T2	11		T4	583
valid_sources[0x64]	48561	1			T1	3		T2	5		T4	594
valid_sources[0x65]	49044	1			T1	2		T2	2		T4	683
valid_sources[0x66]	51880	1			T1	3		T2	3		T4	568
valid_sources[0x67]	50475	1			T1	2		T4	574		T9	4
valid_sources[0x68]	48255	1			T1	1		T2	15		T4	592
valid_sources[0x69]	48463	1			T1	1		T2	12		T4	583
valid_sources[0x6a]	52866	1			T1	4		T4	731		T9	9
valid_sources[0x6b]	47418	1			T1	1		T2	1		T4	546
valid_sources[0x6c]	50392	1			T1	1		T2	1		T4	620
valid_sources[0x6d]	52004	1			T1	4		T2	6		T4	561
valid_sources[0x6e]	51035	1			T1	1		T2	7		T4	523
valid_sources[0x6f]	48709	1			T1	1		T2	3		T4	686
valid_sources[0x70]	48457	1			T1	2		T4	564		T9	11
valid_sources[0x71]	58640	1			T1	4		T2	26		T4	576
valid_sources[0x72]	47987	1			T1	6		T4	513		T5	2
valid_sources[0x73]	46849	1			T1	3		T2	3		T4	613
valid_sources[0x74]	47853	1			T1	5		T4	531		T5	2
valid_sources[0x75]	66897	1			T2	4		T4	545		T9	5
valid_sources[0x76]	54718	1			T1	3		T2	4		T4	465
valid_sources[0x77]	78834	1			T2	5		T4	597		T9	6
valid_sources[0x78]	51296	1			T1	4		T2	1		T4	551
valid_sources[0x79]	51835	1			T1	3		T2	3		T4	550
valid_sources[0x7a]	50795	1			T4	594		T9	1		T10	3
valid_sources[0x7b]	47662	1			T1	1		T2	9		T4	526
valid_sources[0x7c]	50452	1			T1	2		T2	15		T4	555
valid_sources[0x7d]	48224	1			T1	2		T2	5		T4	653
valid_sources[0x7e]	59518	1			T2	8		T4	570		T5	46
valid_sources[0x7f]	51048	1			T1	1		T2	4		T4	584
valid_sources[0x80]	50495	1			T1	1		T4	621		T5	5

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

3271895

1

T1

95

T2

162

T3

1728

values[0x0]

all_enables

biggest_size

1771896

1

T1

47

T2

75

T3

2012

values[0x1]

all_enables

biggest_size

1693033

1

T1

48

T2

57

T3

1611

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	231186	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

8209066

1

T4

191094

T5

80

T8

200

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	2106005	1			T4	47766		T5	40		T8	100
values[0x0]	3076145	1			T4	71952		T5	19		T8	62
values[0x1]	3258102	1			T4	76363		T5	21		T8	38

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	84073	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

8356179

1

T4

194376

T5

80

T8

200

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	34000	1			T4	692		T6	1127		T7	409
valid_sources[0x01]	32329	1			T4	986		T6	1058		T105	2
valid_sources[0x02]	31908	1			T4	787		T6	1131		T7	477
valid_sources[0x03]	31294	1			T4	749		T5	4		T6	1135
valid_sources[0x04]	32946	1			T4	743		T6	1073		T105	1
valid_sources[0x05]	33466	1			T4	679		T6	1109		T105	1
valid_sources[0x06]	33682	1			T4	975		T6	1169		T11	1
valid_sources[0x07]	32745	1			T4	523		T6	1151		T105	2
valid_sources[0x08]	32660	1			T4	434		T5	4		T6	1094
valid_sources[0x09]	32152	1			T4	685		T6	1126		T7	508
valid_sources[0x0a]	32349	1			T4	905		T6	1128		T7	455
valid_sources[0x0b]	32420	1			T4	747		T5	1		T6	1107
valid_sources[0x0c]	32861	1			T4	530		T5	3		T9	1
valid_sources[0x0d]	31350	1			T4	767		T6	1154		T105	1
valid_sources[0x0e]	32534	1			T4	430		T9	1		T6	1123
valid_sources[0x0f]	35385	1			T4	326		T6	1145		T105	2
valid_sources[0x10]	33823	1			T4	753		T6	1158		T105	1
valid_sources[0x11]	32965	1			T4	849		T6	1134		T11	1
valid_sources[0x12]	32885	1			T4	873		T6	1147		T105	1
valid_sources[0x13]	33885	1			T4	981		T5	1		T6	1147
valid_sources[0x14]	33772	1			T4	684		T6	1157		T11	4
valid_sources[0x15]	31730	1			T4	635		T5	3		T6	1132
valid_sources[0x16]	32455	1			T4	832		T9	4		T6	1117
valid_sources[0x17]	33707	1			T4	1010		T9	1		T6	1174
valid_sources[0x18]	33520	1			T4	839		T6	1106		T7	426
valid_sources[0x19]	32788	1			T4	750		T6	1193		T105	1
valid_sources[0x1a]	30747	1			T4	447		T6	1162		T7	428
valid_sources[0x1b]	36106	1			T4	885		T6	1099		T7	443
valid_sources[0x1c]	32286	1			T4	627		T6	1169		T105	1
valid_sources[0x1d]	32138	1			T4	842		T6	1140		T7	415
valid_sources[0x1e]	31190	1			T4	778		T6	1121		T105	3
valid_sources[0x1f]	33134	1			T4	708		T6	1180		T7	470
valid_sources[0x20]	33037	1			T4	745		T6	1151		T105	2
valid_sources[0x21]	32288	1			T4	757		T6	1179		T7	432
valid_sources[0x22]	34387	1			T4	961		T6	1142		T7	473
valid_sources[0x23]	32234	1			T4	723		T5	4		T6	1093
valid_sources[0x24]	34529	1			T4	757		T6	1139		T7	388
valid_sources[0x25]	32315	1			T4	482		T6	1147		T7	427
valid_sources[0x26]	32719	1			T4	960		T9	1		T6	1122
valid_sources[0x27]	33251	1			T4	695		T6	1150		T11	2
valid_sources[0x28]	31486	1			T4	682		T6	1142		T11	1
valid_sources[0x29]	33179	1			T4	932		T9	1		T6	1220
valid_sources[0x2a]	31017	1			T4	506		T6	1108		T105	1
valid_sources[0x2b]	35113	1			T4	922		T6	1169		T7	432
valid_sources[0x2c]	33991	1			T4	1212		T6	1089		T7	427
valid_sources[0x2d]	32802	1			T4	744		T5	1		T10	20
valid_sources[0x2e]	34585	1			T4	752		T5	5		T6	1151
valid_sources[0x2f]	32730	1			T4	866		T6	1117		T105	3
valid_sources[0x30]	32829	1			T4	692		T6	1115		T7	407
valid_sources[0x31]	33816	1			T4	634		T6	1209		T7	463
valid_sources[0x32]	31991	1			T4	953		T6	1158		T7	451
valid_sources[0x33]	32958	1			T4	970		T6	1111		T7	440
valid_sources[0x34]	32025	1			T4	891		T5	2		T6	1129
valid_sources[0x35]	34098	1			T4	656		T6	1157		T11	2
valid_sources[0x36]	32535	1			T4	741		T9	1		T6	1210
valid_sources[0x37]	32062	1			T4	970		T9	1		T6	1110
valid_sources[0x38]	33149	1			T4	731		T6	1184		T7	439
valid_sources[0x39]	32683	1			T4	699		T6	1141		T7	397
valid_sources[0x3a]	31499	1			T4	448		T6	1087		T7	459
valid_sources[0x3b]	32998	1			T4	671		T6	1156		T7	458
valid_sources[0x3c]	31885	1			T4	659		T6	1099		T7	435
valid_sources[0x3d]	32004	1			T4	968		T6	1138		T7	450
valid_sources[0x3e]	33103	1			T4	787		T6	1134		T7	425
valid_sources[0x3f]	33236	1			T4	786		T6	1120		T7	462
valid_sources[0x40]	33149	1			T4	594		T6	1115		T11	1
valid_sources[0x41]	32134	1			T4	853		T6	1134		T7	413
valid_sources[0x42]	32964	1			T4	608		T6	1183		T105	1
valid_sources[0x43]	32416	1			T4	978		T6	1217		T7	476
valid_sources[0x44]	34155	1			T4	848		T6	1106		T7	477
valid_sources[0x45]	32975	1			T4	1058		T6	1198		T7	480
valid_sources[0x46]	32715	1			T4	1069		T6	1138		T7	404
valid_sources[0x47]	33529	1			T4	615		T6	1169		T7	447
valid_sources[0x48]	31836	1			T4	682		T6	1183		T7	390
valid_sources[0x49]	32667	1			T4	275		T6	1100		T7	423
valid_sources[0x4a]	30897	1			T4	357		T6	1138		T7	432
valid_sources[0x4b]	31311	1			T4	703		T6	1111		T11	1
valid_sources[0x4c]	33946	1			T4	798		T5	3		T6	1078
valid_sources[0x4d]	33189	1			T4	571		T6	1181		T105	1
valid_sources[0x4e]	33909	1			T4	892		T6	1123		T105	1
valid_sources[0x4f]	32747	1			T4	410		T5	1		T6	1141
valid_sources[0x50]	33667	1			T4	582		T6	1126		T7	425
valid_sources[0x51]	34510	1			T4	839		T6	1164		T7	395
valid_sources[0x52]	32309	1			T4	782		T6	1126		T7	442
valid_sources[0x53]	33357	1			T4	1014		T6	1140		T7	447
valid_sources[0x54]	33182	1			T4	818		T6	1187		T7	465
valid_sources[0x55]	32253	1			T4	755		T6	1150		T7	400
valid_sources[0x56]	32807	1			T4	1058		T6	1130		T7	453
valid_sources[0x57]	34197	1			T4	892		T6	1160		T7	438
valid_sources[0x58]	33166	1			T4	730		T6	1232		T7	434
valid_sources[0x59]	30993	1			T4	594		T6	1151		T105	1
valid_sources[0x5a]	32057	1			T4	713		T8	200		T6	1133
valid_sources[0x5b]	31237	1			T4	856		T6	1097		T7	454
valid_sources[0x5c]	32045	1			T4	729		T6	1202		T7	459
valid_sources[0x5d]	33140	1			T4	880		T9	1		T6	1165
valid_sources[0x5e]	34351	1			T4	918		T6	1120		T7	479
valid_sources[0x5f]	34047	1			T4	416		T6	1097		T105	1
valid_sources[0x60]	32134	1			T4	710		T6	1140		T105	1
valid_sources[0x61]	33828	1			T4	1066		T6	1124		T7	485
valid_sources[0x62]	32286	1			T4	555		T6	1113		T105	3
valid_sources[0x63]	33438	1			T4	661		T6	1074		T105	1
valid_sources[0x64]	33148	1			T4	1036		T6	1093		T7	419
valid_sources[0x65]	33045	1			T4	906		T6	1098		T11	1
valid_sources[0x66]	32655	1			T4	539		T6	1123		T105	1
valid_sources[0x67]	31693	1			T4	743		T6	1149		T7	459
valid_sources[0x68]	31710	1			T4	775		T6	1112		T7	481
valid_sources[0x69]	34014	1			T4	1085		T6	1125		T7	438
valid_sources[0x6a]	31280	1			T4	837		T9	1		T6	1127
valid_sources[0x6b]	32697	1			T4	484		T6	1174		T7	381
valid_sources[0x6c]	33998	1			T4	694		T6	1093		T7	463
valid_sources[0x6d]	32376	1			T4	658		T6	1109		T7	443
valid_sources[0x6e]	35027	1			T4	612		T5	3		T6	1142
valid_sources[0x6f]	33375	1			T4	859		T5	12		T6	1148
valid_sources[0x70]	32746	1			T4	675		T6	1154		T7	437
valid_sources[0x71]	33946	1			T4	1014		T6	1195		T7	431
valid_sources[0x72]	33205	1			T4	692		T6	1139		T7	449
valid_sources[0x73]	33391	1			T4	1158		T6	1101		T105	1
valid_sources[0x74]	32457	1			T4	612		T6	1203		T7	471
valid_sources[0x75]	31962	1			T4	659		T6	1163		T7	380
valid_sources[0x76]	33816	1			T4	872		T5	1		T9	1
valid_sources[0x77]	32400	1			T4	821		T6	1149		T105	1
valid_sources[0x78]	33132	1			T4	943		T5	1		T6	1099
valid_sources[0x79]	32521	1			T4	786		T6	1195		T7	440
valid_sources[0x7a]	32309	1			T4	862		T6	1144		T7	446
valid_sources[0x7b]	31628	1			T4	674		T6	1145		T7	402
valid_sources[0x7c]	32136	1			T4	773		T6	1099		T7	437
valid_sources[0x7d]	34386	1			T4	791		T6	1197		T7	429
valid_sources[0x7e]	32389	1			T4	1084		T6	1188		T7	463
valid_sources[0x7f]	32447	1			T4	894		T6	1157		T7	467
valid_sources[0x80]	32844	1			T4	996		T6	1107		T105	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

2091189

1

T4

47747

T5

40

T8

100

values[0x0]

all_enables

biggest_size

3060450

1

T4

71631

T5

19

T8

62

values[0x1]

all_enables

biggest_size

3057427

1

T4

71716

T5

21

T8

38