Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	7738084	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

7142706

1

T1

1597

T2

230

T3

2356

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	9087708	1			T1	3069		T2	493		T3	4501
values[0x0]	2225874	1			T1	178		T2	134		T3	252
values[0x1]	3567208	1			T1	165		T2	133		T3	246

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	5109183	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

9771607

1

T1

1982

T2

378

T3

2905

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	48768	1			T1	10		T2	1		T3	22
valid_sources[0x01]	54066	1			T1	19		T2	4		T3	13
valid_sources[0x02]	51827	1			T1	13		T2	7		T3	18
valid_sources[0x03]	51227	1			T1	11		T2	4		T3	25
valid_sources[0x04]	49878	1			T1	4		T2	2		T3	15
valid_sources[0x05]	54808	1			T1	10		T2	8		T3	22
valid_sources[0x06]	58478	1			T1	17		T2	1		T3	19
valid_sources[0x07]	49988	1			T1	10		T2	1		T3	21
valid_sources[0x08]	56570	1			T1	8		T2	13		T3	20
valid_sources[0x09]	50850	1			T1	17		T2	5		T3	21
valid_sources[0x0a]	52941	1			T1	22		T2	1		T3	23
valid_sources[0x0b]	56373	1			T1	11		T2	5		T3	20
valid_sources[0x0c]	48581	1			T1	10		T2	6		T3	20
valid_sources[0x0d]	113472	1			T1	29		T3	17		T4	22
valid_sources[0x0e]	49676	1			T1	9		T2	2		T3	17
valid_sources[0x0f]	53454	1			T1	13		T2	1		T3	16
valid_sources[0x10]	116526	1			T1	20		T2	5		T3	20
valid_sources[0x11]	68069	1			T1	12		T2	4		T3	17
valid_sources[0x12]	63251	1			T1	11		T2	7		T3	17
valid_sources[0x13]	51186	1			T1	10		T2	4		T3	23
valid_sources[0x14]	54476	1			T1	17		T2	1		T3	18
valid_sources[0x15]	51248	1			T1	11		T2	2		T3	26
valid_sources[0x16]	64714	1			T1	12		T2	3		T3	9
valid_sources[0x17]	51835	1			T1	6		T3	18		T4	30
valid_sources[0x18]	60389	1			T1	13		T2	5		T3	19
valid_sources[0x19]	54068	1			T1	17		T2	4		T3	23
valid_sources[0x1a]	50811	1			T1	10		T2	4		T3	26
valid_sources[0x1b]	50156	1			T1	21		T2	1		T3	20
valid_sources[0x1c]	49793	1			T1	33		T2	2		T3	20
valid_sources[0x1d]	59045	1			T1	2		T2	4		T3	26
valid_sources[0x1e]	50514	1			T1	12		T3	26		T4	28
valid_sources[0x1f]	58240	1			T1	11		T3	23		T4	25
valid_sources[0x20]	56691	1			T1	15		T2	4		T3	8
valid_sources[0x21]	51056	1			T1	25		T3	27		T4	28
valid_sources[0x22]	53162	1			T1	14		T2	5		T3	23
valid_sources[0x23]	53680	1			T1	4		T2	1		T3	18
valid_sources[0x24]	50206	1			T1	16		T2	6		T3	10
valid_sources[0x25]	65273	1			T1	8		T3	24		T4	15
valid_sources[0x26]	50524	1			T1	5		T2	4		T3	20
valid_sources[0x27]	48350	1			T1	14		T2	8		T3	22
valid_sources[0x28]	61277	1			T1	6		T3	18		T4	26
valid_sources[0x29]	50546	1			T1	13		T2	4		T3	11
valid_sources[0x2a]	72299	1			T1	13		T2	8		T3	18
valid_sources[0x2b]	50436	1			T1	19		T3	21		T4	41
valid_sources[0x2c]	63117	1			T1	13		T2	5		T3	18
valid_sources[0x2d]	56903	1			T1	7		T3	13		T4	27
valid_sources[0x2e]	51232	1			T1	7		T2	1		T3	19
valid_sources[0x2f]	49288	1			T1	26		T2	1		T3	19
valid_sources[0x30]	49813	1			T1	8		T2	1		T3	13
valid_sources[0x31]	72047	1			T1	26		T2	1		T3	24
valid_sources[0x32]	66133	1			T1	19		T2	1		T3	17
valid_sources[0x33]	49758	1			T1	16		T2	4		T3	25
valid_sources[0x34]	58766	1			T1	7		T3	17		T4	21
valid_sources[0x35]	51035	1			T1	22		T2	7		T3	21
valid_sources[0x36]	50872	1			T1	10		T2	1		T3	20
valid_sources[0x37]	54671	1			T1	12		T2	1		T3	27
valid_sources[0x38]	53335	1			T1	13		T3	20		T4	20
valid_sources[0x39]	75777	1			T1	13		T2	6		T3	19
valid_sources[0x3a]	62599	1			T1	14		T2	2		T3	9
valid_sources[0x3b]	57403	1			T1	5		T3	19		T4	30
valid_sources[0x3c]	63992	1			T1	13		T2	2		T3	24
valid_sources[0x3d]	57312	1			T1	18		T2	7		T3	16
valid_sources[0x3e]	50455	1			T1	6		T3	22		T4	25
valid_sources[0x3f]	55214	1			T1	23		T2	9		T3	15
valid_sources[0x40]	49450	1			T1	15		T2	1		T3	18
valid_sources[0x41]	53149	1			T1	22		T2	4		T3	20
valid_sources[0x42]	55522	1			T1	5		T3	23		T4	27
valid_sources[0x43]	54379	1			T1	6		T2	2		T3	20
valid_sources[0x44]	61541	1			T1	7		T2	4		T3	18
valid_sources[0x45]	56384	1			T1	14		T2	2		T3	15
valid_sources[0x46]	51219	1			T1	9		T2	1		T3	19
valid_sources[0x47]	50364	1			T1	13		T3	12		T4	21
valid_sources[0x48]	53189	1			T1	2		T2	5		T3	19
valid_sources[0x49]	50056	1			T1	19		T2	3		T3	21
valid_sources[0x4a]	53290	1			T1	5		T2	3		T3	22
valid_sources[0x4b]	52455	1			T1	13		T3	15		T4	23
valid_sources[0x4c]	49082	1			T1	12		T2	5		T3	24
valid_sources[0x4d]	65511	1			T1	10		T2	2		T3	20
valid_sources[0x4e]	49650	1			T1	3		T2	2		T3	14
valid_sources[0x4f]	48893	1			T1	7		T2	5		T3	21
valid_sources[0x50]	52903	1			T1	29		T3	18		T4	23
valid_sources[0x51]	51675	1			T1	13		T2	1		T3	23
valid_sources[0x52]	52012	1			T1	7		T2	5		T3	17
valid_sources[0x53]	48593	1			T2	3		T3	18		T4	18
valid_sources[0x54]	50336	1			T1	8		T3	20		T4	30
valid_sources[0x55]	64336	1			T1	21		T2	1		T3	16
valid_sources[0x56]	51514	1			T1	7		T2	1		T3	24
valid_sources[0x57]	106690	1			T1	13		T2	5		T3	26
valid_sources[0x58]	52064	1			T1	23		T2	2		T3	24
valid_sources[0x59]	75348	1			T1	24		T2	3		T3	17
valid_sources[0x5a]	51191	1			T1	18		T3	17		T4	24
valid_sources[0x5b]	51259	1			T1	16		T2	1		T3	23
valid_sources[0x5c]	57647	1			T1	19		T2	3		T3	21
valid_sources[0x5d]	56234	1			T1	20		T2	8		T3	24
valid_sources[0x5e]	53451	1			T1	13		T2	3		T3	16
valid_sources[0x5f]	51482	1			T1	8		T2	11		T3	18
valid_sources[0x60]	144602	1			T1	2		T2	1		T3	15
valid_sources[0x61]	52646	1			T1	14		T2	3		T3	24
valid_sources[0x62]	49969	1			T1	6		T2	2		T3	15
valid_sources[0x63]	50455	1			T1	6		T2	4		T3	14
valid_sources[0x64]	49884	1			T1	14		T2	3		T3	22
valid_sources[0x65]	50240	1			T1	28		T2	4		T3	20
valid_sources[0x66]	50586	1			T1	9		T3	20		T4	26
valid_sources[0x67]	53584	1			T1	17		T2	1		T3	13
valid_sources[0x68]	50674	1			T1	9		T2	4		T3	18
valid_sources[0x69]	50693	1			T1	18		T2	1		T3	18
valid_sources[0x6a]	52189	1			T1	11		T2	5		T3	19
valid_sources[0x6b]	51581	1			T1	21		T2	1		T3	21
valid_sources[0x6c]	51794	1			T1	12		T3	19		T4	30
valid_sources[0x6d]	54839	1			T1	13		T2	5		T3	12
valid_sources[0x6e]	51928	1			T1	22		T2	4		T3	16
valid_sources[0x6f]	52846	1			T1	5		T2	4		T3	23
valid_sources[0x70]	58952	1			T1	30		T3	21		T4	22
valid_sources[0x71]	60396	1			T1	2		T3	18		T4	25
valid_sources[0x72]	50442	1			T1	8		T2	3		T3	20
valid_sources[0x73]	99175	1			T1	11		T2	2		T3	16
valid_sources[0x74]	56680	1			T1	25		T3	19		T4	18
valid_sources[0x75]	53501	1			T1	7		T2	5		T3	15
valid_sources[0x76]	51795	1			T1	25		T2	1		T3	14
valid_sources[0x77]	49645	1			T1	16		T3	17		T4	29
valid_sources[0x78]	64464	1			T1	15		T2	2		T3	17
valid_sources[0x79]	51459	1			T1	24		T2	1		T3	10
valid_sources[0x7a]	51031	1			T1	42		T3	17		T4	43
valid_sources[0x7b]	56668	1			T1	14		T2	9		T3	12
valid_sources[0x7c]	50712	1			T1	5		T2	1		T3	11
valid_sources[0x7d]	49988	1			T1	18		T2	6		T3	16
valid_sources[0x7e]	62650	1			T1	1		T2	3		T3	20
valid_sources[0x7f]	55984	1			T1	15		T3	21		T4	21
valid_sources[0x80]	52471	1			T1	24		T2	1		T3	23

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

3601133

1

T1

1454

T2

112

T3

2155

values[0x0]

all_enables

biggest_size

1812779

1

T1

91

T2

69

T3

121

values[0x1]

all_enables

biggest_size

1728794

1

T1

52

T2

49

T3

80

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	232070	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

8321530

1

T1

140

T3

180

T4

200

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	2138377	1			T1	70		T3	90		T4	100
values[0x0]	3114434	1			T1	31		T3	37		T4	49
values[0x1]	3300789	1			T1	39		T3	53		T4	51

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	84682	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

8468918

1

T1

140

T3

180

T4

200

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	32874	1			T1	1		T5	5		T6	1
valid_sources[0x01]	32930	1			T5	5		T8	343		T9	4
valid_sources[0x02]	33945	1			T1	5		T5	6		T8	271
valid_sources[0x03]	34138	1			T5	9		T6	2		T8	289
valid_sources[0x04]	33205	1			T1	1		T5	5		T8	335
valid_sources[0x05]	33390	1			T5	7		T8	318		T9	5
valid_sources[0x06]	32802	1			T1	1		T5	5		T6	1
valid_sources[0x07]	34183	1			T5	5		T6	1		T8	300
valid_sources[0x08]	35129	1			T5	6		T8	305		T24	20
valid_sources[0x09]	33521	1			T5	2		T8	311		T13	323
valid_sources[0x0a]	33139	1			T1	6		T5	4		T8	246
valid_sources[0x0b]	33012	1			T1	1		T4	1		T5	9
valid_sources[0x0c]	33759	1			T5	4		T8	282		T9	1
valid_sources[0x0d]	32896	1			T6	2		T8	259		T9	1
valid_sources[0x0e]	33874	1			T5	4		T8	432		T13	475
valid_sources[0x0f]	32693	1			T4	4		T5	3		T8	349
valid_sources[0x10]	32985	1			T1	2		T5	8		T6	1
valid_sources[0x11]	32681	1			T5	2		T6	1		T8	320
valid_sources[0x12]	34558	1			T5	8		T6	1		T8	234
valid_sources[0x13]	34940	1			T4	3		T5	6		T8	304
valid_sources[0x14]	35835	1			T4	2		T5	8		T8	253
valid_sources[0x15]	34721	1			T5	7		T6	1		T8	299
valid_sources[0x16]	34892	1			T5	3		T8	325		T9	5
valid_sources[0x17]	33335	1			T5	3		T6	1		T8	322
valid_sources[0x18]	33082	1			T1	3		T5	3		T8	308
valid_sources[0x19]	34267	1			T5	7		T8	311		T9	1
valid_sources[0x1a]	31505	1			T4	5		T5	7		T8	291
valid_sources[0x1b]	35049	1			T5	5		T6	1		T8	273
valid_sources[0x1c]	35015	1			T5	4		T8	341		T9	3
valid_sources[0x1d]	34538	1			T4	1		T5	10		T8	340
valid_sources[0x1e]	34416	1			T5	9		T8	229		T9	4
valid_sources[0x1f]	32134	1			T1	1		T4	1		T5	5
valid_sources[0x20]	33857	1			T5	5		T6	1		T8	245
valid_sources[0x21]	33041	1			T5	2		T8	268		T43	1
valid_sources[0x22]	31951	1			T5	3		T8	386		T100	1
valid_sources[0x23]	31977	1			T5	7		T8	250		T9	2
valid_sources[0x24]	33314	1			T5	4		T6	1		T8	291
valid_sources[0x25]	32331	1			T4	1		T5	4		T8	386
valid_sources[0x26]	33276	1			T1	2		T5	4		T8	300
valid_sources[0x27]	34536	1			T4	1		T5	5		T8	201
valid_sources[0x28]	32440	1			T5	9		T8	275		T43	1
valid_sources[0x29]	33507	1			T1	1		T5	3		T6	1
valid_sources[0x2a]	32217	1			T4	2		T5	8		T6	1
valid_sources[0x2b]	33669	1			T4	4		T5	3		T6	1
valid_sources[0x2c]	33393	1			T5	3		T8	363		T9	3
valid_sources[0x2d]	33951	1			T5	5		T6	1		T8	272
valid_sources[0x2e]	34807	1			T5	8		T8	284		T100	1
valid_sources[0x2f]	34331	1			T5	12		T8	298		T43	1
valid_sources[0x30]	31159	1			T1	1		T4	1		T5	2
valid_sources[0x31]	30890	1			T1	1		T5	5		T8	275
valid_sources[0x32]	32756	1			T4	5		T5	7		T8	341
valid_sources[0x33]	33569	1			T1	3		T5	4		T8	296
valid_sources[0x34]	33593	1			T5	13		T6	2		T8	417
valid_sources[0x35]	33230	1			T1	4		T5	7		T6	1
valid_sources[0x36]	32455	1			T1	1		T4	1		T5	4
valid_sources[0x37]	32209	1			T5	2		T6	1		T8	379
valid_sources[0x38]	33697	1			T1	1		T4	3		T5	1
valid_sources[0x39]	32106	1			T1	1		T4	2		T5	6
valid_sources[0x3a]	32289	1			T5	5		T8	340		T13	269
valid_sources[0x3b]	33335	1			T1	1		T5	6		T8	263
valid_sources[0x3c]	31615	1			T5	7		T6	1		T8	324
valid_sources[0x3d]	34418	1			T1	1		T5	5		T6	2
valid_sources[0x3e]	32936	1			T4	8		T5	4		T6	1
valid_sources[0x3f]	32040	1			T5	6		T6	1		T8	330
valid_sources[0x40]	34362	1			T4	2		T5	7		T8	331
valid_sources[0x41]	32456	1			T4	2		T5	2		T6	2
valid_sources[0x42]	35813	1			T5	8		T6	1		T8	255
valid_sources[0x43]	32418	1			T1	1		T5	7		T6	2
valid_sources[0x44]	34053	1			T5	3		T8	386		T43	2
valid_sources[0x45]	33856	1			T5	6		T8	273		T9	7
valid_sources[0x46]	35255	1			T5	2		T12	200		T8	329
valid_sources[0x47]	32240	1			T1	2		T5	9		T8	416
valid_sources[0x48]	32989	1			T1	2		T4	1		T5	6
valid_sources[0x49]	33692	1			T5	8		T8	336		T9	1
valid_sources[0x4a]	33692	1			T4	2		T5	10		T6	3
valid_sources[0x4b]	33168	1			T5	4		T8	246		T43	1
valid_sources[0x4c]	34402	1			T4	1		T5	6		T8	275
valid_sources[0x4d]	34062	1			T4	1		T5	6		T8	300
valid_sources[0x4e]	32892	1			T4	5		T5	3		T6	1
valid_sources[0x4f]	32996	1			T1	1		T5	3		T6	1
valid_sources[0x50]	32918	1			T4	1		T5	5		T8	359
valid_sources[0x51]	33740	1			T1	1		T5	2		T8	294
valid_sources[0x52]	33610	1			T1	1		T5	3		T8	239
valid_sources[0x53]	32880	1			T5	2		T8	244		T9	10
valid_sources[0x54]	32039	1			T4	1		T5	3		T8	379
valid_sources[0x55]	34712	1			T5	6		T8	306		T9	3
valid_sources[0x56]	32002	1			T5	4		T8	322		T9	5
valid_sources[0x57]	34008	1			T1	1		T5	2		T6	3
valid_sources[0x58]	32332	1			T5	3		T6	2		T8	288
valid_sources[0x59]	34471	1			T5	3		T8	288		T9	1
valid_sources[0x5a]	35725	1			T4	2		T5	1		T6	1
valid_sources[0x5b]	34029	1			T5	6		T8	347		T9	1
valid_sources[0x5c]	34589	1			T5	5		T6	1		T8	289
valid_sources[0x5d]	32066	1			T4	2		T5	2		T6	1
valid_sources[0x5e]	33584	1			T5	8		T8	303		T9	2
valid_sources[0x5f]	33168	1			T1	1		T4	1		T5	3
valid_sources[0x60]	31740	1			T5	8		T6	1		T8	349
valid_sources[0x61]	33036	1			T4	6		T5	5		T7	7
valid_sources[0x62]	33000	1			T1	1		T5	10		T8	215
valid_sources[0x63]	31631	1			T4	1		T5	7		T6	1
valid_sources[0x64]	32565	1			T5	4		T6	2		T8	254
valid_sources[0x65]	36492	1			T5	5		T8	310		T9	1
valid_sources[0x66]	33182	1			T5	5		T8	316		T9	4
valid_sources[0x67]	31430	1			T1	2		T4	2		T5	8
valid_sources[0x68]	31682	1			T4	2		T5	3		T8	343
valid_sources[0x69]	32027	1			T1	2		T5	8		T8	295
valid_sources[0x6a]	33549	1			T4	2		T5	2		T8	355
valid_sources[0x6b]	35095	1			T4	2		T6	1		T8	225
valid_sources[0x6c]	34029	1			T1	1		T5	5		T6	1
valid_sources[0x6d]	32778	1			T1	1		T5	8		T6	2
valid_sources[0x6e]	34403	1			T5	9		T8	330		T9	4
valid_sources[0x6f]	33768	1			T1	1		T4	1		T5	4
valid_sources[0x70]	32550	1			T5	2		T6	1		T8	300
valid_sources[0x71]	32731	1			T1	1		T4	2		T5	6
valid_sources[0x72]	34045	1			T5	7		T8	259		T9	1
valid_sources[0x73]	34432	1			T5	11		T8	358		T9	1
valid_sources[0x74]	31941	1			T1	1		T5	4		T8	257
valid_sources[0x75]	32815	1			T1	1		T5	3		T6	1
valid_sources[0x76]	33478	1			T1	2		T5	5		T6	1
valid_sources[0x77]	34306	1			T4	3		T5	2		T6	1
valid_sources[0x78]	32871	1			T1	1		T5	5		T6	1
valid_sources[0x79]	34821	1			T4	1		T5	2		T6	1
valid_sources[0x7a]	33603	1			T5	8		T6	1		T8	309
valid_sources[0x7b]	32304	1			T5	3		T6	3		T8	307
valid_sources[0x7c]	34019	1			T1	1		T4	1		T5	1
valid_sources[0x7d]	32282	1			T4	6		T5	8		T6	1
valid_sources[0x7e]	35564	1			T1	1		T5	4		T6	1
valid_sources[0x7f]	34728	1			T5	6		T8	364		T9	1
valid_sources[0x80]	32853	1			T4	7		T5	6		T6	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

2123997

1

T1

70

T3

90

T4

100

values[0x0]

all_enables

biggest_size

3098514

1

T1

31

T3

37

T4

49

values[0x1]

all_enables

biggest_size

3099019

1

T1

39

T3

53

T4

51