Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 7580289 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 7349330 1 T1 2588 T2 809 T3 176



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 8859603 1 T1 4446 T2 2472 T3 1267
values[0x0] 2324650 1 T1 400 T2 120 T3 36
values[0x1] 3745366 1 T1 407 T2 108 T3 25



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 4957469 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 9972150 1 T1 3151 T2 1295 T3 571



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 50695 1 T1 21 T2 10 T3 9
valid_sources[0x01] 60714 1 T1 10 T2 7 T3 10
valid_sources[0x02] 51242 1 T1 17 T2 8 T3 4
valid_sources[0x03] 55448 1 T1 28 T2 6 T3 3
valid_sources[0x04] 52744 1 T1 34 T2 11 T3 4
valid_sources[0x05] 68165 1 T1 16 T2 17 T3 10
valid_sources[0x06] 52467 1 T1 26 T2 19 T3 7
valid_sources[0x07] 55139 1 T1 15 T2 15 T3 4
valid_sources[0x08] 58080 1 T1 21 T2 10 T3 6
valid_sources[0x09] 56715 1 T1 37 T2 11 T3 2
valid_sources[0x0a] 49970 1 T1 14 T2 20 T3 8
valid_sources[0x0b] 56092 1 T1 14 T2 11 T3 2
valid_sources[0x0c] 51284 1 T1 19 T2 10 T3 6
valid_sources[0x0d] 50934 1 T1 20 T2 14 T3 4
valid_sources[0x0e] 64420 1 T1 18 T2 18 T3 4
valid_sources[0x0f] 50851 1 T1 35 T2 9 T3 4
valid_sources[0x10] 56744 1 T1 30 T2 10 T3 7
valid_sources[0x11] 70539 1 T1 21 T2 7 T3 2
valid_sources[0x12] 58335 1 T1 25 T2 15 T3 4
valid_sources[0x13] 57915 1 T1 26 T2 13 T3 6
valid_sources[0x14] 65003 1 T1 12 T2 12 T3 8
valid_sources[0x15] 68926 1 T1 13 T2 9 T3 9
valid_sources[0x16] 51362 1 T1 21 T2 8 T3 3
valid_sources[0x17] 54468 1 T1 26 T2 11 T3 7
valid_sources[0x18] 59860 1 T1 22 T2 9 T3 5
valid_sources[0x19] 53593 1 T1 20 T2 10 T3 7
valid_sources[0x1a] 58690 1 T1 25 T2 13 T3 6
valid_sources[0x1b] 56707 1 T1 18 T2 10 T3 4
valid_sources[0x1c] 62205 1 T1 22 T2 9 T3 5
valid_sources[0x1d] 52385 1 T1 28 T2 12 T3 6
valid_sources[0x1e] 53050 1 T1 27 T2 14 T3 6
valid_sources[0x1f] 50231 1 T1 27 T2 9 T3 10
valid_sources[0x20] 53180 1 T1 21 T2 4 T3 9
valid_sources[0x21] 49755 1 T1 19 T2 12 T3 10
valid_sources[0x22] 72119 1 T1 28 T2 15 T3 6
valid_sources[0x23] 53208 1 T1 41 T2 8 T3 4
valid_sources[0x24] 66212 1 T1 29 T2 15 T3 3
valid_sources[0x25] 51965 1 T1 13 T2 10 T3 3
valid_sources[0x26] 55745 1 T1 20 T2 7 T3 5
valid_sources[0x27] 58388 1 T1 36 T2 10 T3 10
valid_sources[0x28] 53481 1 T1 11 T2 11 T3 7
valid_sources[0x29] 52111 1 T1 24 T2 13 T3 6
valid_sources[0x2a] 49242 1 T1 17 T2 9 T3 1
valid_sources[0x2b] 53774 1 T1 17 T2 4 T3 8
valid_sources[0x2c] 51927 1 T1 27 T2 11 T3 5
valid_sources[0x2d] 53935 1 T1 23 T2 12 T3 5
valid_sources[0x2e] 57420 1 T1 23 T2 8 T3 8
valid_sources[0x2f] 51426 1 T1 18 T2 13 T3 2
valid_sources[0x30] 55525 1 T1 11 T2 10 T3 8
valid_sources[0x31] 175795 1 T1 17 T2 4 T3 9
valid_sources[0x32] 54414 1 T1 13 T2 15 T3 11
valid_sources[0x33] 54781 1 T1 16 T2 8 T3 3
valid_sources[0x34] 54221 1 T1 17 T2 8 T3 9
valid_sources[0x35] 49643 1 T1 26 T2 13 T3 6
valid_sources[0x36] 53097 1 T1 18 T2 11 T3 2
valid_sources[0x37] 51672 1 T1 27 T2 12 T3 4
valid_sources[0x38] 60638 1 T1 12 T2 12 T3 7
valid_sources[0x39] 54185 1 T1 16 T2 8 T3 10
valid_sources[0x3a] 55163 1 T1 24 T2 13 T3 6
valid_sources[0x3b] 52549 1 T1 28 T2 4 T3 11
valid_sources[0x3c] 56125 1 T1 12 T2 12 T3 7
valid_sources[0x3d] 56209 1 T1 35 T2 8 T3 9
valid_sources[0x3e] 67268 1 T1 31 T2 9 T3 7
valid_sources[0x3f] 68781 1 T1 17 T2 11 T3 2
valid_sources[0x40] 50932 1 T1 23 T2 8 T3 6
valid_sources[0x41] 54911 1 T1 27 T2 9 T3 10
valid_sources[0x42] 59939 1 T1 13 T2 7 T3 6
valid_sources[0x43] 51168 1 T1 28 T2 7 T3 3
valid_sources[0x44] 50711 1 T1 15 T2 12 T3 9
valid_sources[0x45] 53365 1 T1 20 T2 13 T3 4
valid_sources[0x46] 130394 1 T1 20 T2 15 T3 5
valid_sources[0x47] 55526 1 T1 14 T2 9 T3 7
valid_sources[0x48] 70713 1 T1 19 T2 10 T3 6
valid_sources[0x49] 50219 1 T1 15 T2 14 T3 6
valid_sources[0x4a] 51194 1 T1 18 T2 10 T3 6
valid_sources[0x4b] 54216 1 T1 29 T2 14 T3 7
valid_sources[0x4c] 66452 1 T1 13 T2 14 T3 7
valid_sources[0x4d] 53445 1 T1 24 T2 10 T3 4
valid_sources[0x4e] 52207 1 T1 17 T2 9 T3 3
valid_sources[0x4f] 52668 1 T1 12 T2 9 T3 6
valid_sources[0x50] 50836 1 T1 10 T2 16 T3 4
valid_sources[0x51] 54833 1 T1 39 T2 11 T3 5
valid_sources[0x52] 66755 1 T1 6 T2 11 T3 2
valid_sources[0x53] 55488 1 T1 15 T2 10 T3 7
valid_sources[0x54] 50691 1 T1 25 T2 4 T3 4
valid_sources[0x55] 51207 1 T1 13 T2 8 T3 9
valid_sources[0x56] 73240 1 T1 19 T2 8 T3 4
valid_sources[0x57] 55288 1 T1 26 T2 21 T3 5
valid_sources[0x58] 50936 1 T1 9 T2 9 T3 3
valid_sources[0x59] 52513 1 T1 44 T2 17 T3 2
valid_sources[0x5a] 48292 1 T1 24 T2 9 T3 7
valid_sources[0x5b] 52882 1 T1 17 T2 11 T3 7
valid_sources[0x5c] 59182 1 T1 30 T2 4 T3 2
valid_sources[0x5d] 53100 1 T1 35 T2 9 T3 6
valid_sources[0x5e] 55763 1 T1 16 T2 10 T3 4
valid_sources[0x5f] 52499 1 T1 21 T2 9 T3 8
valid_sources[0x60] 49273 1 T1 7 T2 15 T3 7
valid_sources[0x61] 49360 1 T1 9 T2 13 T3 6
valid_sources[0x62] 52421 1 T1 27 T2 10 T3 9
valid_sources[0x63] 54249 1 T1 41 T2 2 T3 9
valid_sources[0x64] 51932 1 T1 13 T2 5 T3 5
valid_sources[0x65] 53146 1 T1 17 T2 12 T3 4
valid_sources[0x66] 65570 1 T1 16 T2 8 T3 6
valid_sources[0x67] 87456 1 T1 15 T2 10 T3 3
valid_sources[0x68] 49993 1 T1 21 T2 12 T3 4
valid_sources[0x69] 49242 1 T1 15 T2 9 T3 5
valid_sources[0x6a] 51777 1 T1 20 T2 7 T3 4
valid_sources[0x6b] 53783 1 T1 19 T2 12 T3 7
valid_sources[0x6c] 51982 1 T1 29 T2 10 T3 4
valid_sources[0x6d] 53463 1 T1 20 T2 7 T3 3
valid_sources[0x6e] 55048 1 T1 15 T2 13 T3 3
valid_sources[0x6f] 57626 1 T1 10 T2 11 T3 9
valid_sources[0x70] 52166 1 T1 7 T2 9 T3 5
valid_sources[0x71] 51406 1 T1 16 T2 11 T3 2
valid_sources[0x72] 52829 1 T1 28 T2 9 T3 5
valid_sources[0x73] 56951 1 T1 19 T2 8 T3 3
valid_sources[0x74] 59088 1 T1 11 T2 6 T3 5
valid_sources[0x75] 53005 1 T1 13 T2 8 T3 5
valid_sources[0x76] 58252 1 T1 9 T2 11 T3 8
valid_sources[0x77] 53369 1 T1 14 T2 10 T3 6
valid_sources[0x78] 55219 1 T1 20 T2 13 T3 5
valid_sources[0x79] 63608 1 T1 12 T2 11 T3 8
valid_sources[0x7a] 54851 1 T1 14 T2 10 T3 5
valid_sources[0x7b] 67887 1 T1 28 T2 15 T3 7
valid_sources[0x7c] 55212 1 T1 24 T2 4 T3 5
valid_sources[0x7d] 51659 1 T1 23 T2 12 T3 7
valid_sources[0x7e] 53664 1 T1 22 T2 14 T3 3
valid_sources[0x7f] 54285 1 T1 10 T2 8 T3 4
valid_sources[0x80] 54984 1 T1 27 T2 14 T3 8



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 3594853 1 T1 2193 T2 705 T3 147
values[0x0] all_enables biggest_size 1917961 1 T1 223 T2 62 T3 18
values[0x1] all_enables biggest_size 1836516 1 T1 172 T2 42 T3 11


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 245897 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 8815910 1 T1 20 T2 180 T3 40



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 2257751 1 T1 10 T2 90 T3 20
values[0x0] 3304142 1 T1 6 T2 41 T3 10
values[0x1] 3499914 1 T1 4 T2 49 T3 10



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 88680 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 8973127 1 T1 20 T2 180 T3 40



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 35463 1 T4 120 T6 377 T27 1
valid_sources[0x01] 36831 1 T4 125 T6 785 T27 1
valid_sources[0x02] 34757 1 T4 140 T6 161 T7 4
valid_sources[0x03] 34149 1 T4 123 T6 30 T27 1
valid_sources[0x04] 36669 1 T2 4 T4 133 T6 661
valid_sources[0x05] 33455 1 T4 113 T7 2 T12 469
valid_sources[0x06] 36237 1 T1 1 T2 1 T3 3
valid_sources[0x07] 37050 1 T4 132 T6 132 T27 2
valid_sources[0x08] 34232 1 T4 143 T6 553 T7 3
valid_sources[0x09] 36733 1 T2 5 T4 117 T6 480
valid_sources[0x0a] 36125 1 T1 1 T4 123 T6 432
valid_sources[0x0b] 36546 1 T4 127 T6 994 T7 2
valid_sources[0x0c] 35503 1 T1 2 T2 3 T4 122
valid_sources[0x0d] 34100 1 T4 140 T6 340 T35 1
valid_sources[0x0e] 35866 1 T4 109 T6 328 T27 1
valid_sources[0x0f] 35471 1 T4 123 T6 295 T7 1
valid_sources[0x10] 35373 1 T2 1 T4 121 T6 592
valid_sources[0x11] 34813 1 T4 131 T6 827 T7 4
valid_sources[0x12] 36196 1 T4 133 T6 116 T27 1
valid_sources[0x13] 36037 1 T4 121 T6 277 T7 3
valid_sources[0x14] 34549 1 T4 110 T6 747 T7 2
valid_sources[0x15] 35521 1 T4 143 T6 981 T7 2
valid_sources[0x16] 34665 1 T4 130 T6 691 T7 3
valid_sources[0x17] 37063 1 T2 10 T4 123 T6 52
valid_sources[0x18] 36191 1 T4 122 T6 1293 T35 2
valid_sources[0x19] 35712 1 T4 132 T6 378 T35 1
valid_sources[0x1a] 35145 1 T4 124 T6 115 T7 3
valid_sources[0x1b] 35144 1 T4 125 T6 160 T35 4
valid_sources[0x1c] 36025 1 T2 5 T4 125 T6 163
valid_sources[0x1d] 36465 1 T4 128 T6 171 T7 2
valid_sources[0x1e] 35027 1 T3 1 T4 126 T6 476
valid_sources[0x1f] 35885 1 T4 119 T6 265 T35 1
valid_sources[0x20] 34184 1 T4 121 T6 303 T7 3
valid_sources[0x21] 34792 1 T4 112 T6 375 T7 8
valid_sources[0x22] 34622 1 T4 145 T6 333 T35 1
valid_sources[0x23] 35755 1 T4 122 T6 591 T7 1
valid_sources[0x24] 34973 1 T4 136 T6 56 T7 1
valid_sources[0x25] 35900 1 T2 4 T4 103 T6 470
valid_sources[0x26] 36357 1 T4 126 T6 482 T27 2
valid_sources[0x27] 35009 1 T1 1 T4 137 T6 662
valid_sources[0x28] 34664 1 T4 130 T6 230 T7 1
valid_sources[0x29] 33499 1 T3 6 T4 117 T6 71
valid_sources[0x2a] 35252 1 T4 122 T6 218 T7 1
valid_sources[0x2b] 37710 1 T4 133 T6 521 T7 2
valid_sources[0x2c] 35723 1 T4 121 T6 369 T27 7
valid_sources[0x2d] 35077 1 T2 4 T4 119 T6 301
valid_sources[0x2e] 36782 1 T4 137 T6 456 T27 1
valid_sources[0x2f] 35709 1 T4 120 T6 270 T27 1
valid_sources[0x30] 35934 1 T4 114 T6 146 T35 1
valid_sources[0x31] 34953 1 T4 112 T6 202 T35 1
valid_sources[0x32] 36749 1 T4 127 T6 425 T7 4
valid_sources[0x33] 35887 1 T4 135 T6 875 T27 4
valid_sources[0x34] 35153 1 T4 124 T6 354 T12 441
valid_sources[0x35] 36058 1 T4 124 T6 155 T27 4
valid_sources[0x36] 36886 1 T4 117 T6 128 T12 434
valid_sources[0x37] 37655 1 T2 1 T4 135 T6 453
valid_sources[0x38] 36142 1 T4 125 T6 315 T7 4
valid_sources[0x39] 34442 1 T4 118 T6 393 T35 1
valid_sources[0x3a] 34154 1 T2 8 T4 136 T6 282
valid_sources[0x3b] 35446 1 T4 141 T6 669 T7 2
valid_sources[0x3c] 36563 1 T4 135 T6 806 T7 3
valid_sources[0x3d] 35751 1 T4 123 T6 6 T7 1
valid_sources[0x3e] 35218 1 T4 136 T6 1607 T7 3
valid_sources[0x3f] 34911 1 T4 123 T6 393 T7 1
valid_sources[0x40] 35501 1 T4 111 T6 178 T27 5
valid_sources[0x41] 35238 1 T4 127 T6 94 T7 2
valid_sources[0x42] 35596 1 T4 137 T6 89 T35 1
valid_sources[0x43] 35031 1 T4 127 T6 309 T7 1
valid_sources[0x44] 35431 1 T4 134 T6 260 T27 1
valid_sources[0x45] 33492 1 T3 6 T4 124 T6 163
valid_sources[0x46] 34750 1 T4 126 T6 77 T27 2
valid_sources[0x47] 33966 1 T1 3 T4 157 T6 499
valid_sources[0x48] 34963 1 T4 129 T6 1280 T7 3
valid_sources[0x49] 34828 1 T2 6 T4 113 T6 565
valid_sources[0x4a] 35342 1 T4 138 T6 905 T27 1
valid_sources[0x4b] 36311 1 T2 8 T4 138 T6 1336
valid_sources[0x4c] 35525 1 T2 6 T4 115 T6 584
valid_sources[0x4d] 34419 1 T4 128 T6 169 T35 1
valid_sources[0x4e] 38149 1 T2 16 T4 120 T6 514
valid_sources[0x4f] 34709 1 T3 2 T4 126 T6 12
valid_sources[0x50] 33990 1 T4 124 T6 354 T7 1
valid_sources[0x51] 34227 1 T4 119 T6 330 T27 5
valid_sources[0x52] 36127 1 T4 142 T6 828 T7 1
valid_sources[0x53] 32984 1 T4 114 T6 11 T35 1
valid_sources[0x54] 37679 1 T4 143 T6 1025 T27 4
valid_sources[0x55] 34616 1 T4 108 T6 332 T27 5
valid_sources[0x56] 33910 1 T4 120 T6 303 T7 5
valid_sources[0x57] 34721 1 T4 123 T6 199 T27 1
valid_sources[0x58] 33836 1 T1 1 T4 126 T6 83
valid_sources[0x59] 36839 1 T4 110 T6 160 T7 4
valid_sources[0x5a] 34817 1 T4 136 T6 401 T12 451
valid_sources[0x5b] 35939 1 T3 2 T4 135 T7 3
valid_sources[0x5c] 34598 1 T4 136 T6 770 T7 3
valid_sources[0x5d] 34931 1 T2 2 T4 121 T6 386
valid_sources[0x5e] 35396 1 T4 126 T6 1091 T7 2
valid_sources[0x5f] 35043 1 T3 4 T4 111 T6 366
valid_sources[0x60] 35653 1 T4 140 T6 495 T7 5
valid_sources[0x61] 36465 1 T4 137 T6 643 T27 2
valid_sources[0x62] 36626 1 T1 1 T4 125 T6 288
valid_sources[0x63] 35573 1 T4 130 T6 584 T35 1
valid_sources[0x64] 36957 1 T2 6 T3 1 T4 134
valid_sources[0x65] 36467 1 T4 124 T6 582 T12 501
valid_sources[0x66] 35475 1 T1 2 T4 120 T6 401
valid_sources[0x67] 36947 1 T4 121 T6 267 T35 1
valid_sources[0x68] 34979 1 T4 116 T6 311 T7 3
valid_sources[0x69] 34780 1 T1 1 T4 138 T6 324
valid_sources[0x6a] 34695 1 T2 7 T4 124 T6 166
valid_sources[0x6b] 35404 1 T4 118 T6 8 T7 1
valid_sources[0x6c] 33591 1 T4 120 T6 164 T27 2
valid_sources[0x6d] 38316 1 T4 111 T6 393 T27 1
valid_sources[0x6e] 34489 1 T3 1 T4 125 T6 92
valid_sources[0x6f] 37082 1 T4 134 T6 712 T7 5
valid_sources[0x70] 35813 1 T4 125 T6 406 T7 8
valid_sources[0x71] 35780 1 T4 116 T6 752 T35 1
valid_sources[0x72] 35312 1 T2 5 T4 137 T6 918
valid_sources[0x73] 35531 1 T4 105 T6 779 T7 2
valid_sources[0x74] 39022 1 T4 118 T6 459 T27 1
valid_sources[0x75] 37095 1 T4 114 T6 592 T7 1
valid_sources[0x76] 37261 1 T4 101 T6 482 T7 3
valid_sources[0x77] 34381 1 T4 107 T6 819 T35 1
valid_sources[0x78] 34737 1 T4 128 T6 432 T7 1
valid_sources[0x79] 35920 1 T2 11 T4 108 T6 243
valid_sources[0x7a] 36319 1 T4 118 T6 491 T7 2
valid_sources[0x7b] 36543 1 T4 117 T6 281 T35 1
valid_sources[0x7c] 36191 1 T4 129 T6 428 T35 1
valid_sources[0x7d] 34874 1 T4 127 T6 228 T7 1
valid_sources[0x7e] 34370 1 T4 113 T6 64 T27 1
valid_sources[0x7f] 36457 1 T4 132 T6 407 T27 2
valid_sources[0x80] 35221 1 T4 141 T6 240 T35 1



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 2243640 1 T1 10 T2 90 T3 20
values[0x0] all_enables biggest_size 3287519 1 T1 6 T2 41 T3 10
values[0x1] all_enables biggest_size 3284751 1 T1 4 T2 49 T3 10

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