Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	7255054	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

7180002

1

T1

1898

T2

572

T3

1006

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	8296524	1			T1	3844		T2	1317		T3	1821
values[0x0]	2331970	1			T1	220		T2	73		T3	179
values[0x1]	3806562	1			T1	242		T2	97		T3	144

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	4677485	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

9757571

1

T1

2448

T2

815

T3

1247

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	52766	1			T9	19		T4	13		T5	154
valid_sources[0x01]	62931	1			T6	16		T9	28		T4	16
valid_sources[0x02]	54174	1			T9	33		T4	20		T5	413
valid_sources[0x03]	55712	1			T9	35		T4	14		T5	302
valid_sources[0x04]	59231	1			T6	55		T9	37		T4	14
valid_sources[0x05]	50594	1			T9	34		T4	21		T5	329
valid_sources[0x06]	51282	1			T9	30		T4	19		T5	593
valid_sources[0x07]	53060	1			T9	27		T4	22		T5	1540
valid_sources[0x08]	53908	1			T9	29		T4	21		T5	254
valid_sources[0x09]	50675	1			T9	33		T4	23		T5	307
valid_sources[0x0a]	56273	1			T9	18		T4	23		T5	352
valid_sources[0x0b]	56377	1			T9	34		T4	27		T5	562
valid_sources[0x0c]	54798	1			T9	24		T4	18		T5	476
valid_sources[0x0d]	150187	1			T9	22		T4	12		T5	444
valid_sources[0x0e]	52441	1			T9	28		T4	16		T5	359
valid_sources[0x0f]	51451	1			T9	29		T4	21		T5	700
valid_sources[0x10]	52603	1			T6	31		T9	23		T4	16
valid_sources[0x11]	64783	1			T9	25		T4	20		T5	306
valid_sources[0x12]	57161	1			T9	23		T4	17		T5	437
valid_sources[0x13]	57869	1			T9	31		T4	16		T5	382
valid_sources[0x14]	61566	1			T9	36		T4	22		T5	418
valid_sources[0x15]	53024	1			T9	19		T4	20		T5	551
valid_sources[0x16]	52471	1			T6	62		T9	31		T4	19
valid_sources[0x17]	51670	1			T9	28		T4	20		T5	172
valid_sources[0x18]	51747	1			T9	32		T4	18		T5	206
valid_sources[0x19]	58793	1			T9	24		T4	23		T5	320
valid_sources[0x1a]	50157	1			T9	26		T4	21		T5	437
valid_sources[0x1b]	53223	1			T9	25		T4	18		T5	438
valid_sources[0x1c]	49164	1			T9	22		T4	18		T5	358
valid_sources[0x1d]	60566	1			T9	21		T4	13		T5	337
valid_sources[0x1e]	73132	1			T9	34		T4	25		T5	401
valid_sources[0x1f]	53781	1			T9	32		T4	23		T5	309
valid_sources[0x20]	53837	1			T9	22		T4	17		T5	482
valid_sources[0x21]	64384	1			T6	39		T9	33		T4	16
valid_sources[0x22]	54742	1			T9	32		T4	5		T5	500
valid_sources[0x23]	57539	1			T6	46		T9	21		T4	19
valid_sources[0x24]	51764	1			T6	93		T9	30		T4	9
valid_sources[0x25]	62130	1			T9	31		T4	9		T5	410
valid_sources[0x26]	54314	1			T9	38		T4	14		T5	442
valid_sources[0x27]	55504	1			T9	25		T4	16		T5	438
valid_sources[0x28]	57326	1			T9	34		T4	15		T5	584
valid_sources[0x29]	50268	1			T9	24		T4	20		T5	546
valid_sources[0x2a]	57539	1			T9	27		T4	17		T5	354
valid_sources[0x2b]	56001	1			T9	25		T4	16		T5	232
valid_sources[0x2c]	54432	1			T9	34		T4	15		T5	412
valid_sources[0x2d]	52062	1			T9	30		T4	19		T5	439
valid_sources[0x2e]	65308	1			T9	34		T4	23		T5	548
valid_sources[0x2f]	115755	1			T9	26		T4	17		T5	578
valid_sources[0x30]	52262	1			T9	22		T4	20		T5	455
valid_sources[0x31]	59284	1			T6	15		T9	34		T4	14
valid_sources[0x32]	49550	1			T9	21		T4	16		T5	332
valid_sources[0x33]	63247	1			T9	30		T4	5		T5	577
valid_sources[0x34]	50810	1			T9	32		T4	16		T5	670
valid_sources[0x35]	49803	1			T9	34		T4	23		T5	314
valid_sources[0x36]	71198	1			T9	28		T4	15		T5	327
valid_sources[0x37]	56618	1			T9	35		T4	27		T5	247
valid_sources[0x38]	56318	1			T9	36		T4	12		T5	333
valid_sources[0x39]	53852	1			T9	41		T4	13		T5	639
valid_sources[0x3a]	50647	1			T9	28		T4	21		T5	222
valid_sources[0x3b]	56376	1			T9	24		T4	16		T5	292
valid_sources[0x3c]	68344	1			T9	20		T4	17		T5	589
valid_sources[0x3d]	51021	1			T9	24		T4	16		T5	550
valid_sources[0x3e]	50811	1			T6	87		T9	24		T4	23
valid_sources[0x3f]	48800	1			T9	16		T4	15		T5	288
valid_sources[0x40]	64887	1			T6	28		T9	28		T4	21
valid_sources[0x41]	49632	1			T9	25		T4	16		T5	726
valid_sources[0x42]	53374	1			T6	10		T9	31		T4	16
valid_sources[0x43]	54150	1			T9	26		T4	16		T5	300
valid_sources[0x44]	59793	1			T9	28		T4	19		T5	354
valid_sources[0x45]	53310	1			T9	20		T4	11		T5	412
valid_sources[0x46]	51404	1			T9	24		T4	13		T5	158
valid_sources[0x47]	116666	1			T6	2		T9	20		T4	24
valid_sources[0x48]	48461	1			T9	30		T4	21		T5	301
valid_sources[0x49]	51437	1			T9	25		T4	10		T5	622
valid_sources[0x4a]	65989	1			T9	31		T4	17		T5	363
valid_sources[0x4b]	51026	1			T9	21		T4	12		T5	373
valid_sources[0x4c]	51100	1			T9	27		T4	14		T5	480
valid_sources[0x4d]	55469	1			T9	28		T4	17		T5	358
valid_sources[0x4e]	55211	1			T9	28		T4	20		T5	422
valid_sources[0x4f]	53781	1			T9	25		T4	20		T5	554
valid_sources[0x50]	50458	1			T9	32		T4	15		T5	667
valid_sources[0x51]	55128	1			T9	33		T4	20		T5	704
valid_sources[0x52]	52543	1			T9	19		T4	19		T5	122
valid_sources[0x53]	55527	1			T9	41		T4	19		T5	508
valid_sources[0x54]	58290	1			T9	22		T4	16		T5	588
valid_sources[0x55]	55524	1			T3	2144		T9	23		T4	21
valid_sources[0x56]	52660	1			T9	20		T4	11		T5	174
valid_sources[0x57]	53767	1			T9	31		T4	13		T5	462
valid_sources[0x58]	51403	1			T9	32		T4	27		T5	314
valid_sources[0x59]	50019	1			T9	33		T4	15		T5	847
valid_sources[0x5a]	50069	1			T9	30		T4	26		T5	385
valid_sources[0x5b]	50486	1			T9	33		T4	9		T5	484
valid_sources[0x5c]	58889	1			T9	29		T4	11		T5	717
valid_sources[0x5d]	50550	1			T9	32		T4	14		T5	260
valid_sources[0x5e]	52145	1			T9	30		T4	14		T5	162
valid_sources[0x5f]	60926	1			T9	25		T4	16		T5	604
valid_sources[0x60]	60105	1			T9	29		T4	26		T5	381
valid_sources[0x61]	51917	1			T9	19		T4	19		T5	471
valid_sources[0x62]	55384	1			T9	29		T4	13		T5	412
valid_sources[0x63]	61746	1			T9	28		T4	19		T5	526
valid_sources[0x64]	51250	1			T9	18		T4	17		T5	519
valid_sources[0x65]	50885	1			T6	11		T9	37		T4	16
valid_sources[0x66]	50941	1			T9	30		T4	15		T5	283
valid_sources[0x67]	57791	1			T9	32		T4	12		T5	697
valid_sources[0x68]	50767	1			T9	24		T4	19		T5	524
valid_sources[0x69]	67263	1			T9	25		T4	16		T5	488
valid_sources[0x6a]	54346	1			T6	9		T9	18		T4	14
valid_sources[0x6b]	54731	1			T9	32		T4	24		T5	269
valid_sources[0x6c]	52204	1			T6	11		T9	32		T4	21
valid_sources[0x6d]	53679	1			T9	13		T4	13		T5	672
valid_sources[0x6e]	51637	1			T9	28		T4	16		T5	224
valid_sources[0x6f]	53026	1			T6	13		T9	29		T4	14
valid_sources[0x70]	57910	1			T9	42		T4	17		T5	497
valid_sources[0x71]	64226	1			T6	27		T9	25		T4	20
valid_sources[0x72]	53954	1			T9	18		T4	19		T5	272
valid_sources[0x73]	51931	1			T9	27		T4	19		T5	184
valid_sources[0x74]	53693	1			T9	22		T4	20		T5	309
valid_sources[0x75]	60720	1			T9	22		T4	18		T5	185
valid_sources[0x76]	51989	1			T9	27		T4	15		T5	325
valid_sources[0x77]	51277	1			T6	21		T9	35		T4	15
valid_sources[0x78]	50268	1			T9	34		T4	12		T5	350
valid_sources[0x79]	55688	1			T9	29		T4	23		T5	711
valid_sources[0x7a]	52361	1			T9	24		T4	26		T5	419
valid_sources[0x7b]	52488	1			T9	27		T4	20		T5	380
valid_sources[0x7c]	52439	1			T9	21		T4	10		T5	297
valid_sources[0x7d]	52574	1			T9	30		T4	22		T5	399
valid_sources[0x7e]	51115	1			T6	43		T9	26		T4	14
valid_sources[0x7f]	51438	1			T9	17		T4	25		T5	484
valid_sources[0x80]	63215	1			T9	30		T4	12		T5	405

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

3371709

1

T1

1715

T2

495

T3

865

values[0x0]

all_enables

biggest_size

1942131

1

T1

100

T2

40

T3

94

values[0x1]

all_enables

biggest_size

1866162

1

T1

83

T2

37

T3

47

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	253540	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

9189895

1

T1

60

T2

20

T3

60

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	2348530	1			T1	30		T2	10		T3	30
values[0x0]	3448294	1			T1	16		T2	4		T3	13
values[0x1]	3646611	1			T1	14		T2	6		T3	17

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	91858	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

9351577

1

T1

60

T2

20

T3

60

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	37469	1			T5	571		T219	1		T107	2
valid_sources[0x01]	37629	1			T5	600		T152	1		T18	4
valid_sources[0x02]	36543	1			T9	3		T5	608		T65	9
valid_sources[0x03]	37989	1			T9	14		T5	593		T18	3
valid_sources[0x04]	37295	1			T5	554		T8	785		T245	5
valid_sources[0x05]	36182	1			T5	569		T152	4		T102	2
valid_sources[0x06]	36034	1			T5	593		T18	9		T8	773
valid_sources[0x07]	37286	1			T5	608		T102	1		T18	2
valid_sources[0x08]	35354	1			T2	1		T5	566		T38	1
valid_sources[0x09]	37402	1			T5	589		T11	7		T219	2
valid_sources[0x0a]	38191	1			T1	1		T5	531		T18	2
valid_sources[0x0b]	36737	1			T5	617		T173	3		T102	1
valid_sources[0x0c]	36828	1			T5	623		T152	1		T102	1
valid_sources[0x0d]	38202	1			T4	11		T5	570		T18	1
valid_sources[0x0e]	36825	1			T5	550		T152	1		T219	1
valid_sources[0x0f]	35772	1			T5	556		T219	1		T18	1
valid_sources[0x10]	36923	1			T5	552		T107	2		T18	10
valid_sources[0x11]	36461	1			T5	559		T219	1		T102	2
valid_sources[0x12]	36751	1			T1	1		T2	1		T5	619
valid_sources[0x13]	35912	1			T5	577		T38	4		T152	1
valid_sources[0x14]	36740	1			T1	1		T2	1		T9	7
valid_sources[0x15]	36165	1			T5	614		T110	1		T8	757
valid_sources[0x16]	35447	1			T9	1		T5	598		T16	6
valid_sources[0x17]	36929	1			T5	613		T219	1		T8	772
valid_sources[0x18]	35270	1			T1	1		T4	6		T5	615
valid_sources[0x19]	35569	1			T5	573		T12	1		T8	816
valid_sources[0x1a]	37402	1			T1	1		T5	565		T219	1
valid_sources[0x1b]	36516	1			T2	1		T5	600		T107	3
valid_sources[0x1c]	37304	1			T5	574		T38	2		T107	2
valid_sources[0x1d]	36842	1			T5	631		T12	2		T152	1
valid_sources[0x1e]	36748	1			T1	1		T5	572		T8	814
valid_sources[0x1f]	39031	1			T9	2		T5	583		T219	1
valid_sources[0x20]	37299	1			T3	60		T5	552		T219	2
valid_sources[0x21]	37319	1			T5	596		T219	1		T76	9
valid_sources[0x22]	37160	1			T5	602		T152	2		T219	1
valid_sources[0x23]	36649	1			T1	1		T4	13		T5	583
valid_sources[0x24]	37621	1			T5	569		T219	1		T18	9
valid_sources[0x25]	37797	1			T5	570		T18	1		T8	801
valid_sources[0x26]	38443	1			T9	7		T5	569		T65	1
valid_sources[0x27]	37907	1			T5	606		T173	4		T8	809
valid_sources[0x28]	36809	1			T5	584		T12	3		T8	809
valid_sources[0x29]	35726	1			T5	598		T219	1		T18	2
valid_sources[0x2a]	37879	1			T1	1		T5	600		T219	1
valid_sources[0x2b]	38535	1			T5	594		T107	3		T18	3
valid_sources[0x2c]	35368	1			T1	1		T5	554		T173	2
valid_sources[0x2d]	35680	1			T5	636		T65	5		T102	2
valid_sources[0x2e]	37585	1			T2	1		T5	584		T152	2
valid_sources[0x2f]	36142	1			T5	647		T12	1		T152	3
valid_sources[0x30]	37646	1			T9	5		T5	573		T8	737
valid_sources[0x31]	38728	1			T1	1		T5	591		T65	13
valid_sources[0x32]	37953	1			T1	1		T5	574		T38	7
valid_sources[0x33]	36185	1			T9	2		T5	579		T11	35
valid_sources[0x34]	35161	1			T1	2		T5	543		T18	6
valid_sources[0x35]	36519	1			T5	606		T102	1		T18	1
valid_sources[0x36]	36442	1			T5	605		T102	1		T18	2
valid_sources[0x37]	37106	1			T5	652		T152	1		T102	1
valid_sources[0x38]	35158	1			T5	540		T219	2		T18	8
valid_sources[0x39]	35891	1			T9	14		T5	612		T152	1
valid_sources[0x3a]	37412	1			T9	4		T5	597		T18	3
valid_sources[0x3b]	37710	1			T2	1		T5	605		T152	2
valid_sources[0x3c]	35478	1			T5	567		T109	6		T18	2
valid_sources[0x3d]	38464	1			T5	640		T152	1		T108	10
valid_sources[0x3e]	36784	1			T1	1		T5	569		T109	5
valid_sources[0x3f]	36450	1			T9	11		T5	605		T18	19
valid_sources[0x40]	39525	1			T5	604		T219	1		T18	14
valid_sources[0x41]	36283	1			T5	552		T12	3		T219	4
valid_sources[0x42]	37293	1			T1	2		T5	564		T152	1
valid_sources[0x43]	39612	1			T1	1		T5	650		T152	1
valid_sources[0x44]	36160	1			T5	597		T219	1		T18	1
valid_sources[0x45]	37046	1			T5	570		T152	1		T65	9
valid_sources[0x46]	34898	1			T1	1		T4	4		T5	605
valid_sources[0x47]	38284	1			T5	548		T18	4		T8	742
valid_sources[0x48]	36949	1			T5	535		T219	2		T102	1
valid_sources[0x49]	36185	1			T4	3		T5	604		T152	1
valid_sources[0x4a]	35723	1			T5	602		T152	1		T219	9
valid_sources[0x4b]	36953	1			T1	2		T5	540		T219	2
valid_sources[0x4c]	36134	1			T5	502		T219	1		T8	771
valid_sources[0x4d]	37248	1			T5	561		T152	2		T219	2
valid_sources[0x4e]	39157	1			T5	577		T18	14		T8	779
valid_sources[0x4f]	38553	1			T5	612		T219	1		T8	758
valid_sources[0x50]	35269	1			T5	608		T173	1		T102	3
valid_sources[0x51]	37475	1			T5	603		T16	9		T102	1
valid_sources[0x52]	37091	1			T2	1		T5	591		T152	1
valid_sources[0x53]	36675	1			T5	577		T219	3		T102	1
valid_sources[0x54]	36924	1			T5	638		T12	1		T152	1
valid_sources[0x55]	38418	1			T5	566		T152	2		T65	4
valid_sources[0x56]	35270	1			T5	606		T65	11		T110	1
valid_sources[0x57]	38065	1			T9	9		T5	574		T76	46
valid_sources[0x58]	37633	1			T1	1		T5	579		T12	2
valid_sources[0x59]	36845	1			T9	1		T5	584		T152	1
valid_sources[0x5a]	38656	1			T6	20		T5	606		T152	1
valid_sources[0x5b]	36321	1			T9	6		T5	554		T152	1
valid_sources[0x5c]	36832	1			T5	588		T11	4		T16	4
valid_sources[0x5d]	38641	1			T5	633		T18	3		T8	771
valid_sources[0x5e]	37273	1			T2	1		T5	577		T8	776
valid_sources[0x5f]	36608	1			T9	4		T5	585		T12	3
valid_sources[0x60]	35475	1			T5	619		T65	22		T109	1
valid_sources[0x61]	36938	1			T5	589		T65	1		T219	1
valid_sources[0x62]	35742	1			T5	565		T65	1		T219	1
valid_sources[0x63]	35291	1			T5	577		T152	2		T18	3
valid_sources[0x64]	36003	1			T5	548		T102	1		T18	2
valid_sources[0x65]	36312	1			T4	4		T5	581		T18	11
valid_sources[0x66]	37203	1			T5	593		T219	3		T18	13
valid_sources[0x67]	37910	1			T5	622		T152	1		T110	1
valid_sources[0x68]	35242	1			T5	592		T18	1		T8	786
valid_sources[0x69]	36987	1			T2	1		T5	560		T109	1
valid_sources[0x6a]	35612	1			T1	2		T5	612		T152	1
valid_sources[0x6b]	37213	1			T1	1		T5	577		T38	6
valid_sources[0x6c]	36669	1			T5	583		T8	736		T193	1
valid_sources[0x6d]	36758	1			T5	582		T219	2		T18	2
valid_sources[0x6e]	37349	1			T2	1		T5	545		T219	1
valid_sources[0x6f]	37016	1			T1	1		T5	599		T152	1
valid_sources[0x70]	36129	1			T5	533		T219	7		T18	6
valid_sources[0x71]	37836	1			T5	615		T173	1		T219	2
valid_sources[0x72]	36817	1			T5	638		T65	4		T8	738
valid_sources[0x73]	38246	1			T1	1		T5	622		T109	2
valid_sources[0x74]	36898	1			T9	5		T5	644		T110	1
valid_sources[0x75]	37999	1			T5	579		T219	1		T8	776
valid_sources[0x76]	37235	1			T5	622		T152	1		T219	1
valid_sources[0x77]	36098	1			T5	588		T174	60		T219	2
valid_sources[0x78]	37060	1			T9	10		T4	9		T5	606
valid_sources[0x79]	38532	1			T1	1		T5	614		T18	7
valid_sources[0x7a]	36565	1			T5	582		T152	1		T109	1
valid_sources[0x7b]	36871	1			T1	1		T5	582		T18	7
valid_sources[0x7c]	38829	1			T5	568		T38	3		T152	1
valid_sources[0x7d]	36587	1			T5	609		T12	1		T219	3
valid_sources[0x7e]	36434	1			T5	649		T110	1		T76	3
valid_sources[0x7f]	37848	1			T5	574		T16	23		T102	1
valid_sources[0x80]	36063	1			T1	1		T5	561		T109	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

2334207

1

T1

30

T2

10

T3

30

values[0x0]

all_enables

biggest_size

3431118

1

T1

16

T2

4

T3

13

values[0x1]

all_enables

biggest_size

3424570

1

T1

14

T2

6

T3

17