Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	7009073	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

6675128

1

T1

921

T2

2146

T3

71933

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	8189934	1			T1	4835		T2	4327		T3	33652
values[0x0]	2106754	1			T1	143		T2	250		T3	27989
values[0x1]	3387513	1			T1	154		T2	238		T3	50055

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	4598430	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

9085771

1

T1

2113

T2

2708

T3

92544

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	44050	1			T1	15		T2	18		T3	477
valid_sources[0x01]	45809	1			T1	12		T2	28		T3	438
valid_sources[0x02]	52607	1			T1	15		T2	18		T3	428
valid_sources[0x03]	48431	1			T1	21		T2	8		T3	457
valid_sources[0x04]	48826	1			T1	25		T2	17		T3	438
valid_sources[0x05]	43813	1			T1	9		T2	23		T3	407
valid_sources[0x06]	49178	1			T1	13		T2	16		T3	441
valid_sources[0x07]	49956	1			T1	25		T2	13		T3	406
valid_sources[0x08]	47132	1			T1	26		T2	9		T3	461
valid_sources[0x09]	48546	1			T1	22		T2	23		T3	413
valid_sources[0x0a]	49144	1			T1	19		T2	19		T3	464
valid_sources[0x0b]	57275	1			T1	17		T2	17		T3	461
valid_sources[0x0c]	49310	1			T1	16		T2	13		T3	403
valid_sources[0x0d]	45918	1			T1	17		T2	16		T3	437
valid_sources[0x0e]	47435	1			T1	11		T2	12		T3	456
valid_sources[0x0f]	119065	1			T1	23		T2	21		T3	437
valid_sources[0x10]	48598	1			T1	21		T2	11		T3	446
valid_sources[0x11]	46189	1			T1	12		T2	14		T3	451
valid_sources[0x12]	46185	1			T1	33		T2	19		T3	438
valid_sources[0x13]	47961	1			T1	26		T2	9		T3	449
valid_sources[0x14]	56871	1			T1	17		T2	22		T3	437
valid_sources[0x15]	50453	1			T1	19		T2	11		T3	400
valid_sources[0x16]	56221	1			T1	18		T2	25		T3	414
valid_sources[0x17]	50509	1			T1	24		T2	24		T3	458
valid_sources[0x18]	45904	1			T1	17		T2	26		T3	422
valid_sources[0x19]	44585	1			T1	23		T2	21		T3	443
valid_sources[0x1a]	49798	1			T1	22		T2	24		T3	440
valid_sources[0x1b]	48055	1			T1	16		T2	20		T3	430
valid_sources[0x1c]	46218	1			T1	20		T2	22		T3	445
valid_sources[0x1d]	50624	1			T1	19		T2	25		T3	483
valid_sources[0x1e]	46973	1			T1	19		T2	19		T3	420
valid_sources[0x1f]	53941	1			T1	16		T2	23		T3	439
valid_sources[0x20]	56973	1			T1	16		T2	16		T3	408
valid_sources[0x21]	112109	1			T1	18		T2	25		T3	419
valid_sources[0x22]	46737	1			T1	19		T2	32		T3	452
valid_sources[0x23]	56823	1			T1	19		T2	20		T3	443
valid_sources[0x24]	50431	1			T1	22		T2	22		T3	406
valid_sources[0x25]	48685	1			T1	19		T2	22		T3	421
valid_sources[0x26]	46375	1			T1	7		T2	18		T3	408
valid_sources[0x27]	45997	1			T1	26		T2	19		T3	411
valid_sources[0x28]	46199	1			T1	27		T2	17		T3	441
valid_sources[0x29]	46012	1			T1	23		T2	24		T3	418
valid_sources[0x2a]	65239	1			T1	14		T2	20		T3	441
valid_sources[0x2b]	45413	1			T1	20		T2	8		T3	456
valid_sources[0x2c]	52824	1			T1	16		T2	12		T3	412
valid_sources[0x2d]	45182	1			T1	17		T2	16		T3	441
valid_sources[0x2e]	48009	1			T1	25		T2	24		T3	452
valid_sources[0x2f]	48533	1			T1	30		T2	16		T3	441
valid_sources[0x30]	46754	1			T1	12		T2	15		T3	432
valid_sources[0x31]	57208	1			T1	10		T2	14		T3	430
valid_sources[0x32]	46088	1			T1	10		T2	13		T3	431
valid_sources[0x33]	53575	1			T1	19		T2	19		T3	421
valid_sources[0x34]	50138	1			T1	21		T2	13		T3	416
valid_sources[0x35]	50955	1			T1	16		T2	11		T3	433
valid_sources[0x36]	47650	1			T1	19		T2	17		T3	405
valid_sources[0x37]	50779	1			T1	19		T2	27		T3	485
valid_sources[0x38]	67416	1			T1	18		T2	11		T3	399
valid_sources[0x39]	46371	1			T1	20		T2	24		T3	441
valid_sources[0x3a]	46101	1			T1	21		T2	13		T3	455
valid_sources[0x3b]	139720	1			T1	11		T2	15		T3	397
valid_sources[0x3c]	45519	1			T1	26		T2	12		T3	426
valid_sources[0x3d]	50130	1			T1	21		T2	13		T3	451
valid_sources[0x3e]	48963	1			T1	19		T2	25		T3	409
valid_sources[0x3f]	46066	1			T1	12		T2	18		T3	445
valid_sources[0x40]	46407	1			T1	26		T2	26		T3	442
valid_sources[0x41]	47202	1			T1	24		T2	16		T3	427
valid_sources[0x42]	46835	1			T1	13		T2	19		T3	452
valid_sources[0x43]	50183	1			T1	22		T2	10		T3	386
valid_sources[0x44]	67180	1			T1	26		T2	16		T3	435
valid_sources[0x45]	51829	1			T1	16		T2	32		T3	383
valid_sources[0x46]	49135	1			T1	31		T2	24		T3	444
valid_sources[0x47]	47398	1			T1	10		T2	19		T3	416
valid_sources[0x48]	64968	1			T1	26		T2	18		T3	463
valid_sources[0x49]	46552	1			T1	19		T2	16		T3	433
valid_sources[0x4a]	163124	1			T1	11		T2	30		T3	449
valid_sources[0x4b]	50470	1			T1	21		T2	16		T3	435
valid_sources[0x4c]	46927	1			T1	14		T2	14		T3	444
valid_sources[0x4d]	56473	1			T1	20		T2	27		T3	435
valid_sources[0x4e]	47935	1			T1	17		T2	30		T3	473
valid_sources[0x4f]	47413	1			T1	25		T2	30		T3	439
valid_sources[0x50]	49905	1			T1	12		T2	18		T3	417
valid_sources[0x51]	52274	1			T1	23		T2	14		T3	392
valid_sources[0x52]	49815	1			T1	5		T2	13		T3	468
valid_sources[0x53]	45999	1			T1	18		T2	21		T3	418
valid_sources[0x54]	50757	1			T1	16		T2	17		T3	436
valid_sources[0x55]	46470	1			T1	8		T2	28		T3	445
valid_sources[0x56]	51082	1			T1	33		T2	13		T3	438
valid_sources[0x57]	60114	1			T1	11		T2	23		T3	409
valid_sources[0x58]	56208	1			T1	16		T2	14		T3	456
valid_sources[0x59]	46141	1			T1	18		T2	31		T3	417
valid_sources[0x5a]	53799	1			T1	23		T2	13		T3	452
valid_sources[0x5b]	46223	1			T1	17		T2	23		T3	436
valid_sources[0x5c]	44850	1			T1	31		T2	15		T3	474
valid_sources[0x5d]	50018	1			T1	11		T2	21		T3	433
valid_sources[0x5e]	50850	1			T1	25		T2	28		T3	427
valid_sources[0x5f]	50966	1			T1	17		T2	21		T3	408
valid_sources[0x60]	48326	1			T1	23		T2	23		T3	411
valid_sources[0x61]	45256	1			T1	15		T2	13		T3	440
valid_sources[0x62]	72095	1			T1	20		T2	16		T3	417
valid_sources[0x63]	45590	1			T1	30		T2	28		T3	426
valid_sources[0x64]	118854	1			T1	23		T2	9		T3	443
valid_sources[0x65]	48894	1			T1	22		T2	21		T3	435
valid_sources[0x66]	55052	1			T1	16		T2	17		T3	416
valid_sources[0x67]	47182	1			T1	17		T2	19		T3	445
valid_sources[0x68]	49798	1			T1	16		T2	12		T3	476
valid_sources[0x69]	48555	1			T1	20		T2	26		T3	431
valid_sources[0x6a]	44301	1			T1	17		T2	23		T3	412
valid_sources[0x6b]	50264	1			T1	17		T2	17		T3	480
valid_sources[0x6c]	47110	1			T1	22		T2	14		T3	455
valid_sources[0x6d]	48821	1			T1	25		T2	29		T3	433
valid_sources[0x6e]	54146	1			T1	25		T2	13		T3	398
valid_sources[0x6f]	49830	1			T1	20		T2	24		T3	456
valid_sources[0x70]	47807	1			T1	14		T2	11		T3	485
valid_sources[0x71]	45083	1			T1	22		T2	26		T3	453
valid_sources[0x72]	81264	1			T1	18		T2	14		T3	444
valid_sources[0x73]	47263	1			T1	25		T2	12		T3	430
valid_sources[0x74]	50606	1			T1	25		T2	22		T3	430
valid_sources[0x75]	49616	1			T1	9		T2	34		T3	397
valid_sources[0x76]	48475	1			T1	27		T2	21		T3	472
valid_sources[0x77]	46126	1			T1	14		T2	14		T3	432
valid_sources[0x78]	56344	1			T1	17		T2	28		T3	495
valid_sources[0x79]	52839	1			T1	25		T2	20		T3	448
valid_sources[0x7a]	49920	1			T1	23		T2	16		T3	401
valid_sources[0x7b]	47889	1			T1	20		T2	18		T3	429
valid_sources[0x7c]	45855	1			T1	26		T2	26		T3	393
valid_sources[0x7d]	46482	1			T1	20		T2	22		T3	416
valid_sources[0x7e]	56886	1			T1	15		T2	20		T3	431
valid_sources[0x7f]	57264	1			T1	19		T2	19		T3	420
valid_sources[0x80]	48766	1			T1	25		T2	17		T3	451

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

3296360

1

T1

815

T2

1950

T3

21421

values[0x0]

all_enables

biggest_size

1728624

1

T1

63

T2

114

T3

25303

values[0x1]

all_enables

biggest_size

1650144

1

T1

43

T2

82

T3

25209

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	224713	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

8031788

1

T1

80

T2

120

T3

133259

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	2059093	1			T1	40		T2	60		T3	33486
values[0x0]	3007711	1			T1	26		T2	31		T3	50165
values[0x1]	3189697	1			T1	14		T2	29		T3	52876

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	82161	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

8174340

1

T1

80

T2

120

T3

135405

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	30545	1			T3	538		T101	1		T5	25
valid_sources[0x01]	32582	1			T3	521		T4	2		T145	2
valid_sources[0x02]	31812	1			T2	1		T3	513		T13	150
valid_sources[0x03]	32472	1			T3	534		T8	1		T13	581
valid_sources[0x04]	33602	1			T3	500		T8	3		T13	611
valid_sources[0x05]	31493	1			T3	564		T8	2		T145	3
valid_sources[0x06]	32097	1			T3	541		T8	1		T88	2
valid_sources[0x07]	33328	1			T3	551		T8	1		T13	370
valid_sources[0x08]	31553	1			T3	492		T5	4		T13	249
valid_sources[0x09]	30913	1			T3	524		T101	1		T145	2
valid_sources[0x0a]	31652	1			T3	571		T32	1		T5	1
valid_sources[0x0b]	32204	1			T1	3		T3	530		T5	5
valid_sources[0x0c]	32736	1			T3	543		T101	1		T5	7
valid_sources[0x0d]	33912	1			T2	1		T3	525		T145	3
valid_sources[0x0e]	32726	1			T2	2		T3	455		T32	2
valid_sources[0x0f]	32802	1			T2	1		T3	564		T13	87
valid_sources[0x10]	32283	1			T1	1		T3	501		T8	2
valid_sources[0x11]	31899	1			T3	509		T13	270		T89	3
valid_sources[0x12]	31881	1			T3	560		T9	8		T5	16
valid_sources[0x13]	33055	1			T2	1		T3	577		T13	324
valid_sources[0x14]	31669	1			T2	1		T3	546		T101	1
valid_sources[0x15]	32987	1			T3	536		T145	3		T13	739
valid_sources[0x16]	32304	1			T2	1		T3	573		T8	2
valid_sources[0x17]	32505	1			T3	547		T32	1		T13	536
valid_sources[0x18]	32407	1			T3	575		T32	1		T145	1
valid_sources[0x19]	31597	1			T3	505		T145	1		T88	1
valid_sources[0x1a]	32056	1			T3	546		T8	1		T101	1
valid_sources[0x1b]	33171	1			T1	1		T2	1		T3	546
valid_sources[0x1c]	32349	1			T3	539		T32	1		T145	1
valid_sources[0x1d]	33220	1			T3	540		T8	2		T5	3
valid_sources[0x1e]	31895	1			T2	1		T3	533		T5	10
valid_sources[0x1f]	30780	1			T3	517		T8	2		T5	11
valid_sources[0x20]	33319	1			T2	1		T3	496		T13	624
valid_sources[0x21]	32115	1			T3	594		T5	2		T13	123
valid_sources[0x22]	33972	1			T3	518		T145	1		T13	661
valid_sources[0x23]	32411	1			T2	1		T3	511		T13	525
valid_sources[0x24]	32573	1			T1	1		T3	531		T101	1
valid_sources[0x25]	31202	1			T1	5		T3	552		T145	2
valid_sources[0x26]	34027	1			T3	566		T8	1		T101	2
valid_sources[0x27]	32706	1			T2	1		T3	495		T13	90
valid_sources[0x28]	31237	1			T3	534		T32	1		T145	4
valid_sources[0x29]	30577	1			T1	1		T2	1		T3	519
valid_sources[0x2a]	31669	1			T3	567		T8	1		T145	4
valid_sources[0x2b]	33245	1			T3	560		T145	1		T13	828
valid_sources[0x2c]	31764	1			T3	549		T145	1		T5	8
valid_sources[0x2d]	31198	1			T3	482		T145	4		T5	2
valid_sources[0x2e]	31795	1			T3	533		T145	1		T5	3
valid_sources[0x2f]	33369	1			T3	556		T13	493		T93	19
valid_sources[0x30]	32236	1			T1	1		T2	1		T3	516
valid_sources[0x31]	33791	1			T1	4		T3	544		T5	7
valid_sources[0x32]	33058	1			T3	509		T101	1		T145	1
valid_sources[0x33]	31693	1			T3	480		T13	230		T98	1
valid_sources[0x34]	32599	1			T3	510		T101	1		T145	2
valid_sources[0x35]	31454	1			T3	545		T9	4		T145	3
valid_sources[0x36]	33741	1			T3	565		T32	1		T13	109
valid_sources[0x37]	30939	1			T3	527		T101	1		T13	133
valid_sources[0x38]	31264	1			T2	1		T3	523		T101	1
valid_sources[0x39]	32386	1			T2	2		T3	563		T5	6
valid_sources[0x3a]	31642	1			T3	505		T101	1		T5	11
valid_sources[0x3b]	32880	1			T2	1		T3	531		T8	1
valid_sources[0x3c]	33279	1			T2	1		T3	525		T4	2
valid_sources[0x3d]	31355	1			T3	516		T13	82		T92	1
valid_sources[0x3e]	32711	1			T1	3		T3	522		T5	14
valid_sources[0x3f]	31625	1			T2	1		T3	569		T8	2
valid_sources[0x40]	31143	1			T3	521		T13	71		T89	1
valid_sources[0x41]	30253	1			T3	540		T145	2		T5	2
valid_sources[0x42]	30263	1			T2	1		T3	496		T4	1
valid_sources[0x43]	33936	1			T3	518		T8	2		T13	254
valid_sources[0x44]	32815	1			T2	1		T3	504		T8	1
valid_sources[0x45]	31750	1			T3	515		T8	1		T101	3
valid_sources[0x46]	32421	1			T3	547		T13	280		T92	4
valid_sources[0x47]	32526	1			T1	1		T2	1		T3	578
valid_sources[0x48]	31911	1			T2	1		T3	518		T8	2
valid_sources[0x49]	31131	1			T3	517		T5	3		T13	74
valid_sources[0x4a]	31813	1			T3	542		T13	293		T89	2
valid_sources[0x4b]	31346	1			T1	1		T3	604		T9	2
valid_sources[0x4c]	30979	1			T1	1		T3	552		T145	1
valid_sources[0x4d]	33313	1			T2	1		T3	539		T8	2
valid_sources[0x4e]	32456	1			T1	1		T3	535		T5	45
valid_sources[0x4f]	31268	1			T3	518		T8	1		T145	3
valid_sources[0x50]	31742	1			T2	1		T3	521		T145	1
valid_sources[0x51]	33195	1			T2	1		T3	556		T8	1
valid_sources[0x52]	31798	1			T1	2		T3	523		T8	2
valid_sources[0x53]	31832	1			T2	1		T3	515		T13	184
valid_sources[0x54]	31235	1			T1	1		T2	1		T3	531
valid_sources[0x55]	32079	1			T3	553		T32	1		T145	2
valid_sources[0x56]	32588	1			T3	541		T101	2		T13	328
valid_sources[0x57]	31870	1			T2	1		T3	526		T5	4
valid_sources[0x58]	32162	1			T2	2		T3	553		T5	1
valid_sources[0x59]	31345	1			T1	1		T3	523		T145	1
valid_sources[0x5a]	31835	1			T3	524		T4	2		T5	9
valid_sources[0x5b]	32107	1			T3	542		T145	2		T13	236
valid_sources[0x5c]	32198	1			T3	510		T101	1		T32	1
valid_sources[0x5d]	33210	1			T2	1		T3	542		T35	180
valid_sources[0x5e]	34126	1			T2	1		T3	528		T5	7
valid_sources[0x5f]	32139	1			T3	510		T5	21		T13	131
valid_sources[0x60]	31516	1			T3	517		T4	3		T5	3
valid_sources[0x61]	33984	1			T3	520		T88	2		T13	1207
valid_sources[0x62]	33788	1			T3	525		T32	4		T145	1
valid_sources[0x63]	33211	1			T2	1		T3	498		T145	1
valid_sources[0x64]	32271	1			T2	1		T3	517		T8	1
valid_sources[0x65]	30662	1			T3	526		T101	1		T145	1
valid_sources[0x66]	32190	1			T2	1		T3	545		T32	1
valid_sources[0x67]	30649	1			T3	491		T8	1		T5	10
valid_sources[0x68]	32447	1			T2	1		T3	565		T101	1
valid_sources[0x69]	32431	1			T3	540		T13	170		T89	2
valid_sources[0x6a]	31788	1			T3	511		T4	1		T5	1
valid_sources[0x6b]	31403	1			T2	2		T3	538		T101	1
valid_sources[0x6c]	33699	1			T1	5		T3	535		T8	1
valid_sources[0x6d]	32225	1			T2	1		T3	505		T8	1
valid_sources[0x6e]	31189	1			T2	1		T3	545		T13	222
valid_sources[0x6f]	32721	1			T1	2		T2	1		T3	547
valid_sources[0x70]	33002	1			T1	2		T3	526		T13	37
valid_sources[0x71]	32291	1			T3	523		T5	9		T13	778
valid_sources[0x72]	30804	1			T3	523		T8	1		T101	3
valid_sources[0x73]	31375	1			T2	1		T3	493		T8	1
valid_sources[0x74]	33281	1			T1	1		T3	566		T5	2
valid_sources[0x75]	31420	1			T3	587		T8	1		T13	251
valid_sources[0x76]	32184	1			T3	538		T13	149		T89	2
valid_sources[0x77]	32124	1			T1	1		T3	503		T5	21
valid_sources[0x78]	31664	1			T1	2		T3	479		T101	1
valid_sources[0x79]	31384	1			T3	541		T5	3		T13	263
valid_sources[0x7a]	33703	1			T2	2		T3	597		T5	6
valid_sources[0x7b]	32248	1			T2	2		T3	520		T13	569
valid_sources[0x7c]	31480	1			T3	488		T4	1		T9	11
valid_sources[0x7d]	32852	1			T2	1		T3	536		T5	2
valid_sources[0x7e]	31641	1			T3	558		T9	2		T32	2
valid_sources[0x7f]	32413	1			T2	1		T3	560		T8	1
valid_sources[0x80]	32230	1			T1	1		T3	540		T32	2

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

2044913

1

T1

40

T2

60

T3

33465

values[0x0]

all_enables

biggest_size

2992345

1

T1

26

T2

31

T3

49940

values[0x1]

all_enables

biggest_size

2994530

1

T1

14

T2

29

T3

49854