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Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 13958 1 T1 8 T2 3 T3 22


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 13958 1 T1 8 T2 3 T3 22


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 9945 1 T1 5 T2 2 T3 12
true 16340 1 T1 8 T2 4 T3 22


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 10911 1 T1 7 T2 3 T3 13
true 16403 1 T1 8 T2 4 T3 22


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 64 1 T3 2 T14 2 T78 2
others[1] 98 1 T14 2 T107 2 T104 2
others[2] 92 1 T14 2 T78 2 T262 2
others[3] 82 1 T101 2 T102 2 T78 2
others[4] 64 1 T14 2 T78 2 T380 2
others[5] 78 1 T113 2 T95 2 T78 2
others[6] 118 1 T14 4 T39 2 T188 2
others[7] 98 1 T100 2 T78 6 T106 2
false 13958 1 T1 8 T2 3 T3 22


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 82 1 T104 2 T190 4 T236 4
others[1] 96 1 T98 2 T381 2 T61 2
others[2] 86 1 T26 2 T14 6 T101 2
others[3] 84 1 T14 2 T84 2 T189 2
others[4] 68 1 T14 2 T106 2 T61 2
others[5] 90 1 T102 2 T104 2 T78 4
others[6] 60 1 T27 4 T39 2 T105 2
others[7] 112 1 T14 2 T100 2 T78 2
false 13958 1 T1 8 T2 3 T3 22


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 82 1 T26 2 T14 2 T102 2
others[1] 86 1 T3 2 T236 2 T238 2
others[2] 74 1 T98 2 T78 4 T106 2
others[3] 68 1 T101 2 T78 2 T106 2
others[4] 70 1 T26 2 T14 2 T98 2
others[5] 104 1 T14 2 T104 2 T236 8
others[6] 94 1 T105 2 T382 2 T380 2
others[7] 114 1 T14 2 T236 4 T262 4
false 13958 1 T1 8 T2 3 T3 22


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 52 1 T98 2 T188 2 T106 4
others[1] 70 1 T78 4 T189 4 T159 2
others[2] 72 1 T14 2 T78 2 T188 2
others[3] 62 1 T3 2 T14 2 T236 2
others[4] 84 1 T14 2 T129 2 T105 2
others[5] 50 1 T3 2 T78 2 T190 2
others[6] 64 1 T106 2 T85 2 T159 2
others[7] 86 1 T3 2 T78 2 T105 2
false 13958 1 T1 8 T2 3 T3 22


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 82 1 T98 2 T100 2 T383 2
others[1] 76 1 T78 4 T384 2 T385 2
others[2] 94 1 T14 6 T103 2 T78 2
others[3] 90 1 T3 2 T14 2 T100 2
others[4] 72 1 T3 2 T78 6 T236 4
others[5] 98 1 T27 2 T101 2 T78 2
others[6] 82 1 T78 2 T380 2 T238 2
others[7] 124 1 T14 4 T95 2 T104 2
false 13958 1 T1 8 T2 3 T3 22


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 44 1 T14 2 T102 2 T78 2
others[1] 26 1 T384 2 T386 2 T387 2
others[2] 20 1 T387 4 T388 2 T389 2
others[3] 30 1 T14 2 T100 2 T236 2
others[4] 54 1 T104 2 T78 2 T236 2
others[5] 30 1 T102 2 T104 2 T61 2
others[6] 28 1 T101 2 T262 2 T386 4
others[7] 36 1 T78 2 T237 2 T61 2
false 13958 1 T1 8 T2 3 T3 22


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 72 1 T78 2 T236 2 T262 4
others[1] 88 1 T3 2 T103 2 T104 2
others[2] 92 1 T12 2 T78 4 T105 2
others[3] 100 1 T14 2 T106 2 T236 6
others[4] 100 1 T78 2 T105 2 T189 2
others[5] 98 1 T101 4 T189 2 T236 2
others[6] 98 1 T3 2 T14 2 T102 2
others[7] 130 1 T78 4 T106 2 T190 2
false 13958 1 T1 8 T2 3 T3 22


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 84 1 T129 2 T78 2 T105 2
others[1] 72 1 T107 2 T78 2 T189 2
others[2] 94 1 T3 2 T104 2 T78 4
others[3] 86 1 T14 4 T102 2 T78 4
others[4] 86 1 T27 2 T102 2 T95 2
others[5] 88 1 T3 2 T113 2 T14 2
others[6] 86 1 T3 2 T188 2 T236 2
others[7] 96 1 T3 2 T102 2 T78 2
false 13958 1 T1 8 T2 3 T3 22


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 96 1 T3 4 T38 2 T102 4
others[1] 88 1 T12 2 T14 2 T98 2
others[2] 128 1 T26 2 T14 2 T101 2
others[3] 92 1 T3 2 T26 2 T39 2
others[4] 82 1 T27 2 T101 2 T100 2
others[5] 82 1 T14 2 T102 2 T78 4
others[6] 100 1 T98 2 T103 2 T106 2
others[7] 98 1 T12 2 T78 2 T106 2
false 13958 1 T1 8 T2 3 T3 22


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 72 1 T95 2 T236 2 T390 2
others[1] 108 1 T3 2 T101 2 T107 2
others[2] 80 1 T38 2 T100 2 T190 2
others[3] 84 1 T14 2 T98 2 T78 2
others[4] 96 1 T3 4 T101 2 T107 2
others[5] 96 1 T3 2 T14 4 T39 2
others[6] 110 1 T14 2 T78 2 T391 2
others[7] 116 1 T101 4 T78 4 T106 2
false 13958 1 T1 8 T2 3 T3 22


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 82 1 T27 2 T14 2 T189 2
others[1] 92 1 T78 2 T189 2 T236 2
others[2] 86 1 T27 2 T102 2 T100 2
others[3] 92 1 T14 2 T284 2 T78 2
others[4] 110 1 T3 2 T108 2 T14 4
others[5] 74 1 T107 2 T102 2 T106 2
others[6] 116 1 T4 2 T27 2 T115 2
others[7] 120 1 T14 2 T101 2 T381 2
false 13958 1 T1 8 T2 3 T3 22


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 29 1 T18 1 T242 1 T206 2
others[1] 32 1 T5 1 T39 2 T19 1
others[2] 37 1 T36 1 T195 1 T296 3
others[3] 40 1 T38 2 T39 2 T269 1
others[4] 23 1 T36 1 T296 2 T260 1
others[5] 39 1 T5 1 T17 1 T78 2
others[6] 30 1 T7 1 T17 1 T296 1
others[7] 27 1 T17 1 T18 1 T296 1
false 13958 1 T1 8 T2 3 T3 22
true 2262 1 T3 8 T4 1 T10 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 28 1 T7 1 T36 1 T78 2
others[1] 29 1 T17 1 T260 2 T20 1
others[2] 23 1 T5 1 T195 1 T296 1
others[3] 40 1 T38 2 T296 1 T269 1
others[4] 30 1 T296 1 T39 2 T260 2
others[5] 41 1 T36 1 T17 1 T296 2
others[6] 25 1 T17 1 T18 1 T296 1
others[7] 41 1 T5 1 T18 1 T296 1
false 11353 1 T1 7 T2 3 T3 13
true 18594 1 T1 8 T2 4 T3 30


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 94 1 T14 2 T102 2 T104 2
others[1] 78 1 T113 2 T14 2 T107 2
others[2] 68 1 T78 2 T188 4 T106 2
others[3] 88 1 T39 2 T106 2 T236 2
others[4] 82 1 T14 4 T100 2 T78 4
others[5] 80 1 T101 2 T95 2 T236 2
others[6] 86 1 T3 2 T14 4 T78 6
others[7] 118 1 T78 2 T189 4 T236 2
false 7738 1 T1 7 T2 3 T3 1
true 16455 1 T1 8 T2 4 T3 22


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 86 1 T27 2 T104 2 T106 2
others[1] 98 1 T27 2 T14 2 T107 2
others[2] 76 1 T14 2 T98 2 T78 2
others[3] 66 1 T26 2 T14 2 T101 2
others[4] 74 1 T78 4 T189 2 T278 2
others[5] 78 1 T14 2 T84 2 T106 2
others[6] 92 1 T102 2 T104 2 T106 2
others[7] 108 1 T14 4 T100 2 T105 2
false 6850 1 T1 5 T2 2 T3 8
true 16228 1 T1 8 T2 4 T3 22


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 96 1 T3 2 T26 2 T102 2
others[1] 82 1 T14 2 T101 2 T98 2
others[2] 74 1 T106 2 T262 2 T278 2
others[3] 70 1 T14 4 T78 2 T155 2
others[4] 106 1 T190 2 T392 2 T162 2
others[5] 68 1 T14 2 T78 2 T236 6
others[6] 88 1 T236 10 T237 2 T392 2
others[7] 108 1 T26 2 T78 4 T262 2
false 7251 1 T1 5 T2 3 T3 1
true 16252 1 T1 8 T2 4 T3 22


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 48 1 T5 1 T195 1 T18 1
others[1] 34 1 T296 1 T269 1 T19 1
others[2] 29 1 T36 1 T16 1 T17 1
others[3] 34 1 T5 1 T18 1 T296 1
others[4] 27 1 T16 1 T296 1 T338 1
others[5] 29 1 T17 2 T98 2 T296 1
others[6] 19 1 T260 1 T338 2 T393 1
others[7] 35 1 T6 1 T7 1 T17 1
false 11288 1 T1 7 T2 3 T3 13
true 18567 1 T1 8 T2 4 T3 31


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 52 1 T78 4 T85 2 T394 6
others[1] 70 1 T3 2 T188 2 T189 2
others[2] 86 1 T78 4 T105 2 T189 2
others[3] 68 1 T129 2 T106 2 T159 2
others[4] 54 1 T98 2 T105 2 T106 2
others[5] 66 1 T3 2 T14 2 T188 4
others[6] 62 1 T3 2 T14 2 T106 2
others[7] 82 1 T14 2 T78 2 T106 2
false 8842 1 T1 7 T2 3 T3 1
true 16444 1 T1 8 T2 4 T3 22


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 34 1 T6 1 T7 1 T18 2
others[1] 41 1 T44 2 T6 2 T393 1
others[2] 33 1 T5 1 T36 1 T16 1
others[3] 28 1 T6 1 T7 2 T17 1
others[4] 30 1 T296 1 T260 1 T393 1
others[5] 26 1 T18 1 T262 2 T395 1
others[6] 28 1 T6 1 T269 1 T260 1
others[7] 28 1 T5 1 T6 1 T296 2
false 11246 1 T1 7 T2 3 T3 13
true 18572 1 T1 8 T2 4 T3 30


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 70 1 T27 2 T104 2 T78 2
others[1] 102 1 T3 2 T14 2 T78 4
others[2] 90 1 T14 4 T100 2 T104 2
others[3] 84 1 T14 4 T98 2 T100 2
others[4] 90 1 T95 2 T78 4 T236 2
others[5] 74 1 T14 2 T101 2 T236 2
others[6] 94 1 T103 2 T78 4 T106 2
others[7] 114 1 T3 2 T236 2 T380 2
false 7694 1 T1 7 T2 3 T3 1
true 16385 1 T1 8 T2 4 T3 22


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 34 1 T6 1 T7 1 T18 1
others[1] 29 1 T7 2 T260 1 T339 1
others[2] 33 1 T5 1 T17 2 T296 1
others[3] 29 1 T6 1 T19 2 T140 1
others[4] 31 1 T7 1 T269 2 T19 1
others[5] 26 1 T195 1 T393 1 T339 1
others[6] 18 1 T7 1 T393 1 T396 1
others[7] 39 1 T6 1 T7 1 T17 1
false 11214 1 T1 7 T2 3 T3 13
true 18542 1 T1 8 T2 4 T3 30


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 44 1 T102 2 T236 2 T61 2
others[1] 36 1 T14 2 T262 2 T355 2
others[2] 44 1 T101 2 T104 2 T78 2
others[3] 36 1 T78 2 T237 2 T397 2
others[4] 26 1 T238 2 T155 2 T262 2
others[5] 32 1 T14 2 T100 2 T61 2
others[6] 26 1 T104 2 T78 2 T236 2
others[7] 24 1 T102 2 T237 4 T398 2
false 9773 1 T1 7 T2 3 T3 13
true 16428 1 T1 8 T2 4 T3 22


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 104 1 T101 2 T103 2 T236 6
others[1] 94 1 T3 2 T236 4 T237 2
others[2] 96 1 T78 6 T106 2 T236 2
others[3] 110 1 T14 2 T104 2 T189 2
others[4] 94 1 T3 2 T78 2 T189 2
others[5] 84 1 T12 2 T102 2 T78 2
others[6] 96 1 T14 2 T101 2 T78 8
others[7] 100 1 T105 2 T106 2 T236 6
false 6952 1 T1 5 T2 2 T3 1
true 16229 1 T1 8 T2 4 T3 22


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 88 1 T3 2 T107 2 T102 2
others[1] 92 1 T78 8 T190 2 T236 2
others[2] 84 1 T3 2 T14 2 T102 2
others[3] 70 1 T129 2 T78 2 T189 4
others[4] 72 1 T14 2 T78 2 T105 4
others[5] 82 1 T188 2 T189 2 T236 4
others[6] 94 1 T3 2 T14 2 T95 2
others[7] 110 1 T3 2 T113 2 T27 2
false 6952 1 T1 5 T2 2 T3 1
true 16229 1 T1 8 T2 4 T3 22


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 76 1 T3 2 T106 2 T85 2
others[1] 90 1 T12 4 T102 4 T78 2
others[2] 100 1 T27 2 T236 2 T237 2
others[3] 106 1 T3 2 T78 6 T106 2
others[4] 90 1 T14 2 T39 2 T382 2
others[5] 106 1 T3 2 T26 2 T101 2
others[6] 112 1 T38 2 T26 2 T14 2
others[7] 86 1 T14 2 T103 2 T106 2
false 6320 1 T1 2 T2 2 T3 1
true 16208 1 T1 8 T2 4 T3 22


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 96 1 T14 2 T101 4 T78 2
others[1] 92 1 T107 2 T100 2 T78 2
others[2] 96 1 T38 2 T101 2 T189 2
others[3] 94 1 T3 2 T78 2 T106 2
others[4] 76 1 T14 4 T98 2 T236 2
others[5] 82 1 T101 2 T236 4 T237 2
others[6] 100 1 T3 2 T14 2 T95 2
others[7] 126 1 T3 4 T107 2 T78 2
false 6320 1 T1 2 T2 2 T3 1
true 16208 1 T1 8 T2 4 T3 22


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 66 1 T107 2 T238 2 T159 2
others[1] 60 1 T26 2 T103 2 T78 4
others[2] 44 1 T27 2 T14 2 T95 2
others[3] 60 1 T78 2 T106 2 T236 4
others[4] 62 1 T104 2 T61 4 T399 2
others[5] 72 1 T104 2 T106 4 T236 2
others[6] 54 1 T12 2 T102 2 T106 2
others[7] 64 1 T106 2 T236 2 T400 2
false 6848 1 T1 2 T2 2 T3 11
true 17628 1 T1 8 T2 4 T3 28


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 50 1 T107 2 T78 2 T106 2
others[1] 52 1 T27 2 T14 2 T385 2
others[2] 64 1 T12 2 T100 4 T394 2
others[3] 60 1 T102 2 T98 2 T106 2
others[4] 78 1 T102 2 T78 4 T261 2
others[5] 38 1 T26 2 T78 2 T106 2
others[6] 58 1 T106 2 T159 2 T262 2
others[7] 74 1 T104 2 T85 2 T237 2
false 6848 1 T1 2 T2 2 T3 11
true 17628 1 T1 8 T2 4 T3 28


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 24 1 T5 3 T37 2 T18 1
others[1] 25 1 T36 1 T260 1 T393 1
others[2] 24 1 T17 1 T269 1 T140 2
others[3] 24 1 T7 1 T195 1 T260 1
others[4] 30 1 T7 1 T16 1 T260 1
others[5] 24 1 T44 2 T7 1 T78 2
others[6] 33 1 T7 1 T17 1 T269 1
others[7] 33 1 T7 1 T269 1 T140 2
false 11432 1 T1 7 T2 3 T3 13
true 18682 1 T1 8 T2 4 T3 31


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 64 1 T4 2 T105 2 T106 2
others[1] 92 1 T14 2 T101 2 T98 2
others[2] 96 1 T14 4 T102 2 T284 2
others[3] 100 1 T106 2 T392 2 T399 2
others[4] 104 1 T14 2 T78 4 T237 2
others[5] 88 1 T101 2 T107 2 T100 2
others[6] 126 1 T3 2 T108 2 T27 4
others[7] 102 1 T27 2 T115 2 T14 4
false 7752 1 T1 7 T2 3 T3 1
true 16421 1 T1 8 T2 4 T3 22


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 40 1 T5 1 T6 1 T7 1
others[1] 32 1 T18 2 T338 2 T401 1
others[2] 29 1 T37 1 T19 1 T140 1
others[3] 30 1 T5 1 T16 1 T17 1
others[4] 23 1 T17 1 T98 2 T338 1
others[5] 25 1 T269 1 T402 2 T20 1
others[6] 44 1 T296 1 T260 3 T338 2
others[7] 33 1 T17 1 T19 2 T393 1
false 13958 1 T1 8 T2 3 T3 22
true 2287 1 T3 9 T4 1 T10 1

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%