Group : otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
dashboard | hierarchy | modlist | groups | tests | asserts

Group : otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
84.44 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv



Summary for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 18 1 17 94.44
Crosses 72 13 59 81.94


Variables for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
err_code_vals 7 1 6 85.71 100 1 1 0
partition 11 0 11 100.00 100 1 1 0


Crosses for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
dai_err_code_for_all_partitions 72 13 59 81.94 100 1 1 0


Summary for Variable err_code_vals

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 7 1 6 85.71


User Defined Bins for err_code_vals

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
macro_err 0 1 1


Excluded/Illegal bins
NAMECOUNTSTATUS
illegal_err 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
fsm_err 52730 1 T2 200 T10 549 T11 255
access_err 63060 1 T3 40 T4 12 T10 12
write_blank_err 437 1 T5 6 T6 1 T36 1
ecc_uncorr_err 63926 1 T4 415 T5 419 T6 167
ecc_corr_err 1513 1 T4 14 T38 2 T28 5
no_err 93991 1 T1 71 T3 43 T4 32



Summary for Variable partition

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 11 0 11 100.00


User Defined Bins for partition

Excluded/Illegal bins
NAMECOUNTSTATUS
illegal_idx 0 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
life_cycle 622 1 T5 2 T6 2 T14 9
secret2 23698 1 T1 14 T3 12 T4 6
secret1 32433 1 T1 7 T3 17 T4 52
secret0 37474 1 T1 13 T2 200 T3 2
hw_cfg1 35006 1 T1 4 T3 6 T4 73
hw_cfg0 27330 1 T1 7 T3 3 T4 121
rot_creator_auth_state 23520 1 T1 6 T3 11 T4 66
rot_creator_auth_codesign 20786 1 T1 2 T3 2 T4 4
owner_sw_cfg 21370 1 T1 4 T3 11 T4 66
creator_sw_cfg 20094 1 T1 6 T3 16 T4 70
vendor_test 33324 1 T1 8 T3 3 T4 10



Summary for Cross dai_err_code_for_all_partitions

Samples crossed: err_code_vals partition
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
TOTAL 72 13 59 81.94 13
Automatically Generated Cross Bins 72 13 59 81.94 13
User Defined Cross Bins 0 0 0


Automatically Generated Cross Bins for dai_err_code_for_all_partitions

Uncovered bins
err_code_valspartitionCOUNTAT LEASTNUMBERSTATUS
[fsm_err] [life_cycle] 0 1 1
[ecc_corr_err] [vendor_test] 0 1 1
[macro_err] [secret2 , secret1 , secret0 , hw_cfg1 , hw_cfg0 , rot_creator_auth_state , rot_creator_auth_codesign , owner_sw_cfg , creator_sw_cfg , vendor_test] -- -- 10
[no_err] [life_cycle] 0 1 1


Covered bins
err_code_valspartitionCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
fsm_err secret2 3175 1 T7 58 T140 81 T342 561
fsm_err secret1 5772 1 T36 4 T196 50 T343 108
fsm_err secret0 7051 1 T2 200 T10 549 T109 364
fsm_err hw_cfg1 3489 1 T5 62 T344 245 T246 33
fsm_err hw_cfg0 6779 1 T11 255 T198 446 T141 66
fsm_err rot_creator_auth_state 3573 1 T6 1 T142 23 T345 140
fsm_err rot_creator_auth_codesign 2019 1 T270 402 T150 44 T242 302
fsm_err owner_sw_cfg 2893 1 T7 193 T37 105 T244 182
fsm_err creator_sw_cfg 2643 1 T346 172 T275 83 T260 162
fsm_err vendor_test 15336 1 T13 47 T38 30 T28 22
access_err life_cycle 622 1 T5 2 T6 2 T14 9
access_err secret2 10989 1 T3 5 T4 6 T12 7
access_err secret1 5884 1 T3 11 T12 5 T44 4
access_err secret0 4713 1 T3 2 T10 1 T12 2
access_err hw_cfg1 1297 1 T5 3 T108 2 T6 1
access_err hw_cfg0 2259 1 T113 1 T26 4 T27 3
access_err rot_creator_auth_state 6093 1 T3 6 T10 4 T12 1
access_err rot_creator_auth_codesign 8083 1 T10 5 T11 2 T12 1
access_err owner_sw_cfg 7282 1 T3 9 T4 2 T12 3
access_err creator_sw_cfg 7983 1 T3 7 T4 1 T10 1
access_err vendor_test 7855 1 T4 3 T10 1 T12 1
write_blank_err secret2 9 1 T250 1 T347 1 T348 3
write_blank_err secret1 29 1 T36 1 T195 1 T349 1
write_blank_err secret0 45 1 T16 1 T14 1 T37 1
write_blank_err hw_cfg1 76 1 T5 1 T6 1 T192 1
write_blank_err hw_cfg0 15 1 T5 1 T14 1 T242 2
write_blank_err rot_creator_auth_state 140 1 T5 3 T14 5 T93 1
write_blank_err rot_creator_auth_codesign 40 1 T14 1 T350 3 T351 1
write_blank_err owner_sw_cfg 35 1 T5 1 T14 1 T351 4
write_blank_err creator_sw_cfg 11 1 T14 1 T269 1 T351 1
write_blank_err vendor_test 37 1 T351 1 T352 1 T353 1
ecc_uncorr_err secret2 3988 1 T250 661 T347 577 T204 45
ecc_uncorr_err secret1 11245 1 T4 46 T36 181 T195 158
ecc_uncorr_err secret0 16463 1 T16 341 T141 63 T14 392
ecc_uncorr_err hw_cfg1 18917 1 T4 67 T5 8 T6 167
ecc_uncorr_err hw_cfg0 5136 1 T4 116 T5 411 T141 69
ecc_uncorr_err rot_creator_auth_state 4913 1 T4 64 T141 51 T142 20
ecc_uncorr_err rot_creator_auth_codesign 1345 1 T141 37 T230 32 T354 38
ecc_uncorr_err owner_sw_cfg 1324 1 T4 58 T141 138 T142 33
ecc_uncorr_err creator_sw_cfg 595 1 T4 64 T230 20 T355 16
ecc_corr_err secret2 105 1 T141 1 T39 2 T151 4
ecc_corr_err secret1 131 1 T4 4 T141 8 T84 1
ecc_corr_err secret0 145 1 T141 4 T39 3 T84 3
ecc_corr_err hw_cfg1 292 1 T4 1 T141 3 T39 3
ecc_corr_err hw_cfg0 292 1 T4 4 T141 3 T142 1
ecc_corr_err rot_creator_auth_state 148 1 T141 1 T76 3 T61 7
ecc_corr_err rot_creator_auth_codesign 125 1 T4 2 T28 5 T141 2
ecc_corr_err owner_sw_cfg 142 1 T4 1 T38 1 T141 3
ecc_corr_err creator_sw_cfg 133 1 T4 2 T38 1 T141 3
no_err secret2 5432 1 T1 14 T3 7 T9 3
no_err secret1 9372 1 T1 7 T3 6 T4 2
no_err secret0 9057 1 T1 13 T4 5 T9 1
no_err hw_cfg1 10935 1 T1 4 T3 6 T4 5
no_err hw_cfg0 12849 1 T1 7 T3 3 T4 1
no_err rot_creator_auth_state 8653 1 T1 6 T3 5 T4 2
no_err rot_creator_auth_codesign 9174 1 T1 2 T3 2 T4 2
no_err owner_sw_cfg 9694 1 T1 4 T3 2 T4 5
no_err creator_sw_cfg 8729 1 T1 6 T3 9 T4 3
no_err vendor_test 10096 1 T1 8 T3 3 T4 7


User Defined Cross Bins for dai_err_code_for_all_partitions

Excluded/Illegal bins
NAMECOUNTSTATUS
vendor_test_ecc_uncorrectable_err 0 Illegal
life_cycle_ignore 0 Excluded

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