Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	7117685	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

6867170

1

T1

1423

T2

212

T3

155

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	8264451	1			T1	2647		T2	597		T3	1756
values[0x0]	2181055	1			T1	282		T2	132		T3	45
values[0x1]	3539349	1			T1	234		T2	134		T3	53

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	4640319	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

9344536

1

T1

1770

T2

404

T3

678

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	55135	1			T1	1		T4	5		T8	595
valid_sources[0x01]	48801	1			T1	7		T4	5		T9	31
valid_sources[0x02]	60194	1			T1	9		T4	4		T9	33
valid_sources[0x03]	48729	1			T1	6		T4	5		T9	40
valid_sources[0x04]	52912	1			T1	23		T4	3		T9	43
valid_sources[0x05]	66292	1			T1	7		T4	1		T9	44
valid_sources[0x06]	56386	1			T1	9		T4	4		T9	33
valid_sources[0x07]	47775	1			T1	27		T4	6		T9	45
valid_sources[0x08]	47738	1			T4	5		T9	44		T11	48
valid_sources[0x09]	48352	1			T1	31		T4	4		T9	45
valid_sources[0x0a]	51185	1			T1	6		T4	4		T9	42
valid_sources[0x0b]	48477	1			T4	7		T9	39		T11	19
valid_sources[0x0c]	56611	1			T1	16		T4	4		T9	42
valid_sources[0x0d]	64079	1			T1	18		T9	42		T11	25
valid_sources[0x0e]	51217	1			T1	1		T4	5		T9	33
valid_sources[0x0f]	47086	1			T1	16		T4	6		T9	45
valid_sources[0x10]	48206	1			T1	20		T4	4		T9	38
valid_sources[0x11]	50738	1			T1	4		T4	7		T9	42
valid_sources[0x12]	52047	1			T1	29		T4	10		T9	34
valid_sources[0x13]	52325	1			T1	5		T4	3		T9	44
valid_sources[0x14]	48749	1			T1	23		T4	7		T9	48
valid_sources[0x15]	62782	1			T4	7		T9	49		T11	40
valid_sources[0x16]	50381	1			T1	28		T4	6		T9	47
valid_sources[0x17]	50919	1			T1	17		T4	3		T9	50
valid_sources[0x18]	55234	1			T1	13		T4	2		T9	35
valid_sources[0x19]	90094	1			T1	3		T4	6		T9	47
valid_sources[0x1a]	48876	1			T1	16		T4	10		T9	44
valid_sources[0x1b]	56782	1			T1	7		T4	6		T9	45
valid_sources[0x1c]	48216	1			T1	51		T4	6		T9	46
valid_sources[0x1d]	55320	1			T1	28		T4	8		T9	45
valid_sources[0x1e]	48978	1			T1	5		T4	4		T9	45
valid_sources[0x1f]	58068	1			T1	3		T4	9		T9	52
valid_sources[0x20]	49526	1			T1	12		T4	1		T9	38
valid_sources[0x21]	48554	1			T1	8		T4	9		T9	45
valid_sources[0x22]	49872	1			T1	4		T4	9		T9	61
valid_sources[0x23]	47860	1			T1	26		T4	4		T9	36
valid_sources[0x24]	55018	1			T1	28		T4	5		T9	37
valid_sources[0x25]	47354	1			T1	8		T4	3		T9	42
valid_sources[0x26]	50177	1			T1	14		T4	2		T9	49
valid_sources[0x27]	67553	1			T4	1		T9	52		T11	25
valid_sources[0x28]	47690	1			T1	1		T4	1		T9	47
valid_sources[0x29]	51293	1			T1	6		T4	8		T9	36
valid_sources[0x2a]	50642	1			T1	11		T4	6		T9	45
valid_sources[0x2b]	58226	1			T1	6		T4	7		T9	37
valid_sources[0x2c]	48857	1			T1	19		T4	4		T9	27
valid_sources[0x2d]	56719	1			T1	15		T4	5		T9	39
valid_sources[0x2e]	49603	1			T1	11		T4	3		T9	39
valid_sources[0x2f]	50617	1			T1	10		T4	9		T9	40
valid_sources[0x30]	54604	1			T1	22		T4	1		T9	41
valid_sources[0x31]	52347	1			T1	12		T4	5		T9	42
valid_sources[0x32]	47502	1			T1	1		T4	7		T9	39
valid_sources[0x33]	57851	1			T4	2		T9	38		T11	44
valid_sources[0x34]	57655	1			T1	6		T4	5		T9	39
valid_sources[0x35]	48583	1			T1	4		T4	3		T9	33
valid_sources[0x36]	48350	1			T1	33		T4	4		T9	41
valid_sources[0x37]	53139	1			T1	3		T4	5		T9	40
valid_sources[0x38]	48695	1			T1	16		T4	5		T9	36
valid_sources[0x39]	54089	1			T1	12		T4	1		T9	43
valid_sources[0x3a]	51957	1			T1	18		T4	3		T9	28
valid_sources[0x3b]	52470	1			T1	10		T4	5		T9	37
valid_sources[0x3c]	52874	1			T1	11		T4	4		T9	50
valid_sources[0x3d]	50959	1			T1	29		T4	3		T9	42
valid_sources[0x3e]	60494	1			T1	18		T4	4		T9	42
valid_sources[0x3f]	49624	1			T1	17		T4	4		T9	40
valid_sources[0x40]	82446	1			T1	9		T4	7		T9	31
valid_sources[0x41]	48092	1			T4	3		T9	32		T11	30
valid_sources[0x42]	47147	1			T4	5		T9	40		T11	34
valid_sources[0x43]	52889	1			T1	14		T4	5		T9	34
valid_sources[0x44]	51135	1			T1	15		T4	3		T9	44
valid_sources[0x45]	46436	1			T1	10		T4	12		T9	49
valid_sources[0x46]	52471	1			T4	8		T9	33		T11	57
valid_sources[0x47]	48378	1			T4	3		T9	42		T11	30
valid_sources[0x48]	49935	1			T1	28		T4	8		T9	39
valid_sources[0x49]	49131	1			T1	2		T4	7		T9	39
valid_sources[0x4a]	52433	1			T4	3		T9	51		T11	29
valid_sources[0x4b]	51181	1			T4	7		T9	29		T11	42
valid_sources[0x4c]	57968	1			T4	8		T9	39		T11	33
valid_sources[0x4d]	48413	1			T1	16		T4	6		T9	39
valid_sources[0x4e]	59886	1			T1	7		T5	11030		T4	5
valid_sources[0x4f]	48012	1			T1	33		T4	3		T9	41
valid_sources[0x50]	48593	1			T1	15		T4	3		T9	51
valid_sources[0x51]	49613	1			T1	6		T4	6		T9	31
valid_sources[0x52]	55253	1			T1	3		T4	13		T9	40
valid_sources[0x53]	51578	1			T1	12		T4	11		T9	42
valid_sources[0x54]	57416	1			T1	4		T4	8		T9	24
valid_sources[0x55]	125454	1			T1	8		T4	2		T9	37
valid_sources[0x56]	55180	1			T1	9		T4	5		T9	32
valid_sources[0x57]	48117	1			T4	3		T9	35		T11	33
valid_sources[0x58]	49045	1			T4	1		T9	35		T11	31
valid_sources[0x59]	58532	1			T1	6		T4	5		T9	46
valid_sources[0x5a]	74423	1			T1	11		T4	2		T9	41
valid_sources[0x5b]	52569	1			T1	14		T4	10		T9	46
valid_sources[0x5c]	48442	1			T1	36		T4	5		T9	43
valid_sources[0x5d]	50777	1			T1	31		T4	2		T9	34
valid_sources[0x5e]	51720	1			T1	5		T4	5		T9	38
valid_sources[0x5f]	47645	1			T4	7		T9	37		T11	34
valid_sources[0x60]	58872	1			T1	18		T4	2		T9	46
valid_sources[0x61]	95750	1			T1	11		T4	10		T9	51
valid_sources[0x62]	46970	1			T1	27		T4	5		T9	38
valid_sources[0x63]	49766	1			T1	9		T4	3		T9	46
valid_sources[0x64]	53296	1			T1	6		T4	12		T9	38
valid_sources[0x65]	50097	1			T1	9		T4	2		T9	38
valid_sources[0x66]	50214	1			T1	3		T4	9		T9	32
valid_sources[0x67]	52153	1			T4	5		T9	37		T11	32
valid_sources[0x68]	47795	1			T1	5		T4	4		T9	41
valid_sources[0x69]	54856	1			T1	39		T4	10		T9	38
valid_sources[0x6a]	61891	1			T1	5		T4	2		T9	30
valid_sources[0x6b]	58932	1			T1	4		T4	9		T9	43
valid_sources[0x6c]	54184	1			T1	10		T4	6		T9	45
valid_sources[0x6d]	56849	1			T9	36		T11	33		T12	30
valid_sources[0x6e]	48015	1			T1	2		T4	5		T9	36
valid_sources[0x6f]	48348	1			T1	39		T4	9		T9	38
valid_sources[0x70]	53055	1			T1	6		T4	2		T9	53
valid_sources[0x71]	49189	1			T1	6		T4	2		T9	45
valid_sources[0x72]	48396	1			T1	11		T4	11		T9	32
valid_sources[0x73]	53938	1			T1	13		T4	4		T9	42
valid_sources[0x74]	69647	1			T1	4		T4	13		T9	34
valid_sources[0x75]	55507	1			T1	5		T4	3		T9	41
valid_sources[0x76]	51284	1			T1	24		T4	8		T9	34
valid_sources[0x77]	48406	1			T1	6		T4	4		T9	34
valid_sources[0x78]	51671	1			T1	11		T4	9		T9	41
valid_sources[0x79]	62617	1			T1	7		T4	5		T9	32
valid_sources[0x7a]	48541	1			T1	33		T4	5		T9	39
valid_sources[0x7b]	57231	1			T1	3		T4	2		T9	52
valid_sources[0x7c]	49622	1			T1	6		T4	2		T9	36
valid_sources[0x7d]	50256	1			T1	5		T4	3		T9	41
valid_sources[0x7e]	52571	1			T1	13		T4	3		T9	54
valid_sources[0x7f]	46903	1			T1	12		T9	49		T11	28
valid_sources[0x80]	46609	1			T1	46		T4	4		T9	37

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

3343896

1

T1

1174

T2

92

T3

120

values[0x0]

all_enables

biggest_size

1798927

1

T1

152

T2

61

T3

22

values[0x1]

all_enables

biggest_size

1724347

1

T1

97

T2

59

T3

13

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	231199	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

8392261

1

T1

20

T3

80

T5

180

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	2148369	1			T1	10		T3	40		T5	90
values[0x0]	3143472	1			T1	6		T3	17		T5	47
values[0x1]	3331619	1			T1	4		T3	23		T5	43

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	83512	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

8539948

1

T1

20

T3

80

T5

180

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	32221	1			T9	1		T6	66		T13	1198
valid_sources[0x01]	33669	1			T1	1		T97	13		T6	82
valid_sources[0x02]	33443	1			T5	4		T6	82		T165	1
valid_sources[0x03]	34044	1			T5	3		T104	1		T28	1
valid_sources[0x04]	34690	1			T5	1		T6	112		T13	1174
valid_sources[0x05]	33226	1			T6	129		T255	1		T13	1239
valid_sources[0x06]	35544	1			T6	46		T13	1152		T14	4
valid_sources[0x07]	33778	1			T3	1		T5	3		T9	1
valid_sources[0x08]	32535	1			T9	1		T35	1		T6	80
valid_sources[0x09]	35260	1			T6	184		T255	1		T107	1
valid_sources[0x0a]	34616	1			T104	1		T6	29		T70	1
valid_sources[0x0b]	35001	1			T5	1		T9	5		T69	2
valid_sources[0x0c]	33669	1			T35	5		T6	62		T255	2
valid_sources[0x0d]	32747	1			T5	1		T35	1		T69	1
valid_sources[0x0e]	33122	1			T3	1		T5	1		T9	1
valid_sources[0x0f]	32839	1			T3	1		T5	1		T35	1
valid_sources[0x10]	33486	1			T1	1		T9	1		T6	167
valid_sources[0x11]	33935	1			T112	1		T6	556		T13	1174
valid_sources[0x12]	33289	1			T9	2		T69	1		T6	260
valid_sources[0x13]	32557	1			T9	2		T112	1		T69	1
valid_sources[0x14]	33687	1			T3	1		T35	2		T6	93
valid_sources[0x15]	33234	1			T9	1		T112	1		T6	62
valid_sources[0x16]	34011	1			T104	1		T6	145		T254	1
valid_sources[0x17]	33865	1			T28	1		T6	271		T13	1143
valid_sources[0x18]	33094	1			T5	3		T9	3		T6	73
valid_sources[0x19]	32670	1			T5	2		T69	2		T6	101
valid_sources[0x1a]	36092	1			T5	1		T6	170		T107	4
valid_sources[0x1b]	32857	1			T9	2		T6	113		T165	1
valid_sources[0x1c]	33982	1			T3	1		T69	1		T6	131
valid_sources[0x1d]	33668	1			T9	2		T6	247		T70	2
valid_sources[0x1e]	35012	1			T3	1		T5	1		T69	1
valid_sources[0x1f]	33417	1			T3	1		T9	1		T69	1
valid_sources[0x20]	33796	1			T1	1		T5	1		T35	1
valid_sources[0x21]	33741	1			T35	1		T6	26		T375	1
valid_sources[0x22]	34632	1			T104	1		T28	3		T69	4
valid_sources[0x23]	34534	1			T3	2		T5	2		T35	1
valid_sources[0x24]	34594	1			T104	1		T35	1		T112	1
valid_sources[0x25]	32839	1			T5	1		T9	1		T69	2
valid_sources[0x26]	33671	1			T9	3		T69	1		T6	19
valid_sources[0x27]	32532	1			T5	1		T104	1		T28	3
valid_sources[0x28]	33972	1			T35	1		T6	169		T254	2
valid_sources[0x29]	33169	1			T1	1		T5	2		T6	137
valid_sources[0x2a]	34703	1			T6	162		T254	3		T255	1
valid_sources[0x2b]	35143	1			T9	3		T28	2		T6	163
valid_sources[0x2c]	33181	1			T9	1		T6	122		T70	1
valid_sources[0x2d]	33735	1			T9	1		T105	1		T69	2
valid_sources[0x2e]	35493	1			T3	1		T5	3		T9	3
valid_sources[0x2f]	33064	1			T5	2		T9	1		T28	3
valid_sources[0x30]	35178	1			T9	5		T28	1		T35	2
valid_sources[0x31]	34053	1			T5	1		T9	3		T35	1
valid_sources[0x32]	32728	1			T9	2		T28	1		T69	1
valid_sources[0x33]	34625	1			T9	1		T105	1		T6	31
valid_sources[0x34]	34469	1			T3	1		T5	1		T9	3
valid_sources[0x35]	33064	1			T5	1		T9	2		T97	4
valid_sources[0x36]	32753	1			T9	1		T12	21		T6	21
valid_sources[0x37]	34113	1			T35	2		T69	2		T6	173
valid_sources[0x38]	33343	1			T9	1		T6	63		T254	1
valid_sources[0x39]	34427	1			T5	1		T4	20		T9	1
valid_sources[0x3a]	33340	1			T3	1		T105	1		T6	60
valid_sources[0x3b]	33805	1			T105	1		T6	156		T70	1
valid_sources[0x3c]	34829	1			T5	3		T9	1		T6	126
valid_sources[0x3d]	34987	1			T5	2		T9	1		T35	1
valid_sources[0x3e]	33827	1			T5	3		T6	165		T70	1
valid_sources[0x3f]	34330	1			T112	1		T6	171		T254	1
valid_sources[0x40]	34972	1			T3	1		T5	1		T9	1
valid_sources[0x41]	34420	1			T5	4		T105	1		T69	3
valid_sources[0x42]	33101	1			T3	1		T131	20		T6	68
valid_sources[0x43]	33954	1			T6	205		T70	1		T254	1
valid_sources[0x44]	34400	1			T3	1		T9	2		T105	2
valid_sources[0x45]	33998	1			T5	2		T6	102		T107	1
valid_sources[0x46]	33525	1			T5	1		T104	1		T35	1
valid_sources[0x47]	33592	1			T3	2		T9	2		T112	1
valid_sources[0x48]	33498	1			T28	1		T69	1		T6	208
valid_sources[0x49]	33620	1			T112	1		T6	88		T107	2
valid_sources[0x4a]	33261	1			T5	1		T9	8		T35	2
valid_sources[0x4b]	33046	1			T11	160		T69	2		T6	80
valid_sources[0x4c]	32419	1			T9	2		T28	2		T6	278
valid_sources[0x4d]	33618	1			T5	2		T35	1		T6	172
valid_sources[0x4e]	33610	1			T5	3		T105	1		T28	2
valid_sources[0x4f]	33465	1			T5	3		T112	2		T6	99
valid_sources[0x50]	32266	1			T5	1		T97	2		T6	34
valid_sources[0x51]	34667	1			T69	2		T6	287		T70	1
valid_sources[0x52]	33448	1			T3	2		T5	1		T28	1
valid_sources[0x53]	33348	1			T1	2		T9	1		T6	117
valid_sources[0x54]	34305	1			T5	2		T28	1		T112	1
valid_sources[0x55]	33404	1			T5	1		T9	3		T104	1
valid_sources[0x56]	33567	1			T3	1		T5	1		T112	1
valid_sources[0x57]	32894	1			T5	1		T35	1		T97	9
valid_sources[0x58]	32477	1			T105	1		T28	1		T6	128
valid_sources[0x59]	33575	1			T1	2		T5	1		T28	3
valid_sources[0x5a]	32509	1			T3	2		T9	2		T28	1
valid_sources[0x5b]	34078	1			T5	2		T6	356		T254	2
valid_sources[0x5c]	33386	1			T6	128		T375	2		T13	1204
valid_sources[0x5d]	34484	1			T3	2		T9	1		T6	144
valid_sources[0x5e]	34249	1			T5	1		T9	1		T28	1
valid_sources[0x5f]	34861	1			T9	1		T35	4		T6	122
valid_sources[0x60]	33385	1			T3	2		T69	2		T6	231
valid_sources[0x61]	34321	1			T112	1		T6	121		T107	2
valid_sources[0x62]	33838	1			T69	5		T6	185		T107	1
valid_sources[0x63]	34154	1			T9	3		T69	2		T6	322
valid_sources[0x64]	34726	1			T5	1		T9	5		T28	4
valid_sources[0x65]	33796	1			T28	4		T112	1		T69	1
valid_sources[0x66]	32194	1			T12	18		T6	59		T255	2
valid_sources[0x67]	33221	1			T28	2		T97	14		T6	40
valid_sources[0x68]	33224	1			T5	2		T28	1		T6	58
valid_sources[0x69]	32419	1			T3	1		T5	2		T28	2
valid_sources[0x6a]	33019	1			T3	3		T9	1		T28	1
valid_sources[0x6b]	34072	1			T104	1		T35	1		T6	179
valid_sources[0x6c]	34805	1			T9	1		T69	2		T6	226
valid_sources[0x6d]	34503	1			T3	1		T28	1		T69	1
valid_sources[0x6e]	32916	1			T9	1		T6	91		T70	2
valid_sources[0x6f]	34453	1			T104	1		T69	1		T6	169
valid_sources[0x70]	33360	1			T1	1		T69	2		T6	211
valid_sources[0x71]	32034	1			T5	2		T97	11		T6	314
valid_sources[0x72]	33543	1			T5	1		T105	2		T6	52
valid_sources[0x73]	34058	1			T5	1		T9	2		T6	42
valid_sources[0x74]	32861	1			T5	1		T9	1		T35	1
valid_sources[0x75]	32727	1			T6	102		T13	1218		T99	1
valid_sources[0x76]	33458	1			T6	109		T167	2		T13	1197
valid_sources[0x77]	33277	1			T1	3		T5	1		T28	1
valid_sources[0x78]	34405	1			T5	1		T28	1		T69	1
valid_sources[0x79]	33849	1			T28	1		T6	282		T107	1
valid_sources[0x7a]	33356	1			T9	1		T105	1		T6	135
valid_sources[0x7b]	33498	1			T6	103		T70	1		T375	2
valid_sources[0x7c]	33444	1			T3	2		T5	1		T69	1
valid_sources[0x7d]	34187	1			T5	1		T28	1		T6	273
valid_sources[0x7e]	33416	1			T69	1		T6	87		T254	1
valid_sources[0x7f]	32403	1			T105	1		T6	204		T70	1
valid_sources[0x80]	33790	1			T5	1		T105	3		T97	11

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

2135361

1

T1

10

T3

40

T5

90

values[0x0]

all_enables

biggest_size

3127817

1

T1

6

T3

17

T5

47

values[0x1]

all_enables

biggest_size

3129083

1

T1

4

T3

23

T5

43