Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 6901960 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 6618815 1 T1 2360 T2 143 T3 2642



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 8082525 1 T1 4858 T2 347 T3 5904
values[0x0] 2090373 1 T1 335 T2 81 T3 345
values[0x1] 3347877 1 T1 309 T2 93 T3 361



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 4533641 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 8987134 1 T1 3018 T2 240 T3 3544



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 57046 1 T1 29 T2 9 T3 32
valid_sources[0x01] 48550 1 T1 20 T2 1 T3 27
valid_sources[0x02] 48274 1 T1 8 T2 2 T3 25
valid_sources[0x03] 50475 1 T1 19 T2 2 T3 24
valid_sources[0x04] 47360 1 T1 23 T2 3 T3 20
valid_sources[0x05] 50243 1 T1 23 T3 38 T8 4
valid_sources[0x06] 48538 1 T1 25 T3 16 T8 3
valid_sources[0x07] 49688 1 T1 29 T2 1 T3 30
valid_sources[0x08] 47557 1 T1 11 T3 16 T8 4
valid_sources[0x09] 58006 1 T1 20 T2 2 T3 27
valid_sources[0x0a] 50567 1 T1 18 T2 1 T3 23
valid_sources[0x0b] 49434 1 T1 20 T2 3 T3 26
valid_sources[0x0c] 56041 1 T1 26 T2 4 T3 28
valid_sources[0x0d] 48061 1 T1 19 T2 1 T3 30
valid_sources[0x0e] 50563 1 T1 16 T2 6 T3 20
valid_sources[0x0f] 49573 1 T1 21 T3 25 T8 5
valid_sources[0x10] 63099 1 T1 23 T3 26 T8 2
valid_sources[0x11] 49644 1 T1 12 T2 2 T3 25
valid_sources[0x12] 139210 1 T1 25 T2 1 T3 34
valid_sources[0x13] 54639 1 T1 19 T2 1 T3 31
valid_sources[0x14] 52396 1 T1 19 T2 1 T3 29
valid_sources[0x15] 49703 1 T1 23 T2 1 T3 24
valid_sources[0x16] 47953 1 T1 26 T2 3 T3 21
valid_sources[0x17] 56118 1 T1 34 T2 2 T3 22
valid_sources[0x18] 46377 1 T1 28 T2 3 T3 44
valid_sources[0x19] 50665 1 T1 14 T2 3 T3 23
valid_sources[0x1a] 51194 1 T1 15 T2 5 T3 35
valid_sources[0x1b] 47892 1 T1 28 T2 2 T3 20
valid_sources[0x1c] 61137 1 T1 19 T2 3 T3 21
valid_sources[0x1d] 56369 1 T1 23 T2 3 T3 26
valid_sources[0x1e] 51336 1 T1 24 T2 4 T3 35
valid_sources[0x1f] 49436 1 T1 20 T2 1 T3 17
valid_sources[0x20] 48081 1 T1 25 T2 3 T3 14
valid_sources[0x21] 47000 1 T1 27 T3 34 T8 2
valid_sources[0x22] 47783 1 T1 22 T2 3 T3 32
valid_sources[0x23] 48274 1 T1 14 T2 4 T3 31
valid_sources[0x24] 52964 1 T1 36 T3 20 T8 3
valid_sources[0x25] 57617 1 T1 24 T2 1 T3 24
valid_sources[0x26] 48112 1 T1 21 T2 9 T3 22
valid_sources[0x27] 64800 1 T1 22 T2 3 T3 24
valid_sources[0x28] 47324 1 T1 22 T3 24 T8 1
valid_sources[0x29] 46292 1 T1 20 T3 23 T8 2
valid_sources[0x2a] 48364 1 T1 17 T3 30 T8 2
valid_sources[0x2b] 55724 1 T1 18 T2 11 T3 36
valid_sources[0x2c] 48127 1 T1 15 T3 22 T8 2
valid_sources[0x2d] 47885 1 T1 20 T2 1 T3 16
valid_sources[0x2e] 49146 1 T1 19 T3 31 T8 4
valid_sources[0x2f] 58489 1 T1 24 T2 3 T3 30
valid_sources[0x30] 49440 1 T1 19 T2 1 T3 26
valid_sources[0x31] 48591 1 T1 23 T3 27 T8 2
valid_sources[0x32] 48276 1 T1 26 T2 3 T3 23
valid_sources[0x33] 46763 1 T1 23 T2 5 T3 21
valid_sources[0x34] 53353 1 T1 15 T2 2 T3 31
valid_sources[0x35] 49932 1 T1 24 T2 5 T3 38
valid_sources[0x36] 50870 1 T1 24 T3 23 T5 50
valid_sources[0x37] 51380 1 T1 18 T2 1 T3 31
valid_sources[0x38] 50550 1 T1 23 T2 3 T3 20
valid_sources[0x39] 193314 1 T1 19 T2 1 T3 19
valid_sources[0x3a] 51250 1 T1 17 T2 3 T3 29
valid_sources[0x3b] 63776 1 T1 19 T3 32 T8 5
valid_sources[0x3c] 55040 1 T1 27 T3 25 T8 2
valid_sources[0x3d] 48168 1 T1 12 T2 1 T3 26
valid_sources[0x3e] 46937 1 T1 26 T3 23 T8 4
valid_sources[0x3f] 49812 1 T1 25 T3 34 T8 3
valid_sources[0x40] 52427 1 T1 22 T2 2 T3 41
valid_sources[0x41] 49926 1 T1 14 T2 1 T3 27
valid_sources[0x42] 55334 1 T1 18 T3 31 T8 4
valid_sources[0x43] 47600 1 T1 37 T3 37 T8 3
valid_sources[0x44] 49373 1 T1 32 T2 2 T3 28
valid_sources[0x45] 48705 1 T1 23 T2 1 T3 24
valid_sources[0x46] 51862 1 T1 15 T2 1 T3 36
valid_sources[0x47] 46947 1 T1 15 T2 1 T3 35
valid_sources[0x48] 56237 1 T1 28 T2 3 T3 30
valid_sources[0x49] 46894 1 T1 22 T2 8 T3 15
valid_sources[0x4a] 47717 1 T1 30 T2 4 T3 37
valid_sources[0x4b] 47413 1 T1 17 T2 2 T3 30
valid_sources[0x4c] 46068 1 T1 20 T2 1 T3 32
valid_sources[0x4d] 48977 1 T1 24 T2 4 T3 20
valid_sources[0x4e] 49121 1 T1 25 T2 2 T3 29
valid_sources[0x4f] 47514 1 T1 25 T2 2 T3 23
valid_sources[0x50] 69519 1 T1 22 T2 2 T3 23
valid_sources[0x51] 48100 1 T1 32 T2 6 T3 26
valid_sources[0x52] 45927 1 T1 22 T2 2 T3 23
valid_sources[0x53] 47474 1 T1 30 T3 25 T8 4
valid_sources[0x54] 45629 1 T1 10 T2 2 T3 18
valid_sources[0x55] 51416 1 T1 15 T3 26 T8 1
valid_sources[0x56] 49565 1 T1 25 T2 1 T3 22
valid_sources[0x57] 46782 1 T1 21 T3 15 T8 1
valid_sources[0x58] 45914 1 T1 18 T2 2 T3 32
valid_sources[0x59] 49277 1 T1 26 T2 3 T3 20
valid_sources[0x5a] 58248 1 T1 19 T2 1 T3 24
valid_sources[0x5b] 57067 1 T1 17 T2 3 T3 10
valid_sources[0x5c] 48324 1 T1 24 T2 1 T3 29
valid_sources[0x5d] 45942 1 T1 21 T3 24 T8 3
valid_sources[0x5e] 46708 1 T1 18 T3 21 T8 2
valid_sources[0x5f] 45930 1 T1 26 T2 1 T3 13
valid_sources[0x60] 49044 1 T1 20 T2 1 T3 20
valid_sources[0x61] 48691 1 T1 24 T2 4 T3 35
valid_sources[0x62] 47605 1 T1 22 T2 5 T3 30
valid_sources[0x63] 56630 1 T1 19 T2 3 T3 28
valid_sources[0x64] 49423 1 T1 21 T3 21 T8 4
valid_sources[0x65] 47471 1 T1 11 T2 7 T3 23
valid_sources[0x66] 47226 1 T1 15 T2 2 T3 26
valid_sources[0x67] 46105 1 T1 32 T3 24 T5 48
valid_sources[0x68] 64946 1 T1 20 T2 1 T3 17
valid_sources[0x69] 47263 1 T1 15 T3 26 T5 58
valid_sources[0x6a] 46126 1 T1 28 T2 1 T3 26
valid_sources[0x6b] 62075 1 T1 26 T2 1 T3 28
valid_sources[0x6c] 55117 1 T1 11 T2 1 T3 29
valid_sources[0x6d] 48785 1 T1 21 T2 2 T3 29
valid_sources[0x6e] 48809 1 T1 24 T2 1 T3 35
valid_sources[0x6f] 51794 1 T1 22 T2 4 T3 23
valid_sources[0x70] 46018 1 T1 23 T2 2 T3 40
valid_sources[0x71] 55277 1 T1 27 T2 4 T3 20
valid_sources[0x72] 49227 1 T1 36 T2 3 T3 26
valid_sources[0x73] 44887 1 T1 18 T2 1 T3 31
valid_sources[0x74] 46718 1 T1 25 T2 2 T3 38
valid_sources[0x75] 49011 1 T1 16 T2 1 T3 22
valid_sources[0x76] 47641 1 T1 17 T2 2 T3 18
valid_sources[0x77] 57214 1 T1 12 T2 1 T3 25
valid_sources[0x78] 50622 1 T1 16 T3 35 T8 3
valid_sources[0x79] 50112 1 T1 24 T2 1 T3 24
valid_sources[0x7a] 133694 1 T1 21 T2 1 T3 22
valid_sources[0x7b] 47807 1 T1 23 T2 4 T3 27
valid_sources[0x7c] 45003 1 T1 22 T2 1 T3 15
valid_sources[0x7d] 47791 1 T1 34 T2 5 T3 29
valid_sources[0x7e] 62750 1 T1 20 T2 8 T3 25
valid_sources[0x7f] 46370 1 T1 26 T3 35 T8 2
valid_sources[0x80] 65027 1 T1 25 T2 1 T3 27



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 3272909 1 T1 2085 T2 66 T3 2382
values[0x0] all_enables biggest_size 1711769 1 T1 166 T2 44 T3 155
values[0x1] all_enables biggest_size 1634137 1 T1 109 T2 33 T3 105


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 217084 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 7874090 1 T1 100 T3 160 T8 100



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 2017903 1 T1 50 T3 80 T8 50
values[0x0] 2949823 1 T1 18 T3 36 T8 22
values[0x1] 3123448 1 T1 32 T3 44 T8 28



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 78937 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 8012237 1 T1 100 T3 160 T8 100



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 30871 1 T3 1 T29 1 T90 3
valid_sources[0x01] 30910 1 T6 689 T136 3 T67 5
valid_sources[0x02] 32237 1 T12 2 T6 462 T136 3
valid_sources[0x03] 31136 1 T90 5 T6 721 T136 2
valid_sources[0x04] 31487 1 T8 9 T6 413 T136 1
valid_sources[0x05] 31856 1 T3 2 T29 1 T90 1
valid_sources[0x06] 32489 1 T3 3 T90 1 T6 576
valid_sources[0x07] 32404 1 T1 1 T3 6 T29 1
valid_sources[0x08] 31080 1 T1 1 T6 357 T13 356
valid_sources[0x09] 31830 1 T90 1 T6 514 T13 176
valid_sources[0x0a] 31811 1 T1 1 T3 1 T6 779
valid_sources[0x0b] 32398 1 T6 482 T136 2 T67 1
valid_sources[0x0c] 31169 1 T3 2 T6 467 T92 2
valid_sources[0x0d] 31045 1 T3 1 T29 1 T6 829
valid_sources[0x0e] 30287 1 T3 4 T29 1 T6 765
valid_sources[0x0f] 28960 1 T90 1 T6 612 T67 1
valid_sources[0x10] 31164 1 T29 1 T90 1 T6 236
valid_sources[0x11] 31504 1 T3 1 T29 1 T6 408
valid_sources[0x12] 30033 1 T4 3 T90 2 T6 653
valid_sources[0x13] 31916 1 T3 1 T29 3 T90 1
valid_sources[0x14] 32832 1 T3 1 T29 2 T6 345
valid_sources[0x15] 32172 1 T3 1 T29 2 T6 625
valid_sources[0x16] 32952 1 T3 1 T6 485 T98 3
valid_sources[0x17] 29485 1 T6 280 T101 1 T13 231
valid_sources[0x18] 32425 1 T29 2 T90 1 T6 433
valid_sources[0x19] 30204 1 T29 2 T6 349 T169 1
valid_sources[0x1a] 32626 1 T1 3 T6 267 T92 4
valid_sources[0x1b] 30498 1 T4 4 T6 692 T101 1
valid_sources[0x1c] 30826 1 T29 2 T6 635 T92 1
valid_sources[0x1d] 31884 1 T3 1 T90 1 T6 601
valid_sources[0x1e] 33400 1 T29 1 T6 643 T169 1
valid_sources[0x1f] 32984 1 T90 1 T6 601 T173 1
valid_sources[0x20] 31892 1 T3 1 T6 611 T13 308
valid_sources[0x21] 30381 1 T3 3 T4 1 T29 1
valid_sources[0x22] 30143 1 T29 1 T6 508 T92 2
valid_sources[0x23] 31172 1 T29 1 T6 510 T67 1
valid_sources[0x24] 32238 1 T29 1 T6 612 T91 3
valid_sources[0x25] 31439 1 T1 6 T3 1 T90 2
valid_sources[0x26] 31716 1 T29 3 T6 640 T136 1
valid_sources[0x27] 30865 1 T3 1 T6 697 T67 2
valid_sources[0x28] 31794 1 T6 824 T169 1 T92 2
valid_sources[0x29] 31353 1 T90 1 T6 239 T13 276
valid_sources[0x2a] 31042 1 T29 1 T6 410 T92 1
valid_sources[0x2b] 30364 1 T3 3 T5 20 T29 1
valid_sources[0x2c] 32791 1 T90 4 T6 1021 T173 1
valid_sources[0x2d] 33784 1 T3 1 T29 1 T90 1
valid_sources[0x2e] 29464 1 T1 3 T3 1 T6 382
valid_sources[0x2f] 33014 1 T1 2 T90 1 T6 565
valid_sources[0x30] 31807 1 T3 1 T29 1 T90 2
valid_sources[0x31] 33134 1 T1 1 T3 3 T6 426
valid_sources[0x32] 30486 1 T6 471 T136 1 T67 1
valid_sources[0x33] 31568 1 T29 1 T6 643 T136 1
valid_sources[0x34] 30657 1 T1 3 T90 1 T6 525
valid_sources[0x35] 30808 1 T90 3 T6 390 T136 1
valid_sources[0x36] 31044 1 T3 1 T29 2 T6 811
valid_sources[0x37] 29765 1 T29 1 T90 3 T6 287
valid_sources[0x38] 31653 1 T3 1 T12 1 T6 486
valid_sources[0x39] 31540 1 T90 4 T6 457 T91 1
valid_sources[0x3a] 32022 1 T3 3 T29 3 T6 1010
valid_sources[0x3b] 33440 1 T6 832 T136 1 T92 1
valid_sources[0x3c] 34184 1 T6 609 T67 1 T98 4
valid_sources[0x3d] 33873 1 T6 536 T101 1 T136 2
valid_sources[0x3e] 30785 1 T1 2 T29 1 T6 615
valid_sources[0x3f] 30931 1 T1 2 T3 1 T29 6
valid_sources[0x40] 31732 1 T29 1 T6 626 T136 4
valid_sources[0x41] 30983 1 T6 476 T67 1 T7 1260
valid_sources[0x42] 31554 1 T6 514 T67 2 T169 1
valid_sources[0x43] 30443 1 T6 247 T136 1 T92 2
valid_sources[0x44] 30087 1 T4 2 T6 478 T13 127
valid_sources[0x45] 31528 1 T1 7 T6 698 T136 1
valid_sources[0x46] 31424 1 T6 241 T178 1 T13 219
valid_sources[0x47] 29262 1 T9 100 T90 1 T6 606
valid_sources[0x48] 31878 1 T3 2 T29 1 T6 637
valid_sources[0x49] 32569 1 T4 2 T12 3 T6 483
valid_sources[0x4a] 30893 1 T6 923 T67 2 T98 4
valid_sources[0x4b] 32279 1 T6 393 T101 1 T92 2
valid_sources[0x4c] 32449 1 T3 1 T8 9 T6 578
valid_sources[0x4d] 31908 1 T6 633 T136 1 T13 286
valid_sources[0x4e] 33612 1 T1 1 T90 1 T6 530
valid_sources[0x4f] 31559 1 T29 1 T90 1 T6 620
valid_sources[0x50] 29599 1 T29 1 T6 735 T136 2
valid_sources[0x51] 30593 1 T3 2 T6 559 T67 1
valid_sources[0x52] 32674 1 T29 1 T6 564 T136 1
valid_sources[0x53] 33860 1 T29 1 T6 888 T13 303
valid_sources[0x54] 31136 1 T29 1 T90 1 T6 394
valid_sources[0x55] 30422 1 T3 2 T4 4 T6 752
valid_sources[0x56] 30717 1 T1 1 T3 1 T29 1
valid_sources[0x57] 31649 1 T1 3 T6 676 T92 1
valid_sources[0x58] 30209 1 T12 1 T6 287 T67 1
valid_sources[0x59] 31896 1 T29 1 T6 427 T136 1
valid_sources[0x5a] 31232 1 T3 2 T6 678 T67 3
valid_sources[0x5b] 31900 1 T3 1 T29 1 T6 1010
valid_sources[0x5c] 32849 1 T3 1 T29 1 T6 695
valid_sources[0x5d] 29189 1 T29 1 T6 741 T98 1
valid_sources[0x5e] 31034 1 T1 4 T3 1 T6 532
valid_sources[0x5f] 32606 1 T1 4 T4 2 T6 709
valid_sources[0x60] 31519 1 T3 2 T6 695 T173 1
valid_sources[0x61] 33710 1 T6 643 T136 1 T98 1
valid_sources[0x62] 31416 1 T8 2 T29 1 T6 696
valid_sources[0x63] 30124 1 T3 1 T4 1 T6 350
valid_sources[0x64] 30394 1 T29 2 T6 389 T67 1
valid_sources[0x65] 31574 1 T6 625 T13 223 T95 1
valid_sources[0x66] 31635 1 T29 1 T6 364 T67 2
valid_sources[0x67] 31344 1 T12 2 T6 557 T13 323
valid_sources[0x68] 31695 1 T3 4 T6 510 T136 1
valid_sources[0x69] 32530 1 T1 3 T3 2 T12 1
valid_sources[0x6a] 30771 1 T1 1 T29 1 T6 321
valid_sources[0x6b] 29162 1 T29 1 T6 627 T173 1
valid_sources[0x6c] 30704 1 T29 1 T6 602 T67 2
valid_sources[0x6d] 31672 1 T6 376 T136 1 T13 492
valid_sources[0x6e] 32403 1 T3 2 T29 1 T6 295
valid_sources[0x6f] 31176 1 T90 1 T6 719 T91 1
valid_sources[0x70] 31594 1 T29 1 T6 927 T173 1
valid_sources[0x71] 31910 1 T6 522 T101 1 T98 1
valid_sources[0x72] 32569 1 T3 2 T90 1 T6 530
valid_sources[0x73] 31111 1 T4 2 T6 512 T92 1
valid_sources[0x74] 33155 1 T6 544 T136 1 T102 20
valid_sources[0x75] 31110 1 T90 1 T6 927 T98 1
valid_sources[0x76] 32734 1 T6 747 T136 1 T67 2
valid_sources[0x77] 30442 1 T3 1 T90 1 T6 470
valid_sources[0x78] 31457 1 T1 1 T6 761 T92 1
valid_sources[0x79] 30102 1 T1 1 T3 1 T6 335
valid_sources[0x7a] 30235 1 T3 1 T29 1 T6 412
valid_sources[0x7b] 32284 1 T3 2 T90 1 T6 401
valid_sources[0x7c] 32924 1 T3 1 T29 2 T6 895
valid_sources[0x7d] 32557 1 T6 349 T101 1 T136 1
valid_sources[0x7e] 32690 1 T1 1 T29 2 T90 3
valid_sources[0x7f] 31170 1 T3 1 T29 1 T6 509
valid_sources[0x80] 32102 1 T3 1 T6 547 T136 2



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 2005046 1 T1 50 T3 80 T8 50
values[0x0] all_enables biggest_size 2934905 1 T1 18 T3 36 T8 22
values[0x1] all_enables biggest_size 2934139 1 T1 32 T3 44 T8 28

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