Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 7079252 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 7395295 1 T1 525 T2 4653 T3 592



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 8080519 1 T1 2253 T2 8305 T3 1335
values[0x0] 2422821 1 T1 98 T2 718 T3 96
values[0x1] 3971207 1 T1 95 T2 744 T3 80



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 4531204 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 9943343 1 T1 1126 T2 5730 T3 816



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 49533 1 T2 30 T8 3 T5 60
valid_sources[0x01] 52110 1 T2 30 T5 35 T9 130
valid_sources[0x02] 87723 1 T2 17 T8 1 T5 57
valid_sources[0x03] 62277 1 T2 38 T5 36 T9 90
valid_sources[0x04] 52881 1 T2 34 T8 4 T5 44
valid_sources[0x05] 118468 1 T2 28 T5 50 T9 77
valid_sources[0x06] 54273 1 T2 38 T5 40 T9 102
valid_sources[0x07] 57298 1 T2 32 T8 2 T5 49
valid_sources[0x08] 48343 1 T2 31 T8 9 T5 43
valid_sources[0x09] 52358 1 T2 24 T5 42 T9 158
valid_sources[0x0a] 49011 1 T2 30 T8 8 T5 40
valid_sources[0x0b] 51855 1 T2 41 T5 53 T9 192
valid_sources[0x0c] 54056 1 T2 45 T8 2 T5 54
valid_sources[0x0d] 51626 1 T2 64 T5 48 T9 128
valid_sources[0x0e] 51875 1 T2 49 T5 57 T9 97
valid_sources[0x0f] 66617 1 T2 67 T8 1 T5 40
valid_sources[0x10] 51818 1 T2 68 T8 5 T5 51
valid_sources[0x11] 50321 1 T2 58 T8 2 T5 50
valid_sources[0x12] 48102 1 T2 45 T8 5 T5 48
valid_sources[0x13] 48911 1 T2 30 T5 60 T9 127
valid_sources[0x14] 50958 1 T2 45 T8 8 T5 50
valid_sources[0x15] 50630 1 T2 34 T8 2 T5 45
valid_sources[0x16] 57365 1 T2 72 T5 43 T9 114
valid_sources[0x17] 51217 1 T2 24 T8 2 T5 63
valid_sources[0x18] 53743 1 T2 67 T8 8 T5 44
valid_sources[0x19] 80027 1 T2 64 T8 2 T5 38
valid_sources[0x1a] 70258 1 T2 21 T5 42 T9 113
valid_sources[0x1b] 49695 1 T2 52 T8 9 T5 39
valid_sources[0x1c] 56967 1 T2 47 T5 51 T9 117
valid_sources[0x1d] 56256 1 T2 27 T8 1 T5 54
valid_sources[0x1e] 53124 1 T2 50 T8 2 T5 46
valid_sources[0x1f] 57031 1 T2 50 T8 1 T5 62
valid_sources[0x20] 60022 1 T2 29 T8 4 T5 43
valid_sources[0x21] 58141 1 T2 33 T8 1 T5 58
valid_sources[0x22] 55747 1 T2 46 T8 17 T5 50
valid_sources[0x23] 52464 1 T2 43 T8 3 T5 40
valid_sources[0x24] 51091 1 T2 53 T8 3 T5 43
valid_sources[0x25] 49241 1 T2 44 T8 1 T5 40
valid_sources[0x26] 48591 1 T2 21 T8 2 T5 51
valid_sources[0x27] 50300 1 T2 36 T8 13 T5 40
valid_sources[0x28] 50913 1 T2 56 T8 2 T5 53
valid_sources[0x29] 49734 1 T2 50 T8 2 T5 67
valid_sources[0x2a] 53214 1 T2 34 T5 45 T9 182
valid_sources[0x2b] 58420 1 T2 32 T8 2 T5 52
valid_sources[0x2c] 56112 1 T2 44 T8 4 T5 39
valid_sources[0x2d] 48276 1 T2 28 T5 55 T9 119
valid_sources[0x2e] 51075 1 T2 28 T8 2 T5 35
valid_sources[0x2f] 52332 1 T2 43 T8 1 T5 54
valid_sources[0x30] 53209 1 T2 21 T5 34 T9 102
valid_sources[0x31] 74080 1 T2 55 T8 11 T5 26
valid_sources[0x32] 60381 1 T2 44 T8 5 T5 48
valid_sources[0x33] 70657 1 T2 31 T8 1 T5 64
valid_sources[0x34] 53966 1 T2 43 T5 49 T9 127
valid_sources[0x35] 61158 1 T2 29 T5 46 T9 114
valid_sources[0x36] 50173 1 T2 34 T8 1 T5 60
valid_sources[0x37] 49813 1 T2 44 T8 15 T5 65
valid_sources[0x38] 58215 1 T2 33 T5 63 T9 150
valid_sources[0x39] 48513 1 T2 37 T8 1 T5 44
valid_sources[0x3a] 67757 1 T2 52 T8 1 T5 45
valid_sources[0x3b] 50889 1 T2 88 T8 3 T5 47
valid_sources[0x3c] 62047 1 T2 53 T8 14 T5 35
valid_sources[0x3d] 121527 1 T2 25 T8 11 T5 38
valid_sources[0x3e] 51763 1 T2 37 T8 4 T5 50
valid_sources[0x3f] 52144 1 T2 49 T8 1 T5 49
valid_sources[0x40] 48842 1 T2 19 T5 43 T9 136
valid_sources[0x41] 100901 1 T2 24 T5 57 T9 134
valid_sources[0x42] 52408 1 T2 35 T5 59 T9 99
valid_sources[0x43] 68914 1 T2 31 T8 1 T5 26
valid_sources[0x44] 59817 1 T2 34 T5 42 T9 145
valid_sources[0x45] 50550 1 T2 22 T8 7 T5 36
valid_sources[0x46] 51946 1 T2 61 T8 7 T5 55
valid_sources[0x47] 56345 1 T2 55 T8 2 T5 54
valid_sources[0x48] 53480 1 T2 53 T8 4 T5 74
valid_sources[0x49] 67534 1 T2 37 T5 47 T9 144
valid_sources[0x4a] 77137 1 T2 36 T8 13 T5 39
valid_sources[0x4b] 48998 1 T2 44 T8 2 T5 55
valid_sources[0x4c] 60490 1 T2 32 T5 64 T9 100
valid_sources[0x4d] 54594 1 T2 40 T5 29 T9 104
valid_sources[0x4e] 51805 1 T2 31 T8 1 T5 60
valid_sources[0x4f] 50883 1 T2 44 T5 40 T9 130
valid_sources[0x50] 56852 1 T2 27 T5 44 T9 142
valid_sources[0x51] 57385 1 T2 41 T8 18 T5 60
valid_sources[0x52] 63456 1 T2 51 T5 43 T9 64
valid_sources[0x53] 49593 1 T2 27 T8 7 T5 44
valid_sources[0x54] 47837 1 T2 38 T8 8 T5 52
valid_sources[0x55] 61400 1 T2 37 T8 1 T5 49
valid_sources[0x56] 48923 1 T2 35 T5 37 T9 82
valid_sources[0x57] 53196 1 T2 29 T5 51 T9 64
valid_sources[0x58] 68395 1 T2 43 T8 4 T5 49
valid_sources[0x59] 51797 1 T2 15 T8 4 T5 38
valid_sources[0x5a] 47821 1 T2 32 T8 1 T5 48
valid_sources[0x5b] 48257 1 T2 32 T8 3 T5 48
valid_sources[0x5c] 49079 1 T2 51 T8 1 T5 42
valid_sources[0x5d] 48671 1 T2 33 T8 4 T5 36
valid_sources[0x5e] 51392 1 T2 41 T8 20 T5 57
valid_sources[0x5f] 50430 1 T2 27 T8 3 T5 57
valid_sources[0x60] 53068 1 T2 57 T8 5 T5 24
valid_sources[0x61] 48935 1 T2 38 T5 52 T9 149
valid_sources[0x62] 48937 1 T2 33 T8 10 T5 40
valid_sources[0x63] 61893 1 T2 28 T5 58 T9 197
valid_sources[0x64] 54756 1 T2 37 T5 64 T9 90
valid_sources[0x65] 48777 1 T2 39 T8 3 T5 76
valid_sources[0x66] 52120 1 T2 31 T8 5 T5 58
valid_sources[0x67] 54660 1 T2 39 T8 1 T5 59
valid_sources[0x68] 53630 1 T2 32 T8 1 T5 48
valid_sources[0x69] 52674 1 T2 18 T5 46 T9 111
valid_sources[0x6a] 58365 1 T2 45 T8 11 T5 59
valid_sources[0x6b] 53876 1 T2 25 T8 2 T5 33
valid_sources[0x6c] 50617 1 T2 23 T5 64 T9 114
valid_sources[0x6d] 55202 1 T2 51 T8 9 T5 54
valid_sources[0x6e] 57223 1 T2 57 T8 1 T5 43
valid_sources[0x6f] 50482 1 T2 36 T5 48 T9 115
valid_sources[0x70] 60896 1 T2 36 T8 4 T5 18
valid_sources[0x71] 56659 1 T2 56 T5 51 T9 124
valid_sources[0x72] 56966 1 T2 46 T5 52 T9 109
valid_sources[0x73] 49579 1 T2 49 T5 40 T9 128
valid_sources[0x74] 62607 1 T2 52 T8 9 T5 23
valid_sources[0x75] 52321 1 T2 47 T5 69 T9 116
valid_sources[0x76] 75290 1 T2 20 T8 1 T5 35
valid_sources[0x77] 53502 1 T2 31 T5 62 T9 104
valid_sources[0x78] 53794 1 T2 33 T5 44 T9 182
valid_sources[0x79] 51693 1 T2 34 T8 6 T5 26
valid_sources[0x7a] 51504 1 T2 52 T8 6 T5 59
valid_sources[0x7b] 51799 1 T2 28 T8 7 T5 44
valid_sources[0x7c] 50279 1 T2 58 T8 10 T5 38
valid_sources[0x7d] 53809 1 T2 48 T8 4 T5 50
valid_sources[0x7e] 53644 1 T2 32 T5 31 T9 139
valid_sources[0x7f] 58989 1 T2 27 T5 53 T9 112
valid_sources[0x80] 51857 1 T2 22 T5 46 T9 101



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 3412344 1 T1 446 T2 4001 T3 512
values[0x0] all_enables biggest_size 2029956 1 T1 46 T2 363 T3 44
values[0x1] all_enables biggest_size 1952995 1 T1 33 T2 289 T3 36


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 264645 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 9658534 1 T1 20 T2 20 T3 40



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 2464385 1 T1 10 T2 10 T3 20
values[0x0] 3620711 1 T1 5 T2 4 T3 13
values[0x1] 3838083 1 T1 5 T2 6 T3 7



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 95694 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 9827485 1 T1 20 T2 20 T3 40



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 39950 1 T9 3 T6 106 T7 122
valid_sources[0x01] 38514 1 T9 2 T6 114 T79 3
valid_sources[0x02] 37396 1 T9 1 T6 124 T7 105
valid_sources[0x03] 37291 1 T1 1 T5 1 T9 2
valid_sources[0x04] 39710 1 T5 2 T6 138 T79 1
valid_sources[0x05] 39452 1 T9 4 T6 137 T79 4
valid_sources[0x06] 39365 1 T5 1 T9 2 T6 149
valid_sources[0x07] 39625 1 T1 1 T3 2 T5 1
valid_sources[0x08] 37708 1 T9 5 T6 145 T7 161
valid_sources[0x09] 39405 1 T5 2 T9 4 T6 148
valid_sources[0x0a] 40007 1 T5 1 T9 4 T6 124
valid_sources[0x0b] 40277 1 T5 1 T9 3 T6 98
valid_sources[0x0c] 38164 1 T5 1 T9 6 T6 76
valid_sources[0x0d] 37147 1 T9 3 T10 2 T6 104
valid_sources[0x0e] 37737 1 T9 3 T10 3 T6 132
valid_sources[0x0f] 37348 1 T9 4 T6 126 T79 3
valid_sources[0x10] 38796 1 T5 1 T9 3 T6 137
valid_sources[0x11] 39618 1 T5 1 T9 5 T6 89
valid_sources[0x12] 38872 1 T5 2 T9 5 T6 119
valid_sources[0x13] 35822 1 T9 3 T6 125 T79 2
valid_sources[0x14] 39036 1 T5 2 T9 8 T6 147
valid_sources[0x15] 38576 1 T5 1 T9 5 T6 102
valid_sources[0x16] 40729 1 T4 4 T5 1 T9 2
valid_sources[0x17] 38531 1 T4 1 T9 3 T6 119
valid_sources[0x18] 39169 1 T9 5 T6 90 T7 186
valid_sources[0x19] 36323 1 T1 1 T9 7 T6 96
valid_sources[0x1a] 38346 1 T9 3 T6 110 T79 1
valid_sources[0x1b] 38390 1 T5 1 T9 9 T6 103
valid_sources[0x1c] 39069 1 T3 1 T9 5 T6 113
valid_sources[0x1d] 38326 1 T5 1 T9 4 T6 148
valid_sources[0x1e] 38270 1 T9 4 T6 113 T7 171
valid_sources[0x1f] 39137 1 T9 4 T6 83 T79 4
valid_sources[0x20] 40532 1 T3 2 T5 1 T9 4
valid_sources[0x21] 40530 1 T5 2 T9 7 T6 112
valid_sources[0x22] 38455 1 T9 3 T6 105 T7 158
valid_sources[0x23] 38552 1 T9 6 T6 114 T7 156
valid_sources[0x24] 38432 1 T5 3 T9 2 T10 3
valid_sources[0x25] 39306 1 T5 1 T9 2 T6 133
valid_sources[0x26] 39327 1 T4 4 T5 1 T9 3
valid_sources[0x27] 38935 1 T3 1 T9 3 T6 128
valid_sources[0x28] 38284 1 T5 1 T9 7 T6 179
valid_sources[0x29] 40664 1 T9 5 T6 121 T79 1
valid_sources[0x2a] 39232 1 T4 3 T5 1 T9 3
valid_sources[0x2b] 38922 1 T9 1 T6 156 T79 1
valid_sources[0x2c] 38361 1 T5 1 T9 2 T6 101
valid_sources[0x2d] 38534 1 T9 2 T6 117 T7 107
valid_sources[0x2e] 39090 1 T9 3 T6 72 T79 4
valid_sources[0x2f] 37649 1 T5 1 T9 2 T6 93
valid_sources[0x30] 38639 1 T9 6 T6 139 T79 7
valid_sources[0x31] 38388 1 T5 1 T9 4 T6 128
valid_sources[0x32] 39552 1 T5 1 T9 3 T6 114
valid_sources[0x33] 38324 1 T5 1 T9 3 T6 114
valid_sources[0x34] 38786 1 T9 3 T6 137 T7 185
valid_sources[0x35] 37301 1 T9 1 T6 128 T79 1
valid_sources[0x36] 40682 1 T9 3 T6 171 T7 134
valid_sources[0x37] 38705 1 T5 1 T9 2 T6 109
valid_sources[0x38] 37976 1 T9 4 T6 138 T79 2
valid_sources[0x39] 41924 1 T9 5 T6 104 T7 138
valid_sources[0x3a] 37045 1 T5 1 T9 1 T6 122
valid_sources[0x3b] 39150 1 T6 114 T7 247 T12 1314
valid_sources[0x3c] 40294 1 T5 2 T9 5 T10 2
valid_sources[0x3d] 38741 1 T9 6 T6 119 T7 160
valid_sources[0x3e] 39408 1 T5 1 T9 2 T6 123
valid_sources[0x3f] 42809 1 T5 1 T9 2 T6 112
valid_sources[0x40] 39366 1 T5 1 T9 2 T6 134
valid_sources[0x41] 39212 1 T5 2 T9 2 T6 118
valid_sources[0x42] 38293 1 T9 3 T6 118 T7 173
valid_sources[0x43] 40428 1 T5 1 T9 4 T6 130
valid_sources[0x44] 37861 1 T5 1 T9 5 T6 135
valid_sources[0x45] 38618 1 T5 1 T9 4 T6 113
valid_sources[0x46] 40917 1 T5 1 T9 2 T6 144
valid_sources[0x47] 41005 1 T9 5 T6 94 T7 143
valid_sources[0x48] 36145 1 T2 9 T9 6 T6 104
valid_sources[0x49] 39576 1 T5 1 T9 5 T6 96
valid_sources[0x4a] 39726 1 T5 1 T9 5 T6 93
valid_sources[0x4b] 39609 1 T5 2 T9 2 T6 140
valid_sources[0x4c] 38539 1 T9 1 T6 142 T7 114
valid_sources[0x4d] 38771 1 T5 1 T9 1 T6 93
valid_sources[0x4e] 38247 1 T5 3 T6 93 T7 187
valid_sources[0x4f] 38424 1 T3 2 T5 1 T9 1
valid_sources[0x50] 39173 1 T5 3 T9 3 T6 134
valid_sources[0x51] 37502 1 T5 1 T9 3 T10 5
valid_sources[0x52] 38952 1 T5 2 T9 2 T6 125
valid_sources[0x53] 40079 1 T5 1 T9 4 T6 110
valid_sources[0x54] 39066 1 T1 1 T9 5 T10 2
valid_sources[0x55] 37489 1 T5 4 T9 3 T6 103
valid_sources[0x56] 39404 1 T5 1 T9 2 T10 3
valid_sources[0x57] 37014 1 T9 7 T6 99 T7 191
valid_sources[0x58] 38708 1 T5 2 T9 1 T6 139
valid_sources[0x59] 37318 1 T5 1 T9 4 T6 151
valid_sources[0x5a] 39312 1 T9 5 T6 107 T79 2
valid_sources[0x5b] 39225 1 T9 3 T6 157 T79 2
valid_sources[0x5c] 38921 1 T5 1 T9 3 T6 121
valid_sources[0x5d] 38173 1 T9 2 T10 7 T6 136
valid_sources[0x5e] 38207 1 T9 2 T6 142 T7 215
valid_sources[0x5f] 39272 1 T5 1 T9 7 T6 89
valid_sources[0x60] 39812 1 T9 1 T6 168 T7 148
valid_sources[0x61] 40260 1 T9 3 T10 1 T6 122
valid_sources[0x62] 38542 1 T9 8 T10 1 T6 109
valid_sources[0x63] 37277 1 T9 7 T6 139 T7 180
valid_sources[0x64] 36588 1 T5 1 T9 5 T10 3
valid_sources[0x65] 39107 1 T9 1 T6 120 T79 1
valid_sources[0x66] 38862 1 T5 2 T9 4 T6 133
valid_sources[0x67] 38887 1 T9 3 T6 109 T7 239
valid_sources[0x68] 38981 1 T9 3 T6 92 T7 160
valid_sources[0x69] 37436 1 T9 2 T6 140 T79 2
valid_sources[0x6a] 38511 1 T5 1 T9 1 T6 108
valid_sources[0x6b] 38970 1 T9 7 T10 1 T6 106
valid_sources[0x6c] 39144 1 T5 1 T9 1 T6 131
valid_sources[0x6d] 40639 1 T5 1 T9 1 T6 121
valid_sources[0x6e] 39174 1 T5 1 T9 5 T6 121
valid_sources[0x6f] 38463 1 T5 1 T9 5 T6 124
valid_sources[0x70] 40063 1 T1 2 T9 3 T6 123
valid_sources[0x71] 37828 1 T5 1 T9 2 T6 107
valid_sources[0x72] 38982 1 T9 4 T6 101 T7 169
valid_sources[0x73] 38082 1 T1 1 T5 1 T9 3
valid_sources[0x74] 40161 1 T9 2 T6 143 T7 145
valid_sources[0x75] 38165 1 T5 2 T9 4 T6 110
valid_sources[0x76] 37781 1 T5 1 T9 4 T6 126
valid_sources[0x77] 36727 1 T5 1 T9 4 T6 94
valid_sources[0x78] 38277 1 T3 1 T9 2 T6 87
valid_sources[0x79] 39255 1 T9 6 T10 2 T6 134
valid_sources[0x7a] 40890 1 T9 1 T6 108 T7 175
valid_sources[0x7b] 37675 1 T9 3 T6 114 T7 100
valid_sources[0x7c] 37684 1 T9 2 T6 133 T79 1
valid_sources[0x7d] 38394 1 T5 2 T9 6 T6 120
valid_sources[0x7e] 37392 1 T9 2 T10 7 T6 126
valid_sources[0x7f] 38755 1 T9 3 T10 1 T6 112
valid_sources[0x80] 40875 1 T9 2 T6 102 T7 185



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 2449728 1 T1 10 T2 10 T3 20
values[0x0] all_enables biggest_size 3602627 1 T1 5 T2 4 T3 13
values[0x1] all_enables biggest_size 3606179 1 T1 5 T2 6 T3 7

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%