Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	7313392	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

7524006

1

T1

234

T2

1716

T3

1452

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	8414726	1			T1	580		T2	3056		T3	6833
values[0x0]	2434916	1			T1	138		T2	304		T3	396
values[0x1]	3987756	1			T1	156		T2	294		T3	405

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	4703012	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

10134386

1

T1

410

T2

2113

T3

3305

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	67842	1			T2	42		T10	1		T5	2
valid_sources[0x01]	54534	1			T2	20		T6	22		T12	2
valid_sources[0x02]	56862	1			T10	11		T6	16		T12	5
valid_sources[0x03]	55609	1			T2	11		T6	12		T46	2
valid_sources[0x04]	51989	1			T2	18		T6	19		T12	1
valid_sources[0x05]	56180	1			T2	14		T10	19		T6	19
valid_sources[0x06]	53593	1			T2	6		T6	20		T12	3
valid_sources[0x07]	60634	1			T2	29		T6	21		T12	2
valid_sources[0x08]	81633	1			T2	2		T6	13		T13	1
valid_sources[0x09]	61021	1			T2	7		T6	22		T46	4
valid_sources[0x0a]	55831	1			T2	11		T10	3		T6	20
valid_sources[0x0b]	51008	1			T2	13		T5	6		T6	12
valid_sources[0x0c]	60578	1			T2	4		T6	16		T12	4
valid_sources[0x0d]	62977	1			T2	4		T6	22		T12	2
valid_sources[0x0e]	53065	1			T2	2		T10	10		T6	26
valid_sources[0x0f]	55829	1			T2	26		T6	18		T13	5
valid_sources[0x10]	58553	1			T2	20		T5	2		T6	15
valid_sources[0x11]	78476	1			T2	17		T6	25		T13	6
valid_sources[0x12]	55298	1			T2	7		T10	7		T6	27
valid_sources[0x13]	50667	1			T2	15		T6	16		T12	4
valid_sources[0x14]	52856	1			T2	17		T6	25		T13	19
valid_sources[0x15]	51619	1			T2	15		T10	22		T6	25
valid_sources[0x16]	114647	1			T2	5		T10	20		T6	17
valid_sources[0x17]	54536	1			T2	14		T6	17		T46	2
valid_sources[0x18]	57923	1			T2	4		T5	1		T6	18
valid_sources[0x19]	55276	1			T2	10		T10	1		T6	19
valid_sources[0x1a]	50035	1			T2	7		T10	16		T6	19
valid_sources[0x1b]	61894	1			T2	10		T6	13		T12	1
valid_sources[0x1c]	51510	1			T2	12		T10	6		T6	13
valid_sources[0x1d]	51511	1			T2	3		T6	30		T12	4
valid_sources[0x1e]	49520	1			T2	18		T6	11		T12	2
valid_sources[0x1f]	60954	1			T2	15		T6	18		T13	1
valid_sources[0x20]	56296	1			T2	11		T6	17		T12	1
valid_sources[0x21]	50303	1			T2	16		T10	26		T6	27
valid_sources[0x22]	49110	1			T2	19		T10	10		T6	10
valid_sources[0x23]	71205	1			T2	4		T6	15		T13	4
valid_sources[0x24]	58227	1			T6	12		T13	12		T46	2
valid_sources[0x25]	61782	1			T2	34		T10	28		T6	16
valid_sources[0x26]	61998	1			T2	13		T10	8		T6	11
valid_sources[0x27]	50804	1			T2	8		T6	12		T12	2
valid_sources[0x28]	54403	1			T2	17		T10	14		T5	3
valid_sources[0x29]	66340	1			T2	28		T5	1		T6	29
valid_sources[0x2a]	59974	1			T2	14		T6	25		T13	8
valid_sources[0x2b]	96432	1			T6	17		T13	12		T7	42
valid_sources[0x2c]	51200	1			T2	13		T6	21		T13	3
valid_sources[0x2d]	52140	1			T2	37		T6	16		T12	1
valid_sources[0x2e]	55180	1			T2	20		T6	19		T12	6
valid_sources[0x2f]	61211	1			T2	13		T6	22		T12	1
valid_sources[0x30]	52056	1			T2	1		T10	8		T6	26
valid_sources[0x31]	51523	1			T2	40		T10	3		T6	18
valid_sources[0x32]	52504	1			T2	20		T6	16		T12	1
valid_sources[0x33]	50179	1			T2	17		T10	14		T6	15
valid_sources[0x34]	60163	1			T2	24		T10	2		T5	2
valid_sources[0x35]	59035	1			T2	10		T10	4		T5	4
valid_sources[0x36]	58948	1			T2	31		T6	19		T12	3
valid_sources[0x37]	63332	1			T2	27		T6	24		T12	4
valid_sources[0x38]	61144	1			T2	2		T6	20		T12	1
valid_sources[0x39]	59676	1			T2	13		T6	13		T12	4
valid_sources[0x3a]	54988	1			T2	12		T10	7		T6	22
valid_sources[0x3b]	68405	1			T2	16		T10	38		T6	27
valid_sources[0x3c]	60644	1			T2	12		T6	18		T12	1
valid_sources[0x3d]	55120	1			T2	24		T6	20		T46	2
valid_sources[0x3e]	54047	1			T2	17		T10	5		T6	25
valid_sources[0x3f]	61848	1			T2	47		T6	22		T12	1
valid_sources[0x40]	52194	1			T2	8		T6	21		T12	2
valid_sources[0x41]	54279	1			T6	17		T46	1		T7	29
valid_sources[0x42]	54512	1			T2	26		T5	1		T6	15
valid_sources[0x43]	52866	1			T2	10		T6	19		T12	4
valid_sources[0x44]	56184	1			T2	17		T10	4		T6	27
valid_sources[0x45]	53473	1			T2	16		T10	3		T6	21
valid_sources[0x46]	66052	1			T2	26		T10	24		T6	16
valid_sources[0x47]	52208	1			T2	15		T6	16		T46	4
valid_sources[0x48]	51993	1			T2	7		T10	21		T6	14
valid_sources[0x49]	51996	1			T2	9		T6	21		T13	1
valid_sources[0x4a]	49760	1			T2	17		T10	18		T6	24
valid_sources[0x4b]	69987	1			T2	6		T10	1		T6	13
valid_sources[0x4c]	59659	1			T2	4		T6	18		T13	2
valid_sources[0x4d]	48291	1			T2	16		T6	17		T13	1
valid_sources[0x4e]	56387	1			T2	20		T10	6		T5	3
valid_sources[0x4f]	64523	1			T2	27		T10	5		T6	19
valid_sources[0x50]	74189	1			T2	21		T6	21		T12	3
valid_sources[0x51]	49692	1			T2	24		T10	10		T6	25
valid_sources[0x52]	59093	1			T2	7		T6	21		T13	1
valid_sources[0x53]	51310	1			T2	10		T6	22		T12	2
valid_sources[0x54]	62502	1			T2	16		T6	14		T12	7
valid_sources[0x55]	58991	1			T2	19		T6	10		T12	2
valid_sources[0x56]	52000	1			T2	27		T6	18		T12	5
valid_sources[0x57]	52614	1			T2	2		T10	10		T6	21
valid_sources[0x58]	141749	1			T2	12		T10	15		T6	16
valid_sources[0x59]	54243	1			T2	13		T10	1		T6	20
valid_sources[0x5a]	54127	1			T2	12		T6	17		T12	2
valid_sources[0x5b]	55769	1			T2	25		T6	23		T12	5
valid_sources[0x5c]	53426	1			T2	11		T10	27		T6	12
valid_sources[0x5d]	66018	1			T2	3		T10	11		T6	17
valid_sources[0x5e]	54093	1			T2	22		T10	3		T6	24
valid_sources[0x5f]	62100	1			T2	4		T10	2		T6	21
valid_sources[0x60]	51285	1			T2	2		T10	3		T6	26
valid_sources[0x61]	86852	1			T2	16		T10	17		T5	3
valid_sources[0x62]	59824	1			T2	9		T10	8		T5	1
valid_sources[0x63]	99933	1			T2	10		T6	28		T12	3
valid_sources[0x64]	63154	1			T2	18		T6	26		T12	4
valid_sources[0x65]	49242	1			T2	6		T10	1		T6	22
valid_sources[0x66]	66967	1			T2	7		T10	21		T5	1
valid_sources[0x67]	53496	1			T2	39		T5	2		T6	16
valid_sources[0x68]	52285	1			T2	39		T10	4		T6	27
valid_sources[0x69]	50490	1			T2	15		T6	21		T46	4
valid_sources[0x6a]	52572	1			T2	2		T10	11		T6	15
valid_sources[0x6b]	54318	1			T2	26		T6	26		T13	6
valid_sources[0x6c]	51111	1			T2	4		T10	4		T6	18
valid_sources[0x6d]	50475	1			T2	17		T5	1		T6	21
valid_sources[0x6e]	51982	1			T2	19		T6	20		T12	3
valid_sources[0x6f]	60515	1			T2	40		T10	23		T6	17
valid_sources[0x70]	52042	1			T2	8		T6	13		T12	4
valid_sources[0x71]	61938	1			T2	13		T6	22		T12	7
valid_sources[0x72]	56832	1			T2	1		T10	8		T6	19
valid_sources[0x73]	58343	1			T2	18		T6	17		T12	8
valid_sources[0x74]	54731	1			T2	32		T6	19		T12	7
valid_sources[0x75]	52345	1			T2	11		T10	11		T6	12
valid_sources[0x76]	53557	1			T2	6		T10	17		T6	16
valid_sources[0x77]	127541	1			T2	50		T6	10		T13	4
valid_sources[0x78]	50786	1			T2	9		T10	6		T6	14
valid_sources[0x79]	55111	1			T2	9		T10	5		T6	11
valid_sources[0x7a]	54850	1			T2	29		T10	52		T6	20
valid_sources[0x7b]	59859	1			T2	16		T6	15		T12	3
valid_sources[0x7c]	60640	1			T2	41		T6	26		T46	2
valid_sources[0x7d]	52494	1			T2	11		T10	3		T6	13
valid_sources[0x7e]	58432	1			T2	7		T11	50		T4	1387
valid_sources[0x7f]	57380	1			T2	29		T5	3		T6	16
valid_sources[0x80]	59103	1			T2	16		T5	2		T6	12

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

3527713

1

T1

115

T2

1434

T3

1127

values[0x0]

all_enables

biggest_size

2035514

1

T1

68

T2

160

T3

188

values[0x1]

all_enables

biggest_size

1960779

1

T1

51

T2

122

T3

137

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	268716	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

9644784

1

T2

20

T3

160

T6

100

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	2464904	1			T2	10		T3	80		T6	50
values[0x0]	3616572	1			T2	5		T3	49		T6	22
values[0x1]	3832024	1			T2	5		T3	31		T6	28

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	97322	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

9816178

1

T2

20

T3

160

T6

100

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	38568	1			T8	1		T9	594		T16	3
valid_sources[0x01]	37027	1			T8	2		T9	587		T16	5
valid_sources[0x02]	37224	1			T8	1		T9	614		T16	5
valid_sources[0x03]	39163	1			T7	1		T9	605		T16	2
valid_sources[0x04]	38422	1			T6	1		T9	641		T16	2
valid_sources[0x05]	39180	1			T9	592		T59	8		T16	2
valid_sources[0x06]	36806	1			T6	3		T9	629		T16	6
valid_sources[0x07]	39031	1			T7	1		T9	612		T16	1
valid_sources[0x08]	39356	1			T6	1		T7	2		T9	596
valid_sources[0x09]	38616	1			T6	1		T9	682		T16	4
valid_sources[0x0a]	39403	1			T9	635		T16	2		T65	1
valid_sources[0x0b]	36757	1			T7	2		T9	612		T16	2
valid_sources[0x0c]	38833	1			T6	2		T7	1		T9	598
valid_sources[0x0d]	39226	1			T7	2		T9	587		T16	4
valid_sources[0x0e]	38408	1			T2	20		T7	3		T9	588
valid_sources[0x0f]	40048	1			T6	1		T7	2		T9	639
valid_sources[0x10]	37512	1			T6	1		T8	1		T9	576
valid_sources[0x11]	37880	1			T9	592		T16	8		T65	1
valid_sources[0x12]	39179	1			T9	637		T16	1		T65	3
valid_sources[0x13]	39030	1			T7	1		T9	561		T16	5
valid_sources[0x14]	37651	1			T6	1		T7	1		T9	622
valid_sources[0x15]	38989	1			T9	600		T16	4		T65	2
valid_sources[0x16]	37415	1			T6	1		T7	1		T9	615
valid_sources[0x17]	39821	1			T7	2		T9	575		T16	5
valid_sources[0x18]	37593	1			T6	2		T7	1		T9	556
valid_sources[0x19]	38576	1			T9	579		T16	3		T65	1
valid_sources[0x1a]	38327	1			T7	2		T9	618		T16	9
valid_sources[0x1b]	38639	1			T7	1		T9	600		T65	4
valid_sources[0x1c]	38209	1			T7	2		T9	569		T16	5
valid_sources[0x1d]	39421	1			T6	1		T7	1		T9	611
valid_sources[0x1e]	37923	1			T6	1		T7	1		T9	615
valid_sources[0x1f]	40158	1			T6	1		T9	653		T16	3
valid_sources[0x20]	38371	1			T7	3		T9	606		T16	4
valid_sources[0x21]	39698	1			T9	642		T16	12		T97	2
valid_sources[0x22]	38925	1			T6	1		T9	625		T16	2
valid_sources[0x23]	39408	1			T3	50		T9	622		T65	8
valid_sources[0x24]	39574	1			T7	5		T9	596		T16	3
valid_sources[0x25]	39746	1			T6	1		T7	2		T9	622
valid_sources[0x26]	40476	1			T9	602		T16	4		T65	1
valid_sources[0x27]	37835	1			T9	634		T16	4		T14	813
valid_sources[0x28]	39216	1			T9	600		T16	9		T65	2
valid_sources[0x29]	39593	1			T9	552		T59	11		T16	3
valid_sources[0x2a]	38640	1			T9	585		T16	3		T97	3
valid_sources[0x2b]	38366	1			T7	1		T9	566		T16	4
valid_sources[0x2c]	39040	1			T7	1		T9	603		T16	3
valid_sources[0x2d]	36066	1			T9	605		T16	3		T65	4
valid_sources[0x2e]	38799	1			T8	1		T9	621		T16	2
valid_sources[0x2f]	38755	1			T7	1		T9	592		T16	1
valid_sources[0x30]	37619	1			T6	2		T7	1		T9	612
valid_sources[0x31]	38840	1			T9	583		T16	1		T97	3
valid_sources[0x32]	39266	1			T9	625		T16	3		T14	829
valid_sources[0x33]	38671	1			T9	580		T16	2		T14	829
valid_sources[0x34]	39399	1			T7	1		T9	592		T16	3
valid_sources[0x35]	37896	1			T9	620		T16	1		T97	1
valid_sources[0x36]	37468	1			T7	1		T9	567		T16	3
valid_sources[0x37]	37137	1			T9	587		T16	6		T65	1
valid_sources[0x38]	37876	1			T7	1		T9	612		T16	3
valid_sources[0x39]	37750	1			T7	2		T9	560		T16	4
valid_sources[0x3a]	39286	1			T6	1		T9	561		T16	3
valid_sources[0x3b]	37407	1			T9	585		T16	3		T97	5
valid_sources[0x3c]	38527	1			T9	600		T16	7		T65	4
valid_sources[0x3d]	38515	1			T7	1		T9	601		T16	6
valid_sources[0x3e]	38174	1			T7	1		T8	1		T9	639
valid_sources[0x3f]	38205	1			T9	604		T16	5		T65	1
valid_sources[0x40]	39975	1			T6	1		T9	600		T16	3
valid_sources[0x41]	38074	1			T6	1		T7	1		T9	575
valid_sources[0x42]	38607	1			T7	4		T9	624		T16	12
valid_sources[0x43]	38512	1			T9	589		T16	3		T65	2
valid_sources[0x44]	38004	1			T6	2		T7	1		T9	614
valid_sources[0x45]	39974	1			T7	1		T9	588		T16	1
valid_sources[0x46]	39169	1			T7	1		T9	625		T16	1
valid_sources[0x47]	38867	1			T9	651		T16	2		T189	1
valid_sources[0x48]	37301	1			T9	646		T16	7		T14	908
valid_sources[0x49]	39129	1			T9	625		T16	6		T65	3
valid_sources[0x4a]	38030	1			T7	4		T9	565		T16	4
valid_sources[0x4b]	37095	1			T6	1		T9	587		T16	6
valid_sources[0x4c]	39391	1			T9	620		T16	5		T65	7
valid_sources[0x4d]	37358	1			T7	1		T9	623		T16	3
valid_sources[0x4e]	40580	1			T7	3		T9	597		T16	2
valid_sources[0x4f]	39598	1			T6	3		T7	1		T9	598
valid_sources[0x50]	38166	1			T6	2		T9	634		T16	2
valid_sources[0x51]	39181	1			T6	1		T9	605		T16	4
valid_sources[0x52]	39091	1			T6	2		T7	6		T9	544
valid_sources[0x53]	38455	1			T6	2		T9	633		T59	13
valid_sources[0x54]	38755	1			T7	1		T9	590		T16	2
valid_sources[0x55]	39133	1			T7	2		T9	585		T16	4
valid_sources[0x56]	38117	1			T9	616		T16	7		T97	2
valid_sources[0x57]	37904	1			T6	2		T9	589		T16	11
valid_sources[0x58]	39782	1			T7	1		T9	683		T16	7
valid_sources[0x59]	38936	1			T7	1		T8	1		T9	606
valid_sources[0x5a]	38447	1			T9	587		T16	1		T65	2
valid_sources[0x5b]	38112	1			T9	634		T16	8		T65	5
valid_sources[0x5c]	38160	1			T6	1		T7	2		T9	601
valid_sources[0x5d]	39472	1			T7	1		T9	588		T16	4
valid_sources[0x5e]	39224	1			T9	567		T16	4		T97	2
valid_sources[0x5f]	39805	1			T7	1		T9	588		T16	5
valid_sources[0x60]	37978	1			T7	1		T8	1		T9	640
valid_sources[0x61]	37794	1			T6	1		T7	5		T9	622
valid_sources[0x62]	36940	1			T7	2		T9	604		T59	1
valid_sources[0x63]	38842	1			T6	1		T7	1		T8	1
valid_sources[0x64]	40801	1			T9	619		T16	6		T65	5
valid_sources[0x65]	38635	1			T9	633		T16	6		T97	1
valid_sources[0x66]	39767	1			T13	40		T9	602		T16	6
valid_sources[0x67]	38717	1			T6	1		T9	603		T59	1
valid_sources[0x68]	38835	1			T6	2		T7	2		T9	539
valid_sources[0x69]	37411	1			T9	593		T16	4		T65	2
valid_sources[0x6a]	37579	1			T7	2		T9	543		T16	3
valid_sources[0x6b]	38842	1			T9	588		T59	3		T16	4
valid_sources[0x6c]	39669	1			T6	2		T7	2		T9	656
valid_sources[0x6d]	39927	1			T6	3		T9	618		T16	3
valid_sources[0x6e]	37831	1			T9	654		T16	6		T65	2
valid_sources[0x6f]	39274	1			T9	635		T16	1		T65	3
valid_sources[0x70]	39070	1			T9	598		T16	4		T65	7
valid_sources[0x71]	37741	1			T7	1		T9	628		T16	4
valid_sources[0x72]	39773	1			T7	2		T9	579		T16	3
valid_sources[0x73]	37564	1			T7	1		T9	608		T16	3
valid_sources[0x74]	37680	1			T9	625		T16	5		T65	3
valid_sources[0x75]	40177	1			T9	595		T16	6		T65	3
valid_sources[0x76]	38401	1			T9	557		T16	2		T65	2
valid_sources[0x77]	38353	1			T9	657		T59	18		T16	5
valid_sources[0x78]	39827	1			T7	1		T9	604		T16	5
valid_sources[0x79]	38409	1			T9	608		T97	4		T14	850
valid_sources[0x7a]	37377	1			T3	110		T7	1		T9	593
valid_sources[0x7b]	38304	1			T7	1		T9	581		T16	2
valid_sources[0x7c]	40169	1			T6	1		T9	627		T16	2
valid_sources[0x7d]	38173	1			T9	648		T16	3		T14	772
valid_sources[0x7e]	39298	1			T9	581		T16	4		T65	1
valid_sources[0x7f]	36971	1			T6	1		T9	540		T59	1
valid_sources[0x80]	39401	1			T9	602		T16	4		T65	2

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

2449359

1

T2

10

T3

80

T6

50

values[0x0]

all_enables

biggest_size

3598232

1

T2

5

T3

49

T6

22

values[0x1]

all_enables

biggest_size

3597193

1

T2

5

T3

31

T6

28