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Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 14263 1 T1 9 T2 16 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 14263 1 T1 9 T2 16 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 10162 1 T1 6 T2 12 T3 5
true 16649 1 T1 9 T2 16 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 11085 1 T1 8 T2 13 T3 6
true 16701 1 T1 9 T2 16 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 126 1 T95 2 T18 2 T96 2
others[1] 92 1 T90 2 T101 2 T200 2
others[2] 80 1 T57 2 T129 2 T286 2
others[3] 78 1 T11 2 T202 2 T269 2
others[4] 108 1 T11 2 T13 2 T95 2
others[5] 98 1 T95 2 T202 2 T376 2
others[6] 86 1 T2 2 T11 4 T228 2
others[7] 114 1 T11 2 T99 2 T101 2
false 14263 1 T1 9 T2 16 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 104 1 T8 2 T11 2 T13 2
others[1] 76 1 T129 2 T377 2 T269 4
others[2] 76 1 T99 2 T199 2 T200 2
others[3] 74 1 T269 2 T378 2 T379 2
others[4] 110 1 T90 2 T272 2 T376 2
others[5] 100 1 T8 2 T16 2 T101 2
others[6] 72 1 T8 2 T99 2 T100 2
others[7] 92 1 T97 2 T99 2 T100 2
false 14263 1 T1 9 T2 16 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 66 1 T57 2 T99 2 T272 2
others[1] 110 1 T11 2 T62 2 T272 2
others[2] 104 1 T100 2 T101 2 T202 2
others[3] 92 1 T11 2 T101 2 T199 2
others[4] 84 1 T2 4 T16 4 T95 2
others[5] 74 1 T99 2 T228 2 T229 2
others[6] 88 1 T97 2 T98 2 T228 6
others[7] 98 1 T97 2 T199 2 T236 2
false 14263 1 T1 9 T2 16 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 70 1 T9 2 T97 2 T90 2
others[1] 46 1 T380 2 T381 2 T269 2
others[2] 70 1 T8 2 T90 2 T382 2
others[3] 76 1 T129 2 T269 2 T286 2
others[4] 76 1 T90 2 T200 2 T201 2
others[5] 62 1 T129 2 T382 2 T179 2
others[6] 72 1 T199 2 T383 2 T269 2
others[7] 78 1 T100 2 T200 2 T381 2
false 14263 1 T1 9 T2 16 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 84 1 T18 2 T228 2 T129 2
others[1] 96 1 T8 2 T11 4 T90 2
others[2] 92 1 T18 2 T228 2 T381 2
others[3] 112 1 T97 2 T100 2 T202 2
others[4] 80 1 T90 2 T202 2 T383 2
others[5] 100 1 T95 2 T97 2 T201 2
others[6] 86 1 T2 2 T57 2 T200 2
others[7] 116 1 T2 2 T11 2 T95 2
false 14263 1 T1 9 T2 16 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 26 1 T228 2 T384 2 T385 2
others[1] 28 1 T229 2 T129 2 T386 2
others[2] 46 1 T95 2 T384 2 T376 2
others[3] 34 1 T129 4 T387 2 T355 2
others[4] 24 1 T2 2 T101 2 T319 2
others[5] 46 1 T11 2 T16 2 T98 2
others[6] 50 1 T101 2 T28 2 T229 2
others[7] 27 1 T229 2 T269 2 T388 3
false 14262 1 T1 9 T2 16 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 122 1 T11 2 T16 2 T18 2
others[1] 86 1 T11 2 T16 2 T57 2
others[2] 82 1 T8 2 T18 2 T57 2
others[3] 104 1 T1 2 T97 2 T384 2
others[4] 82 1 T62 2 T57 2 T72 2
others[5] 86 1 T90 2 T228 2 T199 2
others[6] 88 1 T11 2 T13 2 T16 2
others[7] 90 1 T90 2 T272 2 T383 2
false 14263 1 T1 9 T2 16 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 90 1 T382 4 T380 2 T384 2
others[1] 88 1 T90 4 T236 4 T272 2
others[2] 98 1 T8 2 T229 2 T129 2
others[3] 68 1 T16 4 T269 6 T289 2
others[4] 71 1 T13 2 T97 4 T199 2
others[5] 84 1 T1 2 T2 2 T16 2
others[6] 130 1 T1 2 T96 2 T99 2
others[7] 126 1 T95 2 T57 2 T199 2
false 14262 1 T1 9 T2 16 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 88 1 T97 4 T90 2 T99 2
others[1] 88 1 T100 2 T129 2 T380 2
others[2] 56 1 T96 2 T57 2 T101 2
others[3] 94 1 T8 2 T11 2 T229 2
others[4] 72 1 T200 2 T376 4 T389 2
others[5] 90 1 T1 2 T13 2 T90 2
others[6] 72 1 T2 2 T18 2 T101 2
others[7] 106 1 T11 2 T95 2 T199 2
false 14263 1 T1 9 T2 16 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 114 1 T2 2 T90 2 T99 2
others[1] 92 1 T228 2 T382 2 T380 4
others[2] 88 1 T2 4 T97 4 T199 2
others[3] 118 1 T1 2 T8 2 T99 2
others[4] 90 1 T16 2 T95 2 T90 2
others[5] 100 1 T16 2 T57 2 T100 2
others[6] 80 1 T97 2 T99 2 T228 2
others[7] 100 1 T1 2 T18 2 T199 2
false 14263 1 T1 9 T2 16 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 98 1 T18 2 T96 2 T236 2
others[1] 84 1 T8 2 T16 2 T96 2
others[2] 80 1 T9 2 T11 2 T18 2
others[3] 82 1 T8 2 T199 2 T269 2
others[4] 76 1 T95 2 T98 2 T236 2
others[5] 80 1 T13 2 T202 2 T129 8
others[6] 100 1 T101 2 T269 4 T286 2
others[7] 114 1 T11 2 T157 2 T229 2
false 14263 1 T1 9 T2 16 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 34 1 T128 1 T206 2 T133 1
others[1] 48 1 T6 1 T206 1 T169 1
others[2] 27 1 T6 2 T14 3 T206 1
others[3] 21 1 T7 1 T206 1 T169 2
others[4] 27 1 T14 2 T128 1 T169 1
others[5] 33 1 T128 1 T19 1 T206 1
others[6] 23 1 T7 1 T339 1 T135 1
others[7] 47 1 T128 2 T169 1 T36 1
false 14263 1 T1 9 T2 16 T3 6
true 2316 1 T1 1 T2 4 T8 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 40 1 T6 1 T128 2 T206 1
others[1] 26 1 T7 1 T14 1 T133 2
others[2] 32 1 T128 1 T169 2 T133 1
others[3] 42 1 T14 1 T128 1 T19 1
others[4] 24 1 T7 1 T206 2 T131 1
others[5] 24 1 T128 1 T169 1 T131 1
others[6] 31 1 T6 2 T14 3 T206 1
others[7] 41 1 T206 1 T263 1 T134 1
false 11558 1 T1 8 T2 14 T3 6
true 18956 1 T1 10 T2 20 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 82 1 T11 2 T13 2 T96 4
others[1] 120 1 T95 2 T99 2 T101 2
others[2] 106 1 T11 2 T57 2 T202 2
others[3] 98 1 T2 2 T11 4 T101 2
others[4] 72 1 T11 2 T95 4 T129 2
others[5] 86 1 T57 2 T90 2 T228 2
others[6] 78 1 T202 2 T382 2 T376 2
others[7] 140 1 T18 2 T236 2 T200 2
false 7785 1 T1 8 T2 9 T3 6
true 16755 1 T1 9 T2 16 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 90 1 T8 2 T100 2 T272 2
others[1] 82 1 T13 2 T382 2 T380 2
others[2] 92 1 T8 4 T101 2 T200 2
others[3] 76 1 T90 2 T99 2 T101 2
others[4] 94 1 T16 2 T95 2 T99 2
others[5] 96 1 T228 2 T376 2 T269 2
others[6] 92 1 T97 2 T99 2 T100 2
others[7] 82 1 T11 2 T16 2 T269 2
false 6884 1 T1 1 T2 9 T3 5
true 16513 1 T1 9 T2 16 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 88 1 T2 2 T95 2 T99 2
others[1] 100 1 T97 2 T98 2 T101 2
others[2] 84 1 T236 2 T229 4 T272 2
others[3] 114 1 T2 2 T100 2 T101 2
others[4] 76 1 T98 2 T62 2 T236 2
others[5] 74 1 T11 2 T97 2 T228 2
others[6] 92 1 T11 2 T16 4 T57 2
others[7] 88 1 T97 2 T272 4 T381 2
false 7309 1 T1 1 T2 1 T3 5
true 16531 1 T1 9 T2 16 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 33 1 T6 1 T72 2 T14 1
others[1] 29 1 T7 1 T14 1 T169 1
others[2] 30 1 T6 1 T14 1 T128 1
others[3] 29 1 T6 1 T128 1 T169 1
others[4] 30 1 T95 2 T6 1 T128 1
others[5] 29 1 T7 1 T169 1 T131 1
others[6] 29 1 T6 1 T62 2 T128 1
others[7] 45 1 T98 2 T14 1 T169 1
false 11503 1 T1 8 T2 14 T3 6
true 18923 1 T1 9 T2 20 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 64 1 T8 2 T90 2 T100 2
others[1] 48 1 T380 2 T179 2 T379 2
others[2] 68 1 T90 2 T200 2 T382 2
others[3] 68 1 T97 2 T90 2 T72 2
others[4] 96 1 T380 2 T381 2 T383 2
others[5] 76 1 T9 2 T129 2 T85 2
others[6] 60 1 T381 2 T269 2 T290 2
others[7] 70 1 T200 2 T201 2 T202 2
false 8889 1 T1 8 T2 14 T3 6
true 16750 1 T1 9 T2 16 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 23 1 T6 1 T133 1 T338 1
others[1] 18 1 T6 2 T14 1 T19 1
others[2] 26 1 T14 1 T236 2 T128 1
others[3] 21 1 T14 1 T169 1 T263 1
others[4] 41 1 T14 2 T206 1 T169 1
others[5] 26 1 T14 3 T128 1 T283 1
others[6] 30 1 T128 1 T251 1 T263 2
others[7] 30 1 T7 1 T250 1 T36 1
false 11440 1 T1 8 T2 14 T3 6
true 18880 1 T1 9 T2 20 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 104 1 T2 2 T236 2 T28 2
others[1] 82 1 T380 2 T269 4 T271 2
others[2] 120 1 T100 2 T228 2 T200 2
others[3] 84 1 T11 2 T95 2 T18 2
others[4] 84 1 T8 2 T97 2 T101 2
others[5] 76 1 T11 2 T18 2 T202 2
others[6] 112 1 T95 2 T202 2 T376 2
others[7] 104 1 T2 2 T11 2 T97 2
false 7711 1 T1 8 T2 1 T3 6
true 16678 1 T1 9 T2 16 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 27 1 T14 2 T206 2 T169 1
others[1] 35 1 T14 2 T206 2 T262 1
others[2] 29 1 T129 2 T131 1 T263 1
others[3] 21 1 T7 1 T206 1 T169 1
others[4] 26 1 T95 2 T128 1 T169 1
others[5] 22 1 T72 2 T14 1 T262 1
others[6] 27 1 T14 1 T19 1 T206 1
others[7] 39 1 T6 1 T7 1 T128 1
false 11403 1 T1 8 T2 14 T3 6
true 18870 1 T1 10 T2 18 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 33 1 T28 2 T386 2 T376 4
others[1] 44 1 T228 2 T129 2 T384 2
others[2] 40 1 T16 2 T101 4 T129 4
others[3] 30 1 T229 2 T129 2 T269 2
others[4] 34 1 T95 2 T229 2 T129 2
others[5] 26 1 T319 4 T119 2 T390 2
others[6] 40 1 T2 2 T11 2 T229 4
others[7] 34 1 T98 2 T101 2 T228 2
false 9886 1 T1 1 T2 1 T3 6
true 16744 1 T1 9 T2 16 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 96 1 T1 2 T18 2 T236 2
others[1] 80 1 T11 2 T13 2 T16 2
others[2] 86 1 T8 2 T228 2 T383 2
others[3] 104 1 T57 2 T90 2 T72 2
others[4] 84 1 T11 2 T16 2 T57 2
others[5] 92 1 T11 2 T57 2 T236 2
others[6] 96 1 T16 2 T97 2 T90 2
others[7] 102 1 T97 2 T269 6 T289 2
false 7013 1 T1 1 T2 8 T3 4
true 16519 1 T1 9 T2 16 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 86 1 T57 2 T101 2 T200 2
others[1] 64 1 T90 2 T84 2 T269 4
others[2] 78 1 T16 4 T199 2 T236 2
others[3] 100 1 T16 2 T95 2 T236 2
others[4] 106 1 T2 2 T90 2 T99 2
others[5] 98 1 T1 4 T96 2 T97 2
others[6] 94 1 T8 2 T13 2 T380 2
others[7] 129 1 T97 2 T199 2 T129 2
false 7013 1 T1 1 T2 8 T3 4
true 16518 1 T1 9 T2 16 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 80 1 T13 2 T97 2 T380 2
others[1] 82 1 T95 2 T382 2 T269 2
others[2] 88 1 T99 2 T129 4 T386 2
others[3] 88 1 T11 4 T97 2 T101 2
others[4] 78 1 T90 2 T229 2 T389 2
others[5] 88 1 T2 2 T8 2 T100 2
others[6] 78 1 T1 2 T18 2 T57 2
others[7] 84 1 T96 2 T229 2 T376 2
false 6446 1 T1 1 T2 3 T3 3
true 16530 1 T1 9 T2 16 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 86 1 T2 2 T16 2 T18 2
others[1] 110 1 T99 2 T202 2 T129 2
others[2] 90 1 T95 2 T199 2 T376 6
others[3] 92 1 T57 2 T90 2 T382 2
others[4] 108 1 T1 2 T2 2 T97 2
others[5] 104 1 T16 2 T97 2 T199 2
others[6] 78 1 T1 2 T2 2 T269 2
others[7] 114 1 T8 2 T97 2 T228 2
false 6446 1 T1 1 T2 3 T3 3
true 16530 1 T1 9 T2 16 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 82 1 T11 2 T97 2 T129 2
others[1] 62 1 T18 2 T62 2 T129 2
others[2] 42 1 T18 2 T269 2 T179 2
others[3] 74 1 T8 2 T11 2 T85 2
others[4] 60 1 T8 2 T11 2 T376 2
others[5] 76 1 T8 2 T90 2 T199 2
others[6] 54 1 T11 2 T199 2 T236 2
others[7] 78 1 T129 2 T391 2 T392 2
false 6880 1 T1 2 T2 9 T3 4
true 17836 1 T1 10 T2 22 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 36 1 T97 2 T393 2 T319 2
others[1] 66 1 T18 2 T229 2 T271 2
others[2] 60 1 T129 2 T382 2 T376 2
others[3] 60 1 T1 2 T272 2 T383 2
others[4] 56 1 T97 2 T129 2 T272 2
others[5] 76 1 T99 4 T376 2 T383 2
others[6] 66 1 T11 2 T13 2 T95 2
others[7] 62 1 T272 2 T269 2 T392 2
false 6880 1 T1 2 T2 9 T3 4
true 17836 1 T1 10 T2 22 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 20 1 T7 1 T36 1 T263 1
others[1] 29 1 T6 1 T14 2 T133 1
others[2] 31 1 T98 2 T251 1 T131 1
others[3] 41 1 T7 1 T72 2 T128 1
others[4] 21 1 T169 1 T131 1 T263 1
others[5] 39 1 T7 1 T206 1 T283 1
others[6] 26 1 T128 1 T263 2 T291 1
others[7] 44 1 T6 2 T7 1 T14 2
false 11645 1 T1 8 T2 14 T3 6
true 19004 1 T1 9 T2 20 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 72 1 T100 2 T28 4 T129 2
others[1] 86 1 T9 2 T18 4 T98 2
others[2] 76 1 T11 2 T90 2 T100 2
others[3] 90 1 T11 2 T101 4 T199 2
others[4] 92 1 T8 2 T13 2 T97 2
others[5] 104 1 T8 2 T96 2 T99 2
others[6] 76 1 T95 2 T383 2 T269 2
others[7] 118 1 T16 2 T96 2 T228 2
false 7704 1 T1 1 T2 9 T3 6
true 16716 1 T1 9 T2 16 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 27 1 T14 2 T169 2 T133 1
others[1] 29 1 T128 2 T250 1 T36 1
others[2] 28 1 T6 1 T206 1 T169 1
others[3] 32 1 T6 2 T128 1 T206 1
others[4] 37 1 T6 1 T72 2 T169 1
others[5] 31 1 T98 2 T62 2 T206 1
others[6] 33 1 T95 2 T7 1 T128 1
others[7] 38 1 T6 1 T7 1 T14 2
false 14263 1 T1 9 T2 16 T3 6
true 2317 1 T2 4 T8 3 T5 1

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%