Group : otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
dashboard | hierarchy | modlist | groups | tests | asserts

Group : otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
84.44 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv



Summary for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 18 1 17 94.44
Crosses 72 13 59 81.94


Variables for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
err_code_vals 7 1 6 85.71 100 1 1 0
partition 11 0 11 100.00 100 1 1 0


Crosses for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
dai_err_code_for_all_partitions 72 13 59 81.94 100 1 1 0


Summary for Variable err_code_vals

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 7 1 6 85.71


User Defined Bins for err_code_vals

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
macro_err 0 1 1


Excluded/Illegal bins
NAMECOUNTSTATUS
illegal_err 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
fsm_err 51055 1 T9 52 T141 8 T7 159
access_err 65848 1 T1 3 T2 29 T8 116
write_blank_err 475 1 T5 3 T6 4 T7 4
ecc_uncorr_err 70818 1 T5 408 T6 97 T130 264
ecc_corr_err 1276 1 T5 5 T9 18 T130 6
no_err 93606 1 T1 2 T2 32 T3 107



Summary for Variable partition

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 11 0 11 100.00


User Defined Bins for partition

Excluded/Illegal bins
NAMECOUNTSTATUS
illegal_idx 0 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
life_cycle 724 1 T5 2 T6 4 T15 2
secret2 22108 1 T2 7 T3 4 T8 23
secret1 29556 1 T1 1 T2 7 T3 21
secret0 39053 1 T2 2 T3 18 T8 12
hw_cfg1 40477 1 T1 2 T2 3 T3 19
hw_cfg0 25172 1 T2 8 T3 10 T8 30
rot_creator_auth_state 24078 1 T1 1 T2 7 T3 6
rot_creator_auth_codesign 22726 1 T2 9 T3 14 T8 22
owner_sw_cfg 22082 1 T2 3 T3 6 T8 39
creator_sw_cfg 20790 1 T2 7 T3 4 T8 21
vendor_test 36312 1 T1 1 T2 8 T3 5



Summary for Cross dai_err_code_for_all_partitions

Samples crossed: err_code_vals partition
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
TOTAL 72 13 59 81.94 13
Automatically Generated Cross Bins 72 13 59 81.94 13
User Defined Cross Bins 0 0 0


Automatically Generated Cross Bins for dai_err_code_for_all_partitions

Uncovered bins
err_code_valspartitionCOUNTAT LEASTNUMBERSTATUS
[fsm_err] [life_cycle] 0 1 1
[ecc_corr_err] [vendor_test] 0 1 1
[macro_err] [secret2 , secret1 , secret0 , hw_cfg1 , hw_cfg0 , rot_creator_auth_state , rot_creator_auth_codesign , owner_sw_cfg , creator_sw_cfg , vendor_test] -- -- 10
[no_err] [life_cycle] 0 1 1


Covered bins
err_code_valspartitionCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
fsm_err secret2 1669 1 T167 19 T265 72 T248 72
fsm_err secret1 5262 1 T168 153 T234 370 T166 18
fsm_err secret0 3437 1 T141 8 T176 22 T348 233
fsm_err hw_cfg1 3394 1 T152 51 T349 264 T139 93
fsm_err hw_cfg0 4501 1 T283 89 T350 473 T351 76
fsm_err rot_creator_auth_state 4900 1 T7 113 T343 243 T344 78
fsm_err rot_creator_auth_codesign 3187 1 T7 46 T352 461 T166 32
fsm_err owner_sw_cfg 3257 1 T244 308 T240 157 T255 473
fsm_err creator_sw_cfg 3361 1 T353 430 T206 180 T174 51
fsm_err vendor_test 18087 1 T9 52 T62 48 T57 118
access_err life_cycle 724 1 T5 2 T6 4 T15 2
access_err secret2 11336 1 T2 7 T8 17 T9 9
access_err secret1 6412 1 T1 1 T2 6 T8 20
access_err secret0 5088 1 T2 2 T8 11 T9 1
access_err hw_cfg1 1290 1 T1 2 T2 1 T8 2
access_err hw_cfg0 2202 1 T8 13 T9 10 T11 19
access_err rot_creator_auth_state 6454 1 T2 5 T8 1 T5 3
access_err rot_creator_auth_codesign 8669 1 T2 6 T8 9 T9 3
access_err owner_sw_cfg 7441 1 T8 23 T9 5 T11 10
access_err creator_sw_cfg 8234 1 T8 9 T9 6 T11 29
access_err vendor_test 7998 1 T2 2 T8 11 T9 1
write_blank_err secret2 8 1 T242 1 T354 1 T355 1
write_blank_err secret1 25 1 T5 1 T128 1 T283 1
write_blank_err secret0 63 1 T6 1 T7 1 T14 1
write_blank_err hw_cfg1 86 1 T5 2 T7 2 T15 1
write_blank_err hw_cfg0 14 1 T158 1 T356 1 T133 1
write_blank_err rot_creator_auth_state 139 1 T6 2 T7 1 T15 1
write_blank_err rot_creator_auth_codesign 53 1 T15 2 T158 3 T283 2
write_blank_err owner_sw_cfg 39 1 T6 1 T158 1 T262 1
write_blank_err creator_sw_cfg 12 1 T158 1 T262 1 T339 1
write_blank_err vendor_test 36 1 T283 2 T356 1 T262 2
ecc_uncorr_err secret2 3579 1 T157 21 T176 30 T242 268
ecc_uncorr_err secret1 8459 1 T5 408 T157 12 T128 344
ecc_uncorr_err secret0 21576 1 T6 97 T130 29 T7 654
ecc_uncorr_err hw_cfg1 23961 1 T130 31 T7 608 T15 224
ecc_uncorr_err hw_cfg0 5435 1 T130 63 T201 9 T166 29
ecc_uncorr_err rot_creator_auth_state 3912 1 T152 124 T201 11 T166 24
ecc_uncorr_err rot_creator_auth_codesign 1721 1 T157 10 T166 26 T176 29
ecc_uncorr_err owner_sw_cfg 1604 1 T130 110 T157 11 T152 49
ecc_uncorr_err creator_sw_cfg 571 1 T130 31 T157 14 T166 23
ecc_corr_err secret2 98 1 T130 1 T57 9 T28 2
ecc_corr_err secret1 147 1 T9 1 T130 1 T57 1
ecc_corr_err secret0 140 1 T9 1 T130 1 T62 1
ecc_corr_err hw_cfg1 260 1 T5 5 T9 5 T7 1
ecc_corr_err hw_cfg0 213 1 T9 7 T62 1 T57 16
ecc_corr_err rot_creator_auth_state 98 1 T62 1 T57 7 T63 1
ecc_corr_err rot_creator_auth_codesign 99 1 T9 2 T62 2 T57 7
ecc_corr_err owner_sw_cfg 110 1 T57 3 T63 1 T72 1
ecc_corr_err creator_sw_cfg 111 1 T9 2 T130 3 T57 9
no_err secret2 5418 1 T3 4 T8 6 T5 7
no_err secret1 9251 1 T2 1 T3 21 T8 7
no_err secret0 8749 1 T3 18 T8 1 T5 5
no_err hw_cfg1 11486 1 T2 2 T3 19 T8 27
no_err hw_cfg0 12807 1 T2 8 T3 10 T8 17
no_err rot_creator_auth_state 8575 1 T1 1 T2 2 T3 6
no_err rot_creator_auth_codesign 8997 1 T2 3 T3 14 T8 13
no_err owner_sw_cfg 9631 1 T2 3 T3 6 T8 16
no_err creator_sw_cfg 8501 1 T2 7 T3 4 T8 12
no_err vendor_test 10191 1 T1 1 T2 6 T3 5


User Defined Cross Bins for dai_err_code_for_all_partitions

Excluded/Illegal bins
NAMECOUNTSTATUS
vendor_test_ecc_uncorrectable_err 0 Illegal
life_cycle_ignore 0 Excluded

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