Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	7096716	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

7301996

1

T1

374

T2

215

T3

1311

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	8169857	1			T1	1004		T2	539		T3	8410
values[0x0]	2371489	1			T1	71		T2	41		T3	218
values[0x1]	3857366	1			T1	59		T2	46		T3	228

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	4575909	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

9822803

1

T1

581

T2

333

T3

3659

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	50660	1			T1	3		T5	11		T6	2
valid_sources[0x01]	48725	1			T1	10		T5	2		T6	3
valid_sources[0x02]	55910	1			T1	6		T5	8		T6	3
valid_sources[0x03]	55665	1			T1	1		T5	16		T6	7
valid_sources[0x04]	53464	1			T1	8		T6	5		T7	2
valid_sources[0x05]	50427	1			T2	626		T5	35		T6	4
valid_sources[0x06]	48661	1			T1	17		T5	8		T6	3
valid_sources[0x07]	50100	1			T5	14		T6	4		T7	1
valid_sources[0x08]	166056	1			T1	11		T5	3		T6	1
valid_sources[0x09]	66670	1			T1	3		T5	31		T6	9
valid_sources[0x0a]	53644	1			T1	2		T5	15		T6	1
valid_sources[0x0b]	52711	1			T1	6		T6	5		T7	1
valid_sources[0x0c]	53121	1			T1	4		T5	4		T6	2
valid_sources[0x0d]	53246	1			T1	2		T5	44		T6	3
valid_sources[0x0e]	72763	1			T1	2		T7	3		T11	6
valid_sources[0x0f]	52502	1			T1	4		T6	2		T7	1
valid_sources[0x10]	51283	1			T1	14		T5	11		T6	4
valid_sources[0x11]	53485	1			T1	4		T5	33		T6	1
valid_sources[0x12]	50694	1			T1	1		T5	2		T6	1
valid_sources[0x13]	64325	1			T1	6		T6	2		T11	12
valid_sources[0x14]	49639	1			T1	2		T5	5		T6	2
valid_sources[0x15]	66193	1			T1	1		T5	12		T6	3
valid_sources[0x16]	58369	1			T5	30		T6	1		T7	2
valid_sources[0x17]	54672	1			T5	14		T6	2		T7	3
valid_sources[0x18]	51483	1			T1	3		T6	2		T7	2
valid_sources[0x19]	50304	1			T1	3		T5	20		T6	3
valid_sources[0x1a]	51874	1			T1	6		T5	18		T6	2
valid_sources[0x1b]	48128	1			T1	2		T5	17		T6	6
valid_sources[0x1c]	51634	1			T1	3		T5	19		T6	3
valid_sources[0x1d]	54624	1			T1	1		T5	32		T6	1
valid_sources[0x1e]	88140	1			T1	4		T5	11		T6	1
valid_sources[0x1f]	51787	1			T1	8		T5	14		T6	5
valid_sources[0x20]	56541	1			T1	3		T5	29		T6	1
valid_sources[0x21]	50142	1			T1	2		T6	2		T7	1
valid_sources[0x22]	49668	1			T1	4		T5	8		T6	1
valid_sources[0x23]	72059	1			T1	3		T5	3		T6	3
valid_sources[0x24]	49715	1			T1	3		T5	25		T6	6
valid_sources[0x25]	54583	1			T1	5		T5	7		T6	2
valid_sources[0x26]	62771	1			T5	1		T6	1		T7	3
valid_sources[0x27]	49812	1			T1	7		T5	34		T6	5
valid_sources[0x28]	58565	1			T1	4		T5	10		T6	6
valid_sources[0x29]	54220	1			T1	4		T5	28		T6	5
valid_sources[0x2a]	52411	1			T1	4		T5	40		T6	2
valid_sources[0x2b]	51528	1			T1	16		T5	3		T6	7
valid_sources[0x2c]	47629	1			T1	3		T5	15		T6	2
valid_sources[0x2d]	53717	1			T1	5		T5	6		T6	4
valid_sources[0x2e]	48350	1			T1	2		T5	67		T6	3
valid_sources[0x2f]	54701	1			T1	9		T6	2		T11	34
valid_sources[0x30]	48720	1			T1	1		T5	1		T6	2
valid_sources[0x31]	50852	1			T1	5		T5	21		T6	2
valid_sources[0x32]	49795	1			T1	3		T5	33		T6	4
valid_sources[0x33]	51132	1			T5	20		T6	4		T7	2
valid_sources[0x34]	47316	1			T5	10		T6	5		T13	1
valid_sources[0x35]	49203	1			T1	8		T5	12		T6	6
valid_sources[0x36]	52714	1			T1	1		T5	5		T6	4
valid_sources[0x37]	52186	1			T1	3		T5	9		T7	2
valid_sources[0x38]	48594	1			T1	1		T5	18		T6	1
valid_sources[0x39]	48961	1			T1	5		T5	14		T6	4
valid_sources[0x3a]	57768	1			T5	3		T7	1		T11	15
valid_sources[0x3b]	49388	1			T1	1		T5	12		T6	2
valid_sources[0x3c]	60312	1			T1	4		T5	8		T6	2
valid_sources[0x3d]	51341	1			T1	10		T6	7		T7	1
valid_sources[0x3e]	58349	1			T1	5		T5	22		T6	4
valid_sources[0x3f]	57021	1			T5	13		T6	3		T7	1
valid_sources[0x40]	48477	1			T1	8		T5	24		T6	1
valid_sources[0x41]	50453	1			T1	3		T7	5		T12	5
valid_sources[0x42]	51872	1			T5	6		T7	2		T12	4
valid_sources[0x43]	56408	1			T1	1		T5	20		T6	3
valid_sources[0x44]	59970	1			T5	14		T6	4		T11	1
valid_sources[0x45]	49542	1			T1	1		T5	19		T6	4
valid_sources[0x46]	60544	1			T1	8		T5	1		T6	2
valid_sources[0x47]	55765	1			T1	15		T5	7		T6	3
valid_sources[0x48]	54066	1			T1	5		T5	10		T6	3
valid_sources[0x49]	47687	1			T1	9		T5	5		T6	6
valid_sources[0x4a]	65334	1			T1	5		T6	3		T11	5
valid_sources[0x4b]	49095	1			T6	1		T7	1		T13	1
valid_sources[0x4c]	61450	1			T1	1		T5	17		T6	1
valid_sources[0x4d]	53155	1			T1	12		T5	10		T6	3
valid_sources[0x4e]	59103	1			T5	5		T6	4		T7	1
valid_sources[0x4f]	50817	1			T1	4		T5	6		T6	4
valid_sources[0x50]	50679	1			T1	7		T6	1		T7	6
valid_sources[0x51]	51093	1			T5	12		T6	3		T7	2
valid_sources[0x52]	62642	1			T1	4		T5	15		T6	1
valid_sources[0x53]	57389	1			T1	4		T6	3		T11	2
valid_sources[0x54]	55050	1			T1	3		T5	28		T6	4
valid_sources[0x55]	161763	1			T1	2		T5	16		T6	5
valid_sources[0x56]	48403	1			T1	8		T5	27		T6	2
valid_sources[0x57]	48865	1			T1	6		T5	20		T6	1
valid_sources[0x58]	50749	1			T1	1		T5	1		T6	1
valid_sources[0x59]	51418	1			T1	9		T5	37		T6	1
valid_sources[0x5a]	50755	1			T1	4		T5	12		T7	1
valid_sources[0x5b]	51162	1			T1	13		T5	12		T6	2
valid_sources[0x5c]	49094	1			T5	1		T6	3		T7	5
valid_sources[0x5d]	48885	1			T1	11		T5	59		T7	2
valid_sources[0x5e]	75478	1			T1	13		T5	6		T6	1
valid_sources[0x5f]	50127	1			T1	4		T6	1		T12	2
valid_sources[0x60]	51993	1			T1	4		T13	2		T8	238
valid_sources[0x61]	52613	1			T1	12		T5	4		T6	5
valid_sources[0x62]	55588	1			T1	5		T5	7		T6	2
valid_sources[0x63]	50498	1			T1	3		T5	7		T6	1
valid_sources[0x64]	64676	1			T1	7		T5	3		T6	2
valid_sources[0x65]	62068	1			T5	3		T6	6		T12	1
valid_sources[0x66]	55059	1			T1	7		T5	1		T6	2
valid_sources[0x67]	53524	1			T1	1		T5	21		T6	1
valid_sources[0x68]	50210	1			T1	11		T6	3		T11	24
valid_sources[0x69]	50081	1			T1	9		T5	20		T6	7
valid_sources[0x6a]	66464	1			T1	6		T5	5		T6	1
valid_sources[0x6b]	53222	1			T1	3		T6	3		T12	5
valid_sources[0x6c]	48900	1			T1	9		T5	2		T6	1
valid_sources[0x6d]	53201	1			T1	6		T5	46		T6	2
valid_sources[0x6e]	60135	1			T1	9		T5	59		T6	4
valid_sources[0x6f]	49798	1			T1	17		T5	11		T6	5
valid_sources[0x70]	49117	1			T1	4		T5	45		T6	5
valid_sources[0x71]	56352	1			T1	4		T5	9		T6	5
valid_sources[0x72]	59108	1			T5	8		T6	2		T7	1
valid_sources[0x73]	49833	1			T1	2		T5	3		T6	3
valid_sources[0x74]	48990	1			T1	1		T6	3		T7	6
valid_sources[0x75]	51807	1			T1	8		T5	29		T6	1
valid_sources[0x76]	54132	1			T1	2		T5	7		T6	3
valid_sources[0x77]	49411	1			T1	7		T5	9		T6	3
valid_sources[0x78]	50144	1			T1	6		T5	33		T6	4
valid_sources[0x79]	49425	1			T1	8		T6	1		T7	7
valid_sources[0x7a]	61916	1			T1	16		T5	3		T6	4
valid_sources[0x7b]	52885	1			T1	8		T5	22		T6	1
valid_sources[0x7c]	52277	1			T1	4		T5	4		T6	5
valid_sources[0x7d]	47925	1			T1	10		T5	6		T6	2
valid_sources[0x7e]	104053	1			T1	12		T5	27		T6	4
valid_sources[0x7f]	57375	1			T1	6		T6	3		T11	2
valid_sources[0x80]	51014	1			T1	4		T5	2		T6	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

3436360

1

T1

317

T2

172

T3

1131

values[0x0]

all_enables

biggest_size

1973290

1

T1

34

T2

25

T3

105

values[0x1]

all_enables

biggest_size

1892346

1

T1

23

T2

18

T3

75

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	255923	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

9302219

1

T1

20

T2

20

T3

200

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	2376729	1			T1	10		T2	10		T3	100
values[0x0]	3487330	1			T1	6		T2	5		T3	49
values[0x1]	3694083	1			T1	4		T2	5		T3	51

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	91662	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

9466480

1

T1

20

T2

20

T3

200

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	36756	1			T11	1		T8	219		T9	304
valid_sources[0x01]	38150	1			T11	3		T8	193		T9	291
valid_sources[0x02]	38966	1			T11	3		T8	192		T9	230
valid_sources[0x03]	36817	1			T2	2		T8	206		T9	262
valid_sources[0x04]	36962	1			T8	192		T9	258		T10	358
valid_sources[0x05]	37419	1			T2	2		T8	205		T9	368
valid_sources[0x06]	37002	1			T11	1		T8	235		T9	273
valid_sources[0x07]	38238	1			T11	1		T8	253		T9	179
valid_sources[0x08]	38511	1			T1	1		T11	2		T8	213
valid_sources[0x09]	36752	1			T8	233		T9	151		T10	398
valid_sources[0x0a]	37766	1			T11	2		T8	208		T9	72
valid_sources[0x0b]	38815	1			T1	2		T11	2		T8	242
valid_sources[0x0c]	37450	1			T11	2		T8	178		T9	421
valid_sources[0x0d]	37541	1			T8	229		T9	167		T104	2
valid_sources[0x0e]	40759	1			T8	212		T9	436		T10	401
valid_sources[0x0f]	37691	1			T11	1		T8	226		T9	240
valid_sources[0x10]	38081	1			T8	165		T9	461		T10	352
valid_sources[0x11]	38928	1			T2	1		T8	202		T9	342
valid_sources[0x12]	38536	1			T11	1		T8	211		T9	564
valid_sources[0x13]	36723	1			T8	197		T9	248		T10	409
valid_sources[0x14]	35770	1			T8	210		T9	479		T10	387
valid_sources[0x15]	36433	1			T8	251		T9	221		T10	382
valid_sources[0x16]	35935	1			T8	258		T9	388		T10	379
valid_sources[0x17]	37938	1			T11	2		T8	218		T9	442
valid_sources[0x18]	36142	1			T8	172		T9	258		T10	401
valid_sources[0x19]	38502	1			T8	213		T9	58		T10	394
valid_sources[0x1a]	38664	1			T11	1		T8	273		T9	231
valid_sources[0x1b]	36832	1			T11	3		T8	175		T9	285
valid_sources[0x1c]	38021	1			T11	2		T8	240		T9	175
valid_sources[0x1d]	37139	1			T8	178		T9	68		T10	409
valid_sources[0x1e]	37827	1			T11	1		T8	215		T9	136
valid_sources[0x1f]	37823	1			T8	270		T9	124		T10	362
valid_sources[0x20]	36769	1			T8	260		T9	187		T10	380
valid_sources[0x21]	37766	1			T8	213		T9	314		T104	1
valid_sources[0x22]	37128	1			T11	1		T8	260		T9	544
valid_sources[0x23]	38074	1			T3	200		T11	1		T8	196
valid_sources[0x24]	36057	1			T11	1		T8	232		T9	415
valid_sources[0x25]	37197	1			T11	2		T8	214		T9	315
valid_sources[0x26]	35795	1			T11	1		T8	229		T9	357
valid_sources[0x27]	37007	1			T1	2		T11	1		T8	216
valid_sources[0x28]	35461	1			T8	196		T9	126		T10	412
valid_sources[0x29]	37154	1			T8	238		T9	264		T10	395
valid_sources[0x2a]	37529	1			T11	2		T8	246		T9	257
valid_sources[0x2b]	38696	1			T11	1		T8	219		T9	226
valid_sources[0x2c]	38905	1			T11	2		T8	276		T9	358
valid_sources[0x2d]	37701	1			T8	221		T9	326		T10	383
valid_sources[0x2e]	38363	1			T11	2		T8	202		T9	500
valid_sources[0x2f]	39832	1			T11	1		T8	224		T9	310
valid_sources[0x30]	38152	1			T8	224		T9	254		T10	357
valid_sources[0x31]	36507	1			T5	1		T11	1		T8	277
valid_sources[0x32]	39172	1			T8	222		T9	355		T10	397
valid_sources[0x33]	37933	1			T11	1		T8	234		T9	255
valid_sources[0x34]	37486	1			T11	1		T8	238		T9	285
valid_sources[0x35]	36609	1			T11	2		T8	176		T9	394
valid_sources[0x36]	36226	1			T11	2		T8	215		T9	266
valid_sources[0x37]	34659	1			T11	2		T8	206		T9	66
valid_sources[0x38]	37318	1			T11	1		T8	177		T9	297
valid_sources[0x39]	36875	1			T8	253		T9	448		T10	376
valid_sources[0x3a]	38460	1			T11	1		T8	205		T9	482
valid_sources[0x3b]	37765	1			T11	2		T8	231		T9	160
valid_sources[0x3c]	36717	1			T1	7		T8	205		T9	295
valid_sources[0x3d]	37695	1			T8	233		T9	412		T10	342
valid_sources[0x3e]	37826	1			T11	2		T8	201		T9	93
valid_sources[0x3f]	36145	1			T8	219		T9	409		T10	398
valid_sources[0x40]	38589	1			T8	205		T9	214		T10	408
valid_sources[0x41]	38697	1			T1	1		T5	2		T11	1
valid_sources[0x42]	36089	1			T8	195		T9	211		T10	430
valid_sources[0x43]	36562	1			T11	2		T8	203		T9	238
valid_sources[0x44]	37314	1			T8	244		T9	259		T10	357
valid_sources[0x45]	38935	1			T8	220		T9	639		T104	2
valid_sources[0x46]	38623	1			T8	206		T9	423		T10	359
valid_sources[0x47]	37052	1			T11	1		T8	206		T9	379
valid_sources[0x48]	38170	1			T11	1		T8	213		T9	584
valid_sources[0x49]	36515	1			T11	1		T8	218		T9	277
valid_sources[0x4a]	36960	1			T8	212		T9	121		T104	1
valid_sources[0x4b]	38938	1			T2	1		T8	213		T9	168
valid_sources[0x4c]	38015	1			T11	1		T8	208		T9	343
valid_sources[0x4d]	37408	1			T8	266		T9	289		T10	412
valid_sources[0x4e]	38227	1			T11	3		T8	300		T9	57
valid_sources[0x4f]	37903	1			T11	2		T8	233		T9	224
valid_sources[0x50]	34712	1			T11	1		T8	202		T9	165
valid_sources[0x51]	37729	1			T11	3		T8	193		T9	351
valid_sources[0x52]	36601	1			T8	216		T9	345		T10	361
valid_sources[0x53]	37114	1			T11	2		T8	224		T9	251
valid_sources[0x54]	35724	1			T1	1		T11	2		T8	229
valid_sources[0x55]	37491	1			T8	210		T9	14		T104	2
valid_sources[0x56]	36505	1			T11	2		T8	216		T9	221
valid_sources[0x57]	36149	1			T8	190		T9	348		T10	416
valid_sources[0x58]	35942	1			T8	213		T9	82		T10	369
valid_sources[0x59]	37068	1			T2	1		T8	213		T9	315
valid_sources[0x5a]	36598	1			T8	205		T9	271		T10	402
valid_sources[0x5b]	36693	1			T11	2		T8	253		T9	304
valid_sources[0x5c]	37649	1			T8	218		T9	477		T10	384
valid_sources[0x5d]	38678	1			T8	266		T9	258		T10	412
valid_sources[0x5e]	38118	1			T11	1		T8	213		T9	300
valid_sources[0x5f]	38601	1			T8	252		T9	351		T10	441
valid_sources[0x60]	37193	1			T11	2		T8	198		T9	222
valid_sources[0x61]	38116	1			T8	188		T9	404		T10	414
valid_sources[0x62]	36025	1			T11	2		T8	253		T9	248
valid_sources[0x63]	36827	1			T11	2		T8	230		T9	222
valid_sources[0x64]	36479	1			T8	227		T9	223		T10	357
valid_sources[0x65]	36494	1			T8	215		T9	311		T10	398
valid_sources[0x66]	37218	1			T8	194		T9	286		T104	1
valid_sources[0x67]	36298	1			T8	248		T9	257		T10	414
valid_sources[0x68]	37484	1			T2	1		T8	195		T9	221
valid_sources[0x69]	37675	1			T11	2		T8	211		T9	99
valid_sources[0x6a]	37455	1			T11	2		T8	271		T9	611
valid_sources[0x6b]	37882	1			T2	2		T11	1		T8	223
valid_sources[0x6c]	38694	1			T11	1		T8	218		T9	456
valid_sources[0x6d]	37270	1			T11	1		T8	225		T9	116
valid_sources[0x6e]	38911	1			T11	1		T8	210		T9	65
valid_sources[0x6f]	37886	1			T8	211		T9	215		T10	434
valid_sources[0x70]	38028	1			T8	176		T9	105		T10	352
valid_sources[0x71]	37217	1			T11	1		T8	194		T9	214
valid_sources[0x72]	37450	1			T11	1		T8	202		T9	424
valid_sources[0x73]	36735	1			T8	199		T9	155		T10	341
valid_sources[0x74]	37873	1			T11	2		T8	215		T9	248
valid_sources[0x75]	36644	1			T11	1		T8	178		T9	224
valid_sources[0x76]	38526	1			T8	207		T9	147		T10	383
valid_sources[0x77]	37453	1			T11	3		T8	203		T9	467
valid_sources[0x78]	37996	1			T8	228		T9	661		T104	2
valid_sources[0x79]	36879	1			T11	1		T8	196		T9	241
valid_sources[0x7a]	35780	1			T8	203		T9	274		T10	379
valid_sources[0x7b]	38177	1			T8	161		T9	483		T10	399
valid_sources[0x7c]	36752	1			T11	1		T8	171		T9	405
valid_sources[0x7d]	37138	1			T8	190		T9	352		T10	378
valid_sources[0x7e]	38036	1			T11	2		T8	210		T9	250
valid_sources[0x7f]	36722	1			T8	225		T9	299		T10	384
valid_sources[0x80]	35756	1			T8	205		T9	170		T104	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

2364081

1

T1

10

T2

10

T3

100

values[0x0]

all_enables

biggest_size

3469583

1

T1

6

T2

5

T3

49

values[0x1]

all_enables

biggest_size

3468555

1

T1

4

T2

5

T3

51