Unified Coverage Report :: Module :: otp_ctrl_core_csr_assert_fpv

Module : otp_ctrl_core_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_otp_ctrl_csr_assert_0/otp_ctrl_core_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.otp_ctrl_core_csr_assert	100.00						100.00

---

Module Instance : tb.dut.otp_ctrl_core_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
96.19	94.16	96.15	97.02		96.43	97.18	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : otp_ctrl_core_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	15	15	100.00	15	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	15	15	100.00	15	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	480072372	8343922	0	0
check_regwen_rd_A	480072372	4566	0	0
check_timeout_rd_A	480072372	3701	0	0
check_trigger_regwen_rd_A	480072372	4351	0	0
consistency_check_period_rd_A	480072372	4619	0	0
creator_sw_cfg_read_lock_rd_A	480072372	3540	0	0
direct_access_address_rd_A	480072372	2507	0	0
direct_access_wdata_0_rd_A	480072372	1592	0	0
direct_access_wdata_1_rd_A	480072372	1988	0	0
integrity_check_period_rd_A	480072372	4424	0	0
intr_enable_rd_A	480072372	5331	0	0
owner_sw_cfg_read_lock_rd_A	480072372	3140	0	0
rot_creator_auth_codesign_read_lock_rd_A	480072372	3504	0	0
rot_creator_auth_state_read_lock_rd_A	480072372	3077	0	0
vendor_test_read_lock_rd_A	480072372	3070	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	480072372	8343922	0	0
T8	240994	50723	0	0
T9	465048	61961	0	0
T10	294643	86958	0	0
T17	9363	0	0	0
T30	0	276386	0	0
T31	0	50111	0	0
T36	40561	0	0	0
T37	37452	0	0	0
T101	4051	0	0	0
T103	11634	0	0	0
T104	41809	0	0	0
T112	9988	0	0	0
T123	0	30493	0	0
T206	0	42087	0	0
T229	0	95204	0	0
T242	0	49729	0	0
T247	0	119201	0	0

check_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	480072372	4566	0	0
T64	12389	0	0	0
T201	52778	0	0	0
T206	0	63	0	0
T225	115169	0	0	0
T237	35505	0	0	0
T242	469720	30	0	0
T248	43964	0	0	0
T266	15630	0	0	0
T267	10043	0	0	0
T268	67403	0	0	0
T269	13021	0	0	0
T272	0	133	0	0
T274	0	115	0	0
T275	0	19	0	0
T337	0	69	0	0
T338	0	245	0	0
T339	0	34	0	0
T340	0	182	0	0
T341	0	49	0	0

check_timeout_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	480072372	3701	0	0
T64	12389	0	0	0
T201	52778	0	0	0
T206	0	70	0	0
T225	115169	0	0	0
T237	35505	0	0	0
T242	469720	45	0	0
T248	43964	0	0	0
T266	15630	0	0	0
T267	10043	0	0	0
T268	67403	0	0	0
T269	13021	0	0	0
T272	0	256	0	0
T274	0	143	0	0
T275	0	47	0	0
T337	0	120	0	0
T338	0	244	0	0
T339	0	46	0	0
T340	0	207	0	0
T341	0	54	0	0

check_trigger_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	480072372	4351	0	0
T64	12389	0	0	0
T201	52778	0	0	0
T206	0	39	0	0
T225	115169	0	0	0
T237	35505	0	0	0
T242	469720	34	0	0
T248	43964	0	0	0
T266	15630	0	0	0
T267	10043	0	0	0
T268	67403	0	0	0
T269	13021	0	0	0
T272	0	148	0	0
T274	0	86	0	0
T275	0	14	0	0
T337	0	70	0	0
T338	0	130	0	0
T339	0	49	0	0
T340	0	176	0	0
T341	0	43	0	0

consistency_check_period_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	480072372	4619	0	0
T64	12389	0	0	0
T201	52778	0	0	0
T206	0	81	0	0
T225	115169	0	0	0
T237	35505	0	0	0
T242	469720	61	0	0
T248	43964	0	0	0
T266	15630	0	0	0
T267	10043	0	0	0
T268	67403	0	0	0
T269	13021	0	0	0
T272	0	219	0	0
T274	0	93	0	0
T275	0	27	0	0
T337	0	61	0	0
T338	0	134	0	0
T339	0	63	0	0
T340	0	233	0	0
T341	0	78	0	0

creator_sw_cfg_read_lock_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	480072372	3540	0	0
T64	12389	0	0	0
T201	52778	0	0	0
T206	0	44	0	0
T225	115169	0	0	0
T237	35505	0	0	0
T242	469720	54	0	0
T248	43964	0	0	0
T266	15630	0	0	0
T267	10043	0	0	0
T268	67403	0	0	0
T269	13021	0	0	0
T272	0	208	0	0
T274	0	93	0	0
T275	0	33	0	0
T337	0	117	0	0
T338	0	233	0	0
T339	0	38	0	0
T340	0	206	0	0
T341	0	43	0	0

direct_access_address_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	480072372	2507	0	0
T64	12389	0	0	0
T201	52778	0	0	0
T206	0	46	0	0
T225	115169	0	0	0
T237	35505	0	0	0
T242	469720	27	0	0
T248	43964	0	0	0
T266	15630	0	0	0
T267	10043	0	0	0
T268	67403	0	0	0
T269	13021	0	0	0
T272	0	154	0	0
T274	0	116	0	0
T275	0	26	0	0
T337	0	39	0	0
T338	0	145	0	0
T339	0	51	0	0
T340	0	228	0	0
T341	0	58	0	0

direct_access_wdata_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	480072372	1592	0	0
T64	12389	0	0	0
T201	52778	0	0	0
T206	0	24	0	0
T225	115169	0	0	0
T237	35505	0	0	0
T242	469720	28	0	0
T248	43964	0	0	0
T266	15630	0	0	0
T267	10043	0	0	0
T268	67403	0	0	0
T269	13021	0	0	0
T272	0	167	0	0
T274	0	79	0	0
T275	0	38	0	0
T337	0	47	0	0
T338	0	177	0	0
T339	0	27	0	0
T340	0	77	0	0
T341	0	23	0	0

direct_access_wdata_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	480072372	1988	0	0
T64	12389	0	0	0
T201	52778	0	0	0
T206	0	72	0	0
T225	115169	0	0	0
T237	35505	0	0	0
T242	469720	10	0	0
T248	43964	0	0	0
T266	15630	0	0	0
T267	10043	0	0	0
T268	67403	0	0	0
T269	13021	0	0	0
T272	0	192	0	0
T274	0	90	0	0
T275	0	35	0	0
T337	0	94	0	0
T338	0	146	0	0
T339	0	30	0	0
T340	0	115	0	0
T341	0	39	0	0

integrity_check_period_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	480072372	4424	0	0
T64	12389	0	0	0
T201	52778	0	0	0
T206	0	74	0	0
T225	115169	0	0	0
T237	35505	0	0	0
T242	469720	53	0	0
T248	43964	0	0	0
T266	15630	0	0	0
T267	10043	0	0	0
T268	67403	0	0	0
T269	13021	0	0	0
T272	0	139	0	0
T274	0	96	0	0
T275	0	45	0	0
T337	0	99	0	0
T338	0	140	0	0
T339	0	46	0	0
T340	0	209	0	0
T341	0	67	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	480072372	5331	0	0
T31	211756	0	0	0
T73	706860	33	0	0
T135	96179	0	0	0
T153	13946	0	0	0
T163	54863	0	0	0
T169	22174	0	0	0
T192	10531	0	0	0
T206	0	49	0	0
T210	19281	0	0	0
T242	0	27	0	0
T262	4046	0	0	0
T263	22249	0	0	0
T272	0	175	0	0
T274	0	150	0	0
T337	0	46	0	0
T338	0	172	0	0
T339	0	34	0	0
T340	0	190	0	0
T342	0	55	0	0

owner_sw_cfg_read_lock_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	480072372	3140	0	0
T64	12389	0	0	0
T201	52778	0	0	0
T206	0	79	0	0
T225	115169	0	0	0
T237	35505	0	0	0
T242	469720	32	0	0
T248	43964	0	0	0
T266	15630	0	0	0
T267	10043	0	0	0
T268	67403	0	0	0
T269	13021	0	0	0
T272	0	142	0	0
T274	0	102	0	0
T275	0	25	0	0
T337	0	57	0	0
T338	0	110	0	0
T339	0	35	0	0
T340	0	193	0	0
T341	0	52	0	0

rot_creator_auth_codesign_read_lock_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	480072372	3504	0	0
T64	12389	0	0	0
T201	52778	0	0	0
T206	0	67	0	0
T225	115169	0	0	0
T237	35505	0	0	0
T242	469720	24	0	0
T248	43964	0	0	0
T266	15630	0	0	0
T267	10043	0	0	0
T268	67403	0	0	0
T269	13021	0	0	0
T272	0	202	0	0
T274	0	114	0	0
T275	0	45	0	0
T337	0	52	0	0
T338	0	181	0	0
T339	0	64	0	0
T340	0	272	0	0
T341	0	58	0	0

rot_creator_auth_state_read_lock_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	480072372	3077	0	0
T64	12389	0	0	0
T201	52778	0	0	0
T206	0	55	0	0
T225	115169	0	0	0
T237	35505	0	0	0
T242	469720	7	0	0
T248	43964	0	0	0
T266	15630	0	0	0
T267	10043	0	0	0
T268	67403	0	0	0
T269	13021	0	0	0
T272	0	141	0	0
T274	0	116	0	0
T275	0	33	0	0
T337	0	39	0	0
T338	0	153	0	0
T339	0	33	0	0
T340	0	174	0	0
T341	0	22	0	0

vendor_test_read_lock_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	480072372	3070	0	0
T64	12389	0	0	0
T201	52778	0	0	0
T206	0	48	0	0
T225	115169	0	0	0
T237	35505	0	0	0
T242	469720	30	0	0
T248	43964	0	0	0
T266	15630	0	0	0
T267	10043	0	0	0
T268	67403	0	0	0
T269	13021	0	0	0
T272	0	166	0	0
T274	0	106	0	0
T275	0	11	0	0
T337	0	71	0	0
T338	0	169	0	0
T339	0	40	0	0
T340	0	284	0	0
T341	0	51	0	0