Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	7586605	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

7439151

1

T1

174

T2

239

T3

904

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	8860939	1			T1	317		T2	668		T3	2020
values[0x0]	2356630	1			T1	115		T2	156		T3	129
values[0x1]	3808187	1			T1	90		T2	139		T3	141

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	4959363	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

10066393

1

T1

275

T2

426

T3

1240

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	76231	1			T3	10		T6	28		T10	6
valid_sources[0x01]	59978	1			T1	2		T3	17		T6	36
valid_sources[0x02]	54095	1			T1	2		T3	10		T6	25
valid_sources[0x03]	51969	1			T1	6		T3	8		T6	27
valid_sources[0x04]	53746	1			T1	5		T3	9		T6	29
valid_sources[0x05]	53840	1			T1	2		T3	13		T6	29
valid_sources[0x06]	53116	1			T1	4		T3	6		T6	52
valid_sources[0x07]	70042	1			T1	2		T3	8		T6	31
valid_sources[0x08]	53156	1			T1	1		T3	13		T6	23
valid_sources[0x09]	56910	1			T1	2		T3	11		T6	22
valid_sources[0x0a]	62958	1			T1	2		T3	16		T6	39
valid_sources[0x0b]	112227	1			T1	1		T3	6		T6	34
valid_sources[0x0c]	59671	1			T3	9		T6	47		T10	13
valid_sources[0x0d]	53248	1			T1	2		T3	12		T6	17
valid_sources[0x0e]	60098	1			T1	3		T3	6		T6	23
valid_sources[0x0f]	53252	1			T1	2		T3	10		T6	36
valid_sources[0x10]	56959	1			T1	6		T3	6		T6	27
valid_sources[0x11]	54465	1			T1	2		T3	7		T6	22
valid_sources[0x12]	51055	1			T3	8		T6	21		T9	5
valid_sources[0x13]	75902	1			T1	3		T3	12		T6	41
valid_sources[0x14]	60181	1			T3	12		T6	34		T9	1
valid_sources[0x15]	53768	1			T1	1		T3	7		T6	36
valid_sources[0x16]	56266	1			T1	1		T3	6		T6	21
valid_sources[0x17]	50782	1			T3	10		T6	46		T9	2
valid_sources[0x18]	53484	1			T1	1		T3	10		T6	36
valid_sources[0x19]	58614	1			T1	1		T3	9		T6	41
valid_sources[0x1a]	53241	1			T1	3		T3	8		T6	36
valid_sources[0x1b]	50102	1			T1	1		T3	5		T6	47
valid_sources[0x1c]	58961	1			T1	1		T3	11		T6	21
valid_sources[0x1d]	62287	1			T1	1		T3	3		T6	30
valid_sources[0x1e]	52543	1			T1	3		T3	6		T6	31
valid_sources[0x1f]	121639	1			T1	4		T3	5		T6	35
valid_sources[0x20]	77799	1			T1	1		T3	10		T6	29
valid_sources[0x21]	52412	1			T1	2		T3	11		T6	30
valid_sources[0x22]	52396	1			T1	2		T3	7		T6	27
valid_sources[0x23]	52545	1			T1	1		T3	4		T6	19
valid_sources[0x24]	50959	1			T1	5		T3	10		T6	35
valid_sources[0x25]	52193	1			T1	4		T3	9		T6	29
valid_sources[0x26]	67228	1			T3	7		T6	39		T10	1
valid_sources[0x27]	57225	1			T1	1		T3	4		T6	39
valid_sources[0x28]	121857	1			T3	12		T6	24		T9	1
valid_sources[0x29]	78408	1			T1	2		T3	16		T6	19
valid_sources[0x2a]	54038	1			T1	3		T3	6		T6	32
valid_sources[0x2b]	52212	1			T1	2		T3	8		T6	29
valid_sources[0x2c]	58095	1			T1	2		T3	5		T6	34
valid_sources[0x2d]	55191	1			T1	5		T3	16		T6	30
valid_sources[0x2e]	51349	1			T1	3		T3	6		T6	31
valid_sources[0x2f]	51169	1			T1	4		T3	7		T6	54
valid_sources[0x30]	55227	1			T1	6		T3	8		T6	28
valid_sources[0x31]	57269	1			T1	1		T3	8		T6	33
valid_sources[0x32]	56050	1			T1	2		T3	11		T6	30
valid_sources[0x33]	66631	1			T1	1		T3	15		T6	44
valid_sources[0x34]	54139	1			T1	3		T3	6		T6	33
valid_sources[0x35]	50924	1			T1	2		T3	7		T6	38
valid_sources[0x36]	50428	1			T1	2		T3	8		T6	41
valid_sources[0x37]	62935	1			T1	2		T3	12		T6	16
valid_sources[0x38]	58220	1			T1	1		T3	4		T6	29
valid_sources[0x39]	51514	1			T1	1		T3	10		T6	39
valid_sources[0x3a]	53714	1			T1	6		T3	8		T6	20
valid_sources[0x3b]	50740	1			T1	2		T3	10		T6	35
valid_sources[0x3c]	61836	1			T1	5		T3	12		T6	45
valid_sources[0x3d]	56393	1			T1	2		T3	7		T6	29
valid_sources[0x3e]	59647	1			T1	1		T3	5		T6	46
valid_sources[0x3f]	60719	1			T1	5		T3	15		T6	39
valid_sources[0x40]	54013	1			T3	12		T6	27		T9	3
valid_sources[0x41]	64465	1			T1	2		T3	9		T6	34
valid_sources[0x42]	52831	1			T1	4		T3	9		T6	48
valid_sources[0x43]	53559	1			T3	10		T6	23		T10	2
valid_sources[0x44]	52840	1			T1	4		T3	5		T6	26
valid_sources[0x45]	54253	1			T3	6		T6	39		T10	15
valid_sources[0x46]	54042	1			T1	1		T3	9		T6	24
valid_sources[0x47]	54844	1			T1	2		T3	10		T6	33
valid_sources[0x48]	54416	1			T1	4		T3	14		T6	21
valid_sources[0x49]	56695	1			T1	5		T3	12		T6	30
valid_sources[0x4a]	50118	1			T1	1		T3	12		T6	40
valid_sources[0x4b]	52921	1			T1	1		T3	14		T6	28
valid_sources[0x4c]	50085	1			T1	3		T3	10		T6	33
valid_sources[0x4d]	53852	1			T1	1		T3	5		T6	21
valid_sources[0x4e]	62468	1			T3	1		T6	21		T9	1
valid_sources[0x4f]	75021	1			T1	4		T3	7		T6	24
valid_sources[0x50]	64549	1			T1	1		T3	15		T6	35
valid_sources[0x51]	65096	1			T1	1		T3	10		T6	28
valid_sources[0x52]	62037	1			T1	2		T3	5		T6	47
valid_sources[0x53]	53872	1			T1	1		T3	7		T6	32
valid_sources[0x54]	56684	1			T1	2		T3	9		T6	33
valid_sources[0x55]	52842	1			T1	1		T3	12		T6	35
valid_sources[0x56]	60290	1			T1	3		T3	7		T6	20
valid_sources[0x57]	49779	1			T1	4		T3	7		T6	31
valid_sources[0x58]	54612	1			T1	2		T3	11		T6	33
valid_sources[0x59]	57005	1			T1	2		T3	7		T6	25
valid_sources[0x5a]	62965	1			T3	6		T6	21		T9	3
valid_sources[0x5b]	119516	1			T3	13		T6	41		T9	1
valid_sources[0x5c]	57386	1			T1	1		T3	6		T6	40
valid_sources[0x5d]	54320	1			T1	1		T3	13		T6	39
valid_sources[0x5e]	53052	1			T1	3		T3	9		T6	40
valid_sources[0x5f]	54246	1			T3	9		T6	37		T10	7
valid_sources[0x60]	62133	1			T1	1		T3	7		T6	28
valid_sources[0x61]	51997	1			T3	9		T6	23		T9	4
valid_sources[0x62]	49512	1			T1	3		T3	7		T6	54
valid_sources[0x63]	58668	1			T1	1		T3	13		T6	42
valid_sources[0x64]	52144	1			T1	1		T2	963		T3	6
valid_sources[0x65]	53482	1			T3	11		T6	34		T10	7
valid_sources[0x66]	51462	1			T3	7		T6	28		T10	4
valid_sources[0x67]	58303	1			T1	9		T3	9		T6	24
valid_sources[0x68]	51684	1			T3	5		T6	36		T9	1
valid_sources[0x69]	62633	1			T3	10		T6	30		T9	2
valid_sources[0x6a]	63895	1			T3	13		T6	42		T9	2
valid_sources[0x6b]	50651	1			T1	2		T3	9		T6	32
valid_sources[0x6c]	53292	1			T1	1		T3	10		T6	26
valid_sources[0x6d]	54530	1			T1	3		T3	4		T6	28
valid_sources[0x6e]	57085	1			T1	1		T3	14		T6	26
valid_sources[0x6f]	52149	1			T1	4		T3	7		T6	40
valid_sources[0x70]	60826	1			T1	1		T3	8		T6	29
valid_sources[0x71]	64301	1			T1	3		T3	10		T6	25
valid_sources[0x72]	53542	1			T1	4		T3	10		T6	40
valid_sources[0x73]	54339	1			T1	3		T3	2		T6	28
valid_sources[0x74]	55189	1			T3	10		T6	41		T10	12
valid_sources[0x75]	55425	1			T3	9		T6	32		T9	1
valid_sources[0x76]	51460	1			T3	11		T6	19		T10	16
valid_sources[0x77]	52817	1			T1	1		T3	12		T6	29
valid_sources[0x78]	52977	1			T1	1		T3	8		T6	22
valid_sources[0x79]	54840	1			T1	3		T3	9		T6	29
valid_sources[0x7a]	66320	1			T1	3		T3	13		T6	23
valid_sources[0x7b]	54321	1			T1	3		T3	6		T6	32
valid_sources[0x7c]	52376	1			T1	2		T3	13		T6	34
valid_sources[0x7d]	55462	1			T1	1		T3	7		T6	34
valid_sources[0x7e]	52586	1			T1	4		T3	18		T6	32
valid_sources[0x7f]	60719	1			T1	2		T3	14		T6	32
valid_sources[0x80]	51002	1			T1	3		T3	9		T6	28

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

3639298

1

T1

75

T2

104

T3

794

values[0x0]

all_enables

biggest_size

1941542

1

T1

59

T2

81

T3

60

values[0x1]

all_enables

biggest_size

1858311

1

T1

40

T2

54

T3

50

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	250432	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

9010117

1

T3

40

T6

20

T10

60

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	2305760	1			T3	20		T6	10		T10	30
values[0x0]	3375001	1			T3	12		T6	4		T10	14
values[0x1]	3579788	1			T3	8		T6	6		T10	16

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	90897	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

9169652

1

T3

40

T6

20

T10

60

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	36175	1			T5	1		T33	4		T7	775
valid_sources[0x01]	37630	1			T12	1		T7	761		T8	224
valid_sources[0x02]	35664	1			T13	1		T5	1		T7	760
valid_sources[0x03]	36985	1			T10	3		T7	694		T40	1
valid_sources[0x04]	35211	1			T13	1		T7	775		T8	262
valid_sources[0x05]	36518	1			T7	736		T8	272		T14	619
valid_sources[0x06]	36724	1			T12	1		T13	2		T7	753
valid_sources[0x07]	37206	1			T12	1		T7	694		T8	126
valid_sources[0x08]	36131	1			T12	1		T7	759		T8	222
valid_sources[0x09]	37176	1			T7	714		T8	240		T14	626
valid_sources[0x0a]	35119	1			T3	3		T12	2		T13	1
valid_sources[0x0b]	34392	1			T3	3		T122	7		T7	720
valid_sources[0x0c]	39186	1			T3	1		T12	2		T7	714
valid_sources[0x0d]	35839	1			T10	1		T33	1		T7	771
valid_sources[0x0e]	36092	1			T3	1		T13	1		T7	765
valid_sources[0x0f]	36083	1			T7	694		T120	2		T8	427
valid_sources[0x10]	36980	1			T13	1		T7	719		T8	228
valid_sources[0x11]	37945	1			T10	1		T13	1		T5	1
valid_sources[0x12]	36066	1			T12	1		T13	1		T5	1
valid_sources[0x13]	35433	1			T4	7		T7	698		T8	230
valid_sources[0x14]	37512	1			T7	681		T8	257		T14	607
valid_sources[0x15]	35738	1			T7	776		T40	5		T8	261
valid_sources[0x16]	36992	1			T13	3		T33	1		T7	753
valid_sources[0x17]	36646	1			T7	750		T40	1		T8	227
valid_sources[0x18]	35610	1			T7	769		T8	189		T14	628
valid_sources[0x19]	36485	1			T13	1		T5	1		T7	726
valid_sources[0x1a]	34552	1			T10	1		T7	737		T8	155
valid_sources[0x1b]	35524	1			T122	1		T7	699		T8	306
valid_sources[0x1c]	37095	1			T5	1		T7	751		T40	1
valid_sources[0x1d]	34838	1			T10	2		T7	772		T8	205
valid_sources[0x1e]	36115	1			T12	1		T7	680		T8	215
valid_sources[0x1f]	36121	1			T5	1		T7	745		T120	2
valid_sources[0x20]	35301	1			T10	1		T33	2		T7	791
valid_sources[0x21]	34306	1			T4	1		T13	1		T5	2
valid_sources[0x22]	35812	1			T3	1		T7	753		T8	185
valid_sources[0x23]	34811	1			T7	727		T8	287		T14	582
valid_sources[0x24]	36416	1			T7	726		T8	194		T14	644
valid_sources[0x25]	36082	1			T5	1		T7	759		T8	215
valid_sources[0x26]	35195	1			T13	1		T7	749		T8	247
valid_sources[0x27]	35752	1			T7	742		T8	316		T14	597
valid_sources[0x28]	36862	1			T12	1		T7	757		T18	1
valid_sources[0x29]	34991	1			T13	1		T7	704		T18	2
valid_sources[0x2a]	36852	1			T13	1		T7	761		T18	2
valid_sources[0x2b]	36294	1			T7	755		T120	1		T8	320
valid_sources[0x2c]	36489	1			T7	777		T53	100		T8	247
valid_sources[0x2d]	36772	1			T3	1		T12	1		T13	1
valid_sources[0x2e]	35699	1			T13	4		T7	762		T40	1
valid_sources[0x2f]	36901	1			T33	1		T122	17		T7	657
valid_sources[0x30]	35904	1			T13	2		T7	774		T8	304
valid_sources[0x31]	35649	1			T13	1		T5	1		T7	739
valid_sources[0x32]	37196	1			T7	731		T8	236		T14	585
valid_sources[0x33]	37075	1			T5	1		T7	740		T40	2
valid_sources[0x34]	34781	1			T7	780		T120	1		T8	265
valid_sources[0x35]	35712	1			T13	1		T7	740		T8	287
valid_sources[0x36]	36465	1			T10	1		T13	1		T7	745
valid_sources[0x37]	36624	1			T3	1		T10	2		T7	732
valid_sources[0x38]	36175	1			T12	1		T7	753		T8	272
valid_sources[0x39]	35868	1			T13	1		T7	753		T8	269
valid_sources[0x3a]	36149	1			T7	708		T8	209		T14	614
valid_sources[0x3b]	35469	1			T7	754		T8	334		T14	623
valid_sources[0x3c]	35821	1			T10	3		T4	1		T7	701
valid_sources[0x3d]	36426	1			T13	2		T7	707		T18	2
valid_sources[0x3e]	33888	1			T13	3		T7	756		T8	260
valid_sources[0x3f]	35731	1			T13	3		T7	706		T8	231
valid_sources[0x40]	34739	1			T13	1		T122	3		T7	758
valid_sources[0x41]	37333	1			T4	1		T12	1		T7	751
valid_sources[0x42]	36621	1			T3	1		T13	2		T5	1
valid_sources[0x43]	35735	1			T12	1		T13	1		T5	1
valid_sources[0x44]	35552	1			T3	1		T10	2		T7	785
valid_sources[0x45]	35593	1			T7	773		T40	1		T8	237
valid_sources[0x46]	35035	1			T7	775		T8	359		T14	647
valid_sources[0x47]	37003	1			T12	1		T5	2		T7	760
valid_sources[0x48]	37583	1			T7	757		T40	1		T8	262
valid_sources[0x49]	37904	1			T6	2		T13	3		T7	785
valid_sources[0x4a]	36224	1			T3	3		T12	2		T13	1
valid_sources[0x4b]	37336	1			T13	1		T7	730		T8	328
valid_sources[0x4c]	37180	1			T3	1		T10	1		T12	1
valid_sources[0x4d]	37008	1			T13	1		T7	752		T8	261
valid_sources[0x4e]	36790	1			T3	1		T33	3		T7	739
valid_sources[0x4f]	35146	1			T7	766		T8	195		T14	620
valid_sources[0x50]	36001	1			T7	743		T8	278		T14	647
valid_sources[0x51]	34436	1			T13	1		T7	765		T8	298
valid_sources[0x52]	37052	1			T10	1		T7	828		T8	327
valid_sources[0x53]	35034	1			T13	1		T7	688		T120	1
valid_sources[0x54]	35593	1			T13	1		T5	1		T7	814
valid_sources[0x55]	36181	1			T12	1		T13	1		T7	733
valid_sources[0x56]	35620	1			T7	768		T40	1		T8	164
valid_sources[0x57]	36133	1			T13	3		T7	742		T8	298
valid_sources[0x58]	34848	1			T7	809		T8	185		T14	638
valid_sources[0x59]	37326	1			T7	734		T8	191		T14	605
valid_sources[0x5a]	36270	1			T13	1		T33	1		T7	695
valid_sources[0x5b]	37319	1			T7	751		T8	234		T14	615
valid_sources[0x5c]	35580	1			T5	1		T7	703		T8	248
valid_sources[0x5d]	37125	1			T3	1		T13	2		T7	737
valid_sources[0x5e]	35445	1			T3	1		T10	5		T13	1
valid_sources[0x5f]	37323	1			T12	3		T122	20		T7	693
valid_sources[0x60]	34571	1			T12	1		T7	807		T8	186
valid_sources[0x61]	39856	1			T7	729		T8	524		T14	620
valid_sources[0x62]	36763	1			T10	1		T13	2		T7	692
valid_sources[0x63]	36699	1			T13	1		T7	738		T18	1
valid_sources[0x64]	36371	1			T12	2		T5	1		T7	731
valid_sources[0x65]	36972	1			T7	712		T8	216		T14	608
valid_sources[0x66]	36495	1			T5	1		T122	1		T7	716
valid_sources[0x67]	35811	1			T5	1		T7	711		T8	208
valid_sources[0x68]	36597	1			T10	2		T4	1		T13	1
valid_sources[0x69]	35125	1			T7	707		T8	319		T14	624
valid_sources[0x6a]	35948	1			T12	2		T122	1		T7	812
valid_sources[0x6b]	37607	1			T7	769		T8	238		T14	687
valid_sources[0x6c]	35849	1			T33	1		T7	745		T8	208
valid_sources[0x6d]	37856	1			T12	1		T7	739		T8	295
valid_sources[0x6e]	37961	1			T7	698		T8	337		T14	598
valid_sources[0x6f]	35585	1			T13	1		T33	1		T7	722
valid_sources[0x70]	36714	1			T6	16		T13	2		T7	712
valid_sources[0x71]	34200	1			T7	773		T8	313		T14	670
valid_sources[0x72]	37678	1			T10	1		T12	1		T13	2
valid_sources[0x73]	35515	1			T7	724		T40	1		T8	314
valid_sources[0x74]	36752	1			T7	715		T8	254		T14	586
valid_sources[0x75]	36571	1			T5	1		T7	725		T8	166
valid_sources[0x76]	34733	1			T7	722		T8	156		T14	635
valid_sources[0x77]	37892	1			T7	798		T8	268		T14	648
valid_sources[0x78]	34430	1			T13	1		T7	735		T8	211
valid_sources[0x79]	36762	1			T7	754		T8	166		T14	591
valid_sources[0x7a]	36864	1			T7	781		T8	189		T14	599
valid_sources[0x7b]	36603	1			T13	1		T7	716		T8	358
valid_sources[0x7c]	35616	1			T10	1		T13	1		T7	801
valid_sources[0x7d]	35641	1			T3	1		T7	761		T8	413
valid_sources[0x7e]	36160	1			T7	767		T18	1		T8	223
valid_sources[0x7f]	35909	1			T3	1		T13	1		T7	775
valid_sources[0x80]	36122	1			T13	2		T7	685		T8	247

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

2291178

1

T3

20

T6

10

T10

30

values[0x0]

all_enables

biggest_size

3357862

1

T3

12

T6

4

T10

14

values[0x1]

all_enables

biggest_size

3361077

1

T3

8

T6

6

T10

16