Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	6843121	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

6853721

1

T1

24838

T2

810

T3

269

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	7882149	1			T1	12218		T2	1555		T3	952
values[0x0]	2216737	1			T1	9506		T2	125		T3	148
values[0x1]	3597956	1			T1	16741		T2	117		T3	142

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	4432726	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

9264116

1

T1

31796

T2

1035

T3

557

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	56328	1			T1	186		T2	10		T3	3
valid_sources[0x01]	47111	1			T1	159		T2	6		T3	7
valid_sources[0x02]	46132	1			T1	169		T2	6		T3	2
valid_sources[0x03]	47535	1			T1	121		T2	8		T3	6
valid_sources[0x04]	48395	1			T1	158		T2	6		T3	3
valid_sources[0x05]	48939	1			T1	169		T2	6		T3	4
valid_sources[0x06]	52729	1			T1	162		T2	5		T3	6
valid_sources[0x07]	45941	1			T1	150		T2	4		T3	6
valid_sources[0x08]	53835	1			T1	168		T2	10		T3	7
valid_sources[0x09]	49902	1			T1	153		T2	8		T3	3
valid_sources[0x0a]	49825	1			T1	138		T2	10		T3	3
valid_sources[0x0b]	118892	1			T1	142		T2	7		T3	3
valid_sources[0x0c]	47278	1			T1	138		T2	8		T3	6
valid_sources[0x0d]	47584	1			T1	171		T2	5		T3	4
valid_sources[0x0e]	57029	1			T1	173		T2	6		T3	5
valid_sources[0x0f]	46207	1			T1	136		T2	8		T3	7
valid_sources[0x10]	48160	1			T1	119		T2	3		T3	3
valid_sources[0x11]	47948	1			T1	153		T2	9		T3	3
valid_sources[0x12]	58919	1			T1	156		T2	11		T3	3
valid_sources[0x13]	48577	1			T1	168		T2	8		T3	5
valid_sources[0x14]	46571	1			T1	146		T2	18		T3	7
valid_sources[0x15]	48753	1			T1	169		T2	2		T3	6
valid_sources[0x16]	47046	1			T1	105		T2	6		T3	9
valid_sources[0x17]	53680	1			T1	211		T2	5		T3	6
valid_sources[0x18]	72048	1			T1	147		T2	9		T3	3
valid_sources[0x19]	51631	1			T1	157		T2	17		T3	2
valid_sources[0x1a]	65440	1			T1	158		T2	6		T3	6
valid_sources[0x1b]	48170	1			T1	176		T2	3		T3	8
valid_sources[0x1c]	49915	1			T1	120		T2	11		T3	5
valid_sources[0x1d]	49003	1			T1	145		T2	7		T3	7
valid_sources[0x1e]	63389	1			T1	186		T2	10		T3	4
valid_sources[0x1f]	47617	1			T1	151		T2	9		T3	4
valid_sources[0x20]	48128	1			T1	142		T2	3		T3	2
valid_sources[0x21]	56805	1			T1	160		T2	7		T3	2
valid_sources[0x22]	47177	1			T1	171		T2	6		T3	10
valid_sources[0x23]	57439	1			T1	128		T2	4		T3	3
valid_sources[0x24]	65505	1			T1	136		T2	7		T3	8
valid_sources[0x25]	52158	1			T1	150		T2	9		T3	6
valid_sources[0x26]	46295	1			T1	157		T2	9		T3	7
valid_sources[0x27]	49124	1			T1	155		T2	7		T3	11
valid_sources[0x28]	47831	1			T1	158		T2	7		T3	2
valid_sources[0x29]	67041	1			T1	153		T2	7		T3	11
valid_sources[0x2a]	45960	1			T1	207		T2	6		T3	3
valid_sources[0x2b]	48706	1			T1	134		T2	4		T3	9
valid_sources[0x2c]	62540	1			T1	173		T2	7		T3	2
valid_sources[0x2d]	50752	1			T1	148		T2	7		T3	6
valid_sources[0x2e]	48350	1			T1	169		T2	7		T3	4
valid_sources[0x2f]	45617	1			T1	128		T2	4		T3	3
valid_sources[0x30]	53922	1			T1	154		T2	5		T3	5
valid_sources[0x31]	65345	1			T1	131		T2	5		T3	4
valid_sources[0x32]	49769	1			T1	164		T2	12		T3	1
valid_sources[0x33]	47311	1			T1	118		T2	5		T3	10
valid_sources[0x34]	48023	1			T1	136		T2	8		T3	7
valid_sources[0x35]	47275	1			T1	135		T2	12		T3	3
valid_sources[0x36]	48624	1			T1	149		T2	5		T3	1
valid_sources[0x37]	60156	1			T1	126		T2	7		T3	10
valid_sources[0x38]	60915	1			T1	141		T2	5		T3	5
valid_sources[0x39]	49406	1			T1	172		T2	5		T3	8
valid_sources[0x3a]	56667	1			T1	143		T2	6		T3	1
valid_sources[0x3b]	59697	1			T1	148		T2	11		T3	3
valid_sources[0x3c]	49773	1			T1	179		T2	7		T3	2
valid_sources[0x3d]	46659	1			T1	144		T2	6		T3	5
valid_sources[0x3e]	46962	1			T1	131		T2	11		T3	4
valid_sources[0x3f]	46565	1			T1	173		T2	4		T6	26
valid_sources[0x40]	47401	1			T1	163		T2	10		T3	8
valid_sources[0x41]	48082	1			T1	168		T2	5		T3	4
valid_sources[0x42]	47460	1			T1	124		T2	5		T3	2
valid_sources[0x43]	52603	1			T1	162		T2	7		T3	3
valid_sources[0x44]	54619	1			T1	183		T2	18		T3	1
valid_sources[0x45]	46760	1			T1	134		T2	4		T3	4
valid_sources[0x46]	57173	1			T1	169		T2	6		T3	5
valid_sources[0x47]	107116	1			T1	145		T2	9		T3	6
valid_sources[0x48]	51553	1			T1	166		T2	11		T3	7
valid_sources[0x49]	47529	1			T1	134		T2	6		T3	7
valid_sources[0x4a]	53053	1			T1	140		T2	6		T3	6
valid_sources[0x4b]	48109	1			T1	120		T2	5		T3	1
valid_sources[0x4c]	49298	1			T1	168		T2	10		T3	4
valid_sources[0x4d]	50644	1			T1	151		T2	3		T3	2
valid_sources[0x4e]	50285	1			T1	171		T2	5		T3	6
valid_sources[0x4f]	56468	1			T1	130		T2	4		T3	5
valid_sources[0x50]	46728	1			T1	146		T2	10		T3	4
valid_sources[0x51]	48495	1			T1	165		T2	13		T3	5
valid_sources[0x52]	82647	1			T1	149		T2	4		T3	6
valid_sources[0x53]	46802	1			T1	143		T2	8		T3	4
valid_sources[0x54]	49758	1			T1	147		T2	3		T3	2
valid_sources[0x55]	52808	1			T1	164		T2	6		T3	2
valid_sources[0x56]	63097	1			T1	109		T2	6		T3	5
valid_sources[0x57]	47884	1			T1	164		T2	6		T3	5
valid_sources[0x58]	52907	1			T1	159		T2	11		T3	11
valid_sources[0x59]	47614	1			T1	198		T2	4		T6	75
valid_sources[0x5a]	46741	1			T1	159		T2	9		T3	4
valid_sources[0x5b]	53050	1			T1	159		T2	7		T3	3
valid_sources[0x5c]	48008	1			T1	138		T2	5		T3	8
valid_sources[0x5d]	48375	1			T1	159		T2	2		T3	9
valid_sources[0x5e]	45022	1			T1	155		T2	8		T3	8
valid_sources[0x5f]	48065	1			T1	138		T2	4		T3	1
valid_sources[0x60]	47094	1			T1	174		T2	9		T3	1
valid_sources[0x61]	47867	1			T1	173		T2	9		T3	6
valid_sources[0x62]	53055	1			T1	149		T2	17		T3	10
valid_sources[0x63]	180008	1			T1	165		T2	11		T3	4
valid_sources[0x64]	51067	1			T1	121		T2	8		T3	6
valid_sources[0x65]	46668	1			T1	156		T2	6		T3	5
valid_sources[0x66]	48230	1			T1	111		T2	9		T3	6
valid_sources[0x67]	66286	1			T1	148		T2	3		T3	4
valid_sources[0x68]	49089	1			T1	161		T2	9		T3	2
valid_sources[0x69]	46944	1			T1	154		T2	11		T3	4
valid_sources[0x6a]	46045	1			T1	136		T2	3		T3	6
valid_sources[0x6b]	47670	1			T1	164		T2	2		T3	3
valid_sources[0x6c]	48656	1			T1	161		T2	7		T3	5
valid_sources[0x6d]	48045	1			T1	155		T2	4		T3	12
valid_sources[0x6e]	47369	1			T1	160		T2	2		T3	7
valid_sources[0x6f]	53829	1			T1	153		T2	8		T3	8
valid_sources[0x70]	52021	1			T1	159		T2	5		T3	3
valid_sources[0x71]	45601	1			T1	159		T2	8		T3	7
valid_sources[0x72]	55833	1			T1	166		T2	7		T3	7
valid_sources[0x73]	47621	1			T1	158		T2	5		T3	3
valid_sources[0x74]	47603	1			T1	142		T2	8		T3	4
valid_sources[0x75]	63826	1			T1	151		T2	6		T3	5
valid_sources[0x76]	47924	1			T1	144		T2	5		T3	3
valid_sources[0x77]	63721	1			T1	163		T2	8		T3	2
valid_sources[0x78]	52816	1			T1	159		T2	13		T3	1
valid_sources[0x79]	52260	1			T1	136		T2	7		T3	3
valid_sources[0x7a]	48043	1			T1	133		T2	7		T3	8
valid_sources[0x7b]	48624	1			T1	171		T2	9		T3	5
valid_sources[0x7c]	56334	1			T1	142		T2	6		T3	1
valid_sources[0x7d]	46055	1			T1	183		T2	9		T3	3
valid_sources[0x7e]	52866	1			T1	135		T2	15		T3	3
valid_sources[0x7f]	49638	1			T1	151		T3	5		T6	78
valid_sources[0x80]	55029	1			T1	131		T2	11		T3	5

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

3260734

1

T1

7729

T2

708

T3

146

values[0x0]

all_enables

biggest_size

1834070

1

T1

8639

T2

61

T3

71

values[0x1]

all_enables

biggest_size

1758917

1

T1

8470

T2

41

T3

52

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	237850	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

8559576

1

T1

46941

T2

40

T5

100

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	2190894	1			T1	12032		T2	20		T5	50
values[0x0]	3207592	1			T1	17512		T2	12		T5	22
values[0x1]	3398940	1			T1	18680		T2	8		T5	28

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	85753	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

8711673

1

T1

47776

T2

40

T5

100

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	34958	1			T1	178		T5	2		T7	395
valid_sources[0x01]	32925	1			T1	204		T5	1		T9	2
valid_sources[0x02]	34263	1			T1	195		T9	1		T24	1
valid_sources[0x03]	33343	1			T1	198		T24	1		T15	2
valid_sources[0x04]	34371	1			T1	176		T6	1		T15	1
valid_sources[0x05]	34184	1			T1	232		T7	389		T105	2
valid_sources[0x06]	36165	1			T1	167		T7	367		T12	1008
valid_sources[0x07]	34499	1			T1	204		T5	2		T10	2
valid_sources[0x08]	34545	1			T1	187		T5	1		T24	1
valid_sources[0x09]	34147	1			T1	196		T9	1		T6	2
valid_sources[0x0a]	32659	1			T1	186		T5	4		T7	398
valid_sources[0x0b]	33605	1			T1	179		T24	1		T98	2
valid_sources[0x0c]	34357	1			T1	166		T7	350		T185	1
valid_sources[0x0d]	35016	1			T1	187		T24	1		T15	1
valid_sources[0x0e]	35410	1			T1	178		T5	1		T7	371
valid_sources[0x0f]	32777	1			T1	196		T7	346		T13	7
valid_sources[0x10]	33327	1			T1	180		T5	3		T7	372
valid_sources[0x11]	37891	1			T1	186		T101	1		T7	406
valid_sources[0x12]	33711	1			T1	172		T7	347		T103	1
valid_sources[0x13]	36563	1			T1	178		T24	1		T101	3
valid_sources[0x14]	34416	1			T1	182		T7	377		T185	1
valid_sources[0x15]	35644	1			T1	188		T24	1		T15	1
valid_sources[0x16]	34567	1			T1	197		T15	1		T7	359
valid_sources[0x17]	35588	1			T1	201		T5	1		T10	3
valid_sources[0x18]	36389	1			T1	176		T24	1		T7	358
valid_sources[0x19]	34481	1			T1	173		T7	389		T13	2
valid_sources[0x1a]	37383	1			T1	176		T15	4		T7	378
valid_sources[0x1b]	37473	1			T1	204		T5	2		T15	3
valid_sources[0x1c]	35135	1			T1	188		T7	362		T103	1
valid_sources[0x1d]	31678	1			T1	153		T6	2		T98	1
valid_sources[0x1e]	34440	1			T1	195		T101	1		T7	377
valid_sources[0x1f]	35249	1			T1	211		T7	346		T103	1
valid_sources[0x20]	35547	1			T1	206		T7	380		T93	17
valid_sources[0x21]	34737	1			T1	192		T6	1		T10	1
valid_sources[0x22]	36241	1			T1	199		T24	2		T7	336
valid_sources[0x23]	33017	1			T1	198		T5	1		T7	349
valid_sources[0x24]	35409	1			T1	194		T24	1		T7	388
valid_sources[0x25]	33548	1			T1	194		T7	339		T13	4
valid_sources[0x26]	36189	1			T1	209		T7	360		T103	1
valid_sources[0x27]	33047	1			T1	194		T7	396		T12	953
valid_sources[0x28]	34590	1			T1	193		T7	336		T13	2
valid_sources[0x29]	33001	1			T1	215		T5	1		T15	2
valid_sources[0x2a]	33520	1			T1	185		T24	1		T15	1
valid_sources[0x2b]	34492	1			T1	173		T24	2		T7	355
valid_sources[0x2c]	34533	1			T1	164		T7	371		T12	1022
valid_sources[0x2d]	32503	1			T1	181		T7	401		T13	3
valid_sources[0x2e]	33029	1			T1	193		T24	2		T7	372
valid_sources[0x2f]	34470	1			T1	176		T15	2		T7	396
valid_sources[0x30]	35998	1			T1	184		T7	375		T185	1
valid_sources[0x31]	33450	1			T1	215		T10	3		T7	364
valid_sources[0x32]	33538	1			T1	174		T24	1		T15	1
valid_sources[0x33]	34780	1			T1	181		T7	403		T13	3
valid_sources[0x34]	34555	1			T1	181		T24	6		T7	366
valid_sources[0x35]	31825	1			T1	173		T5	2		T15	3
valid_sources[0x36]	33774	1			T1	208		T6	1		T24	1
valid_sources[0x37]	34651	1			T1	169		T5	1		T7	351
valid_sources[0x38]	35093	1			T1	182		T7	374		T185	4
valid_sources[0x39]	37014	1			T1	148		T24	2		T7	384
valid_sources[0x3a]	34941	1			T1	222		T7	363		T103	1
valid_sources[0x3b]	34208	1			T1	199		T5	2		T24	3
valid_sources[0x3c]	34341	1			T1	185		T5	1		T24	2
valid_sources[0x3d]	35118	1			T1	198		T15	4		T7	414
valid_sources[0x3e]	34683	1			T1	169		T7	367		T104	1
valid_sources[0x3f]	34004	1			T1	180		T9	2		T7	377
valid_sources[0x40]	34347	1			T1	181		T5	1		T10	6
valid_sources[0x41]	33007	1			T1	162		T24	2		T7	390
valid_sources[0x42]	33538	1			T1	163		T24	1		T7	359
valid_sources[0x43]	33133	1			T1	172		T63	1		T7	394
valid_sources[0x44]	32920	1			T1	168		T5	3		T7	357
valid_sources[0x45]	33446	1			T1	193		T9	1		T7	364
valid_sources[0x46]	34226	1			T1	164		T63	15		T7	365
valid_sources[0x47]	34950	1			T1	191		T15	3		T7	368
valid_sources[0x48]	33428	1			T1	227		T24	2		T101	2
valid_sources[0x49]	33047	1			T1	205		T63	1		T7	386
valid_sources[0x4a]	33640	1			T1	191		T24	1		T101	1
valid_sources[0x4b]	33829	1			T1	184		T24	1		T7	358
valid_sources[0x4c]	33996	1			T1	190		T10	2		T15	4
valid_sources[0x4d]	33040	1			T1	187		T15	1		T7	387
valid_sources[0x4e]	34992	1			T1	127		T101	3		T7	411
valid_sources[0x4f]	32766	1			T1	209		T63	2		T7	347
valid_sources[0x50]	35300	1			T1	190		T2	1		T24	1
valid_sources[0x51]	32669	1			T1	201		T24	1		T7	401
valid_sources[0x52]	34865	1			T1	213		T24	1		T7	383
valid_sources[0x53]	33055	1			T1	184		T24	1		T7	377
valid_sources[0x54]	33833	1			T1	176		T7	336		T179	1
valid_sources[0x55]	33022	1			T1	204		T63	9		T102	60
valid_sources[0x56]	35297	1			T1	160		T6	1		T24	5
valid_sources[0x57]	36622	1			T1	190		T5	2		T7	378
valid_sources[0x58]	35073	1			T1	150		T5	2		T7	388
valid_sources[0x59]	35060	1			T1	176		T7	374		T103	1
valid_sources[0x5a]	35247	1			T1	180		T6	2		T7	359
valid_sources[0x5b]	35508	1			T1	231		T9	1		T24	1
valid_sources[0x5c]	34049	1			T1	195		T5	1		T7	348
valid_sources[0x5d]	36543	1			T1	177		T24	1		T15	1
valid_sources[0x5e]	35374	1			T1	212		T6	3		T7	365
valid_sources[0x5f]	35607	1			T1	193		T5	1		T10	4
valid_sources[0x60]	33948	1			T1	185		T15	1		T7	372
valid_sources[0x61]	34430	1			T1	191		T2	7		T7	382
valid_sources[0x62]	33691	1			T1	180		T5	2		T24	3
valid_sources[0x63]	33388	1			T1	186		T11	20		T101	1
valid_sources[0x64]	33740	1			T1	182		T15	2		T7	363
valid_sources[0x65]	33482	1			T1	202		T7	399		T13	5
valid_sources[0x66]	35750	1			T1	197		T6	1		T7	367
valid_sources[0x67]	34094	1			T1	144		T24	1		T7	343
valid_sources[0x68]	34527	1			T1	174		T24	2		T7	367
valid_sources[0x69]	39608	1			T1	176		T9	1		T15	1
valid_sources[0x6a]	33041	1			T1	165		T7	370		T34	1
valid_sources[0x6b]	34747	1			T1	162		T24	3		T15	1
valid_sources[0x6c]	34376	1			T1	182		T5	2		T9	1
valid_sources[0x6d]	34779	1			T1	187		T24	1		T15	2
valid_sources[0x6e]	33591	1			T1	194		T7	399		T13	5
valid_sources[0x6f]	35995	1			T1	210		T24	2		T7	359
valid_sources[0x70]	36250	1			T1	194		T5	3		T98	1
valid_sources[0x71]	35062	1			T1	203		T24	1		T7	399
valid_sources[0x72]	34599	1			T1	196		T6	1		T24	1
valid_sources[0x73]	32046	1			T1	179		T15	1		T7	387
valid_sources[0x74]	36251	1			T1	194		T24	1		T7	371
valid_sources[0x75]	34567	1			T1	220		T9	1		T101	2
valid_sources[0x76]	35183	1			T1	223		T9	1		T24	1
valid_sources[0x77]	33705	1			T1	181		T5	2		T24	2
valid_sources[0x78]	34061	1			T1	174		T7	344		T12	1011
valid_sources[0x79]	33807	1			T1	194		T7	368		T103	4
valid_sources[0x7a]	32094	1			T1	157		T5	1		T10	3
valid_sources[0x7b]	34912	1			T1	197		T98	1		T7	381
valid_sources[0x7c]	31737	1			T1	177		T15	1		T7	368
valid_sources[0x7d]	35877	1			T1	175		T5	1		T24	1
valid_sources[0x7e]	34320	1			T1	197		T24	2		T7	369
valid_sources[0x7f]	33572	1			T1	142		T5	6		T15	7
valid_sources[0x80]	32223	1			T1	206		T7	349		T185	9

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

2177985

1

T1

12011

T2

20

T5

50

values[0x0]

all_enables

biggest_size

3191467

1

T1

17438

T2

12

T5

22

values[0x1]

all_enables

biggest_size

3190124

1

T1

17492

T2

8

T5

28