Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	4368969	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

2443867

1

T1

721

T2

500

T3

13733

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	5767890	1			T1	2851		T2	928		T3	62782
values[0x0]	497075	1			T1	119		T2	57		T3	2549
values[0x1]	547871	1			T1	134		T2	70		T3	2447

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	3225620	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

3587216

1

T1

1382

T2

625

T3

29792

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	22135	1			T1	15		T2	4		T3	258
valid_sources[0x01]	30848	1			T1	10		T2	3		T3	250
valid_sources[0x02]	88603	1			T1	10		T2	6		T3	292
valid_sources[0x03]	24321	1			T1	8		T2	1		T3	269
valid_sources[0x04]	24550	1			T1	12		T3	285		T5	23
valid_sources[0x05]	24419	1			T1	10		T2	1		T3	228
valid_sources[0x06]	22404	1			T1	14		T2	1		T3	271
valid_sources[0x07]	20065	1			T1	6		T3	297		T5	21
valid_sources[0x08]	20661	1			T1	3		T2	5		T3	272
valid_sources[0x09]	67068	1			T1	4		T2	5		T3	256
valid_sources[0x0a]	24055	1			T1	19		T2	5		T3	260
valid_sources[0x0b]	21053	1			T1	8		T2	8		T3	276
valid_sources[0x0c]	20430	1			T1	10		T2	4		T3	272
valid_sources[0x0d]	21829	1			T1	12		T2	5		T3	222
valid_sources[0x0e]	20896	1			T1	19		T2	3		T3	260
valid_sources[0x0f]	21293	1			T1	2		T2	1		T3	258
valid_sources[0x10]	24701	1			T1	17		T2	3		T3	267
valid_sources[0x11]	36835	1			T1	28		T2	3		T3	297
valid_sources[0x12]	21626	1			T1	13		T2	5		T3	263
valid_sources[0x13]	26864	1			T1	3		T2	10		T3	277
valid_sources[0x14]	69266	1			T1	24		T2	8		T3	266
valid_sources[0x15]	21856	1			T1	2		T2	3		T3	265
valid_sources[0x16]	25149	1			T1	32		T2	1		T3	232
valid_sources[0x17]	23677	1			T1	15		T2	13		T3	272
valid_sources[0x18]	21663	1			T1	8		T2	5		T3	259
valid_sources[0x19]	24738	1			T1	21		T2	2		T3	240
valid_sources[0x1a]	21606	1			T1	14		T2	1		T3	264
valid_sources[0x1b]	21099	1			T1	17		T2	1		T3	249
valid_sources[0x1c]	30315	1			T1	12		T2	1		T3	273
valid_sources[0x1d]	30483	1			T1	11		T2	8		T3	282
valid_sources[0x1e]	29245	1			T1	3		T2	6		T3	259
valid_sources[0x1f]	25558	1			T1	10		T2	4		T3	282
valid_sources[0x20]	30001	1			T1	7		T2	4		T3	259
valid_sources[0x21]	26655	1			T1	6		T2	3		T3	295
valid_sources[0x22]	21420	1			T1	11		T2	4		T3	264
valid_sources[0x23]	21652	1			T1	14		T2	4		T3	265
valid_sources[0x24]	21770	1			T1	16		T2	1		T3	267
valid_sources[0x25]	21610	1			T1	19		T2	5		T3	260
valid_sources[0x26]	24722	1			T1	19		T2	2		T3	262
valid_sources[0x27]	21222	1			T1	20		T2	2		T3	260
valid_sources[0x28]	28655	1			T1	3		T2	3		T3	250
valid_sources[0x29]	52770	1			T1	17		T2	10		T3	301
valid_sources[0x2a]	20483	1			T1	17		T2	2		T3	271
valid_sources[0x2b]	55994	1			T1	8		T2	2		T3	289
valid_sources[0x2c]	21996	1			T1	11		T2	3		T3	268
valid_sources[0x2d]	26140	1			T1	1		T2	8		T3	251
valid_sources[0x2e]	24903	1			T1	22		T3	276		T5	19
valid_sources[0x2f]	20469	1			T1	12		T2	9		T3	286
valid_sources[0x30]	39988	1			T1	32		T2	7		T3	246
valid_sources[0x31]	25963	1			T1	9		T2	7		T3	275
valid_sources[0x32]	23382	1			T1	14		T2	7		T3	243
valid_sources[0x33]	27981	1			T1	16		T2	3		T3	270
valid_sources[0x34]	37320	1			T1	13		T2	2		T3	255
valid_sources[0x35]	21779	1			T1	6		T2	4		T3	268
valid_sources[0x36]	21586	1			T1	12		T2	3		T3	229
valid_sources[0x37]	23498	1			T1	21		T2	10		T3	264
valid_sources[0x38]	22348	1			T1	7		T2	4		T3	292
valid_sources[0x39]	23504	1			T1	14		T2	4		T3	240
valid_sources[0x3a]	21908	1			T1	13		T2	1		T3	268
valid_sources[0x3b]	26571	1			T1	13		T2	3		T3	297
valid_sources[0x3c]	21543	1			T1	17		T2	3		T3	275
valid_sources[0x3d]	33386	1			T1	15		T2	2		T3	279
valid_sources[0x3e]	21340	1			T1	19		T2	3		T3	268
valid_sources[0x3f]	29521	1			T1	7		T2	3		T3	269
valid_sources[0x40]	21976	1			T1	17		T2	4		T3	273
valid_sources[0x41]	63804	1			T1	14		T2	5		T3	288
valid_sources[0x42]	23005	1			T1	19		T2	2		T3	270
valid_sources[0x43]	20447	1			T1	18		T2	13		T3	261
valid_sources[0x44]	21116	1			T1	4		T2	5		T3	287
valid_sources[0x45]	22122	1			T1	14		T2	4		T3	267
valid_sources[0x46]	21419	1			T1	3		T2	8		T3	264
valid_sources[0x47]	21051	1			T1	14		T2	14		T3	271
valid_sources[0x48]	21497	1			T1	10		T2	1		T3	295
valid_sources[0x49]	22142	1			T1	8		T2	13		T3	240
valid_sources[0x4a]	20463	1			T1	5		T2	7		T3	257
valid_sources[0x4b]	29126	1			T1	18		T2	2		T3	247
valid_sources[0x4c]	25703	1			T1	4		T2	12		T3	250
valid_sources[0x4d]	20947	1			T1	13		T2	4		T3	265
valid_sources[0x4e]	31442	1			T1	10		T2	1		T3	281
valid_sources[0x4f]	23646	1			T1	1		T2	1		T3	248
valid_sources[0x50]	36362	1			T1	7		T2	2		T3	289
valid_sources[0x51]	24523	1			T1	8		T3	247		T5	33
valid_sources[0x52]	20797	1			T1	7		T3	265		T5	13
valid_sources[0x53]	22914	1			T1	9		T2	6		T3	250
valid_sources[0x54]	27814	1			T1	12		T2	4		T3	259
valid_sources[0x55]	21465	1			T1	16		T2	2		T3	279
valid_sources[0x56]	20874	1			T1	13		T2	2		T3	270
valid_sources[0x57]	20692	1			T1	4		T2	2		T3	268
valid_sources[0x58]	30409	1			T1	17		T2	6		T3	304
valid_sources[0x59]	24491	1			T1	5		T3	283		T5	26
valid_sources[0x5a]	34193	1			T1	8		T2	12		T3	236
valid_sources[0x5b]	21042	1			T1	14		T2	1		T3	256
valid_sources[0x5c]	22726	1			T1	14		T2	3		T3	270
valid_sources[0x5d]	21154	1			T1	10		T2	2		T3	236
valid_sources[0x5e]	21634	1			T1	21		T2	4		T3	279
valid_sources[0x5f]	20755	1			T1	19		T2	7		T3	241
valid_sources[0x60]	22846	1			T1	16		T2	4		T3	251
valid_sources[0x61]	29212	1			T1	23		T2	6		T3	257
valid_sources[0x62]	22575	1			T1	12		T3	249		T5	16
valid_sources[0x63]	20853	1			T1	21		T2	4		T3	269
valid_sources[0x64]	21080	1			T1	13		T3	259		T5	22
valid_sources[0x65]	21399	1			T1	17		T2	3		T3	271
valid_sources[0x66]	22833	1			T1	29		T2	3		T3	267
valid_sources[0x67]	33594	1			T2	2		T3	233		T5	18
valid_sources[0x68]	23232	1			T1	13		T2	3		T3	269
valid_sources[0x69]	21251	1			T1	7		T2	9		T3	274
valid_sources[0x6a]	27794	1			T1	17		T3	280		T5	22
valid_sources[0x6b]	20773	1			T1	9		T2	3		T3	224
valid_sources[0x6c]	21071	1			T1	9		T2	9		T3	271
valid_sources[0x6d]	32123	1			T1	3		T2	7		T3	272
valid_sources[0x6e]	21575	1			T1	22		T2	5		T3	281
valid_sources[0x6f]	22628	1			T1	17		T3	257		T5	28
valid_sources[0x70]	32194	1			T1	5		T2	5		T3	277
valid_sources[0x71]	21595	1			T1	7		T2	3		T3	267
valid_sources[0x72]	21279	1			T1	10		T2	2		T3	263
valid_sources[0x73]	24526	1			T1	3		T2	3		T3	263
valid_sources[0x74]	105228	1			T1	19		T2	6		T3	292
valid_sources[0x75]	22290	1			T1	12		T2	4		T3	262
valid_sources[0x76]	20832	1			T1	5		T2	7		T3	276
valid_sources[0x77]	25561	1			T1	14		T2	3		T3	282
valid_sources[0x78]	20926	1			T1	26		T2	4		T3	243
valid_sources[0x79]	21501	1			T1	6		T3	260		T5	14
valid_sources[0x7a]	21252	1			T1	10		T2	6		T3	266
valid_sources[0x7b]	25107	1			T1	17		T2	2		T3	259
valid_sources[0x7c]	20394	1			T1	16		T2	4		T3	268
valid_sources[0x7d]	24368	1			T1	12		T2	6		T3	254
valid_sources[0x7e]	22252	1			T1	2		T2	3		T3	309
valid_sources[0x7f]	25056	1			T1	3		T2	1		T3	255
valid_sources[0x80]	26488	1			T1	16		T2	1		T3	252

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

1953860

1

T1

615

T2

440

T3

11664

values[0x0]

all_enables

biggest_size

276565

1

T1

55

T2

32

T3

1279

values[0x1]

all_enables

biggest_size

213442

1

T1

51

T2

28

T3

790

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	25277	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

460282

1

T1

100

T2

40

T3

1240

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	159858	1			T1	50		T2	20		T3	620
values[0x0]	158701	1			T1	28		T2	8		T3	303
values[0x1]	167000	1			T1	22		T2	12		T3	317

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	14493	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

471066

1

T1

100

T2

40

T3

1240

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	1916	1			T1	2		T3	4		T5	11
valid_sources[0x01]	1746	1			T3	6		T5	10		T109	3
valid_sources[0x02]	1680	1			T3	5		T5	8		T6	23
valid_sources[0x03]	1608	1			T1	2		T3	3		T5	12
valid_sources[0x04]	1734	1			T1	2		T3	11		T5	7
valid_sources[0x05]	2085	1			T3	6		T5	11		T109	1
valid_sources[0x06]	2088	1			T3	5		T5	20		T109	1
valid_sources[0x07]	1964	1			T3	6		T5	10		T108	5
valid_sources[0x08]	1749	1			T3	8		T5	9		T101	3
valid_sources[0x09]	2170	1			T3	4		T5	17		T102	6
valid_sources[0x0a]	1670	1			T3	10		T5	10		T17	4
valid_sources[0x0b]	1897	1			T1	1		T5	9		T15	1
valid_sources[0x0c]	1620	1			T3	3		T5	11		T6	23
valid_sources[0x0d]	1996	1			T1	2		T3	6		T5	20
valid_sources[0x0e]	1666	1			T3	5		T5	16		T156	3
valid_sources[0x0f]	2208	1			T1	3		T3	8		T5	8
valid_sources[0x10]	1668	1			T3	8		T5	9		T109	4
valid_sources[0x11]	1962	1			T3	3		T5	13		T109	2
valid_sources[0x12]	1776	1			T3	5		T5	15		T101	2
valid_sources[0x13]	1621	1			T3	4		T5	12		T201	1
valid_sources[0x14]	1644	1			T3	4		T5	12		T15	2
valid_sources[0x15]	1584	1			T1	2		T3	3		T5	12
valid_sources[0x16]	1958	1			T3	2		T5	12		T108	2
valid_sources[0x17]	1615	1			T1	1		T3	5		T5	15
valid_sources[0x18]	1806	1			T1	1		T3	5		T5	9
valid_sources[0x19]	1756	1			T3	2		T5	22		T6	35
valid_sources[0x1a]	2480	1			T3	6		T5	3		T6	8
valid_sources[0x1b]	2628	1			T3	5		T5	17		T109	10
valid_sources[0x1c]	1889	1			T3	2		T5	10		T6	9
valid_sources[0x1d]	1809	1			T3	8		T5	14		T101	3
valid_sources[0x1e]	1824	1			T1	1		T3	9		T5	14
valid_sources[0x1f]	1990	1			T3	8		T5	9		T6	12
valid_sources[0x20]	2048	1			T3	2		T5	7		T109	2
valid_sources[0x21]	1719	1			T3	2		T5	7		T15	4
valid_sources[0x22]	2411	1			T3	5		T5	9		T6	13
valid_sources[0x23]	1923	1			T1	1		T3	5		T5	7
valid_sources[0x24]	1758	1			T3	6		T5	11		T15	1
valid_sources[0x25]	1996	1			T3	5		T5	12		T15	1
valid_sources[0x26]	2016	1			T3	3		T5	5		T15	1
valid_sources[0x27]	1523	1			T1	1		T3	6		T5	16
valid_sources[0x28]	1850	1			T3	5		T5	8		T109	3
valid_sources[0x29]	1626	1			T3	5		T5	10		T101	1
valid_sources[0x2a]	1806	1			T1	3		T3	8		T5	8
valid_sources[0x2b]	1696	1			T3	5		T5	9		T15	1
valid_sources[0x2c]	1675	1			T2	4		T3	6		T5	16
valid_sources[0x2d]	1946	1			T3	2		T5	11		T101	1
valid_sources[0x2e]	1870	1			T1	2		T3	7		T5	10
valid_sources[0x2f]	3443	1			T3	7		T5	19		T6	16
valid_sources[0x30]	1799	1			T3	6		T5	10		T201	1
valid_sources[0x31]	1955	1			T5	10		T109	1		T6	18
valid_sources[0x32]	2969	1			T1	1		T3	7		T5	8
valid_sources[0x33]	1838	1			T3	8		T5	13		T15	1
valid_sources[0x34]	1819	1			T3	2		T5	14		T15	1
valid_sources[0x35]	1682	1			T3	5		T5	6		T6	5
valid_sources[0x36]	1814	1			T2	2		T3	5		T5	7
valid_sources[0x37]	2332	1			T1	1		T3	6		T5	11
valid_sources[0x38]	1777	1			T3	10		T5	13		T104	1
valid_sources[0x39]	1688	1			T3	10		T5	10		T6	3
valid_sources[0x3a]	2107	1			T3	3		T5	13		T6	9
valid_sources[0x3b]	1706	1			T2	1		T3	2		T5	12
valid_sources[0x3c]	1950	1			T3	2		T5	11		T109	6
valid_sources[0x3d]	2112	1			T3	3		T5	16		T15	1
valid_sources[0x3e]	1935	1			T1	3		T3	5		T5	6
valid_sources[0x3f]	2310	1			T3	2		T5	9		T15	1
valid_sources[0x40]	2495	1			T3	2		T5	15		T109	6
valid_sources[0x41]	2170	1			T3	2		T5	22		T15	2
valid_sources[0x42]	1778	1			T3	4		T5	13		T15	1
valid_sources[0x43]	1795	1			T3	3		T5	12		T15	3
valid_sources[0x44]	1657	1			T3	5		T5	13		T109	8
valid_sources[0x45]	1758	1			T3	1		T5	14		T15	4
valid_sources[0x46]	1665	1			T3	6		T5	8		T18	3
valid_sources[0x47]	1860	1			T3	5		T5	14		T6	11
valid_sources[0x48]	1996	1			T1	3		T3	7		T5	15
valid_sources[0x49]	1804	1			T3	7		T5	12		T6	6
valid_sources[0x4a]	1609	1			T3	1		T5	9		T109	6
valid_sources[0x4b]	1706	1			T3	10		T5	8		T6	1
valid_sources[0x4c]	1657	1			T3	5		T5	14		T15	3
valid_sources[0x4d]	1517	1			T1	1		T3	3		T5	13
valid_sources[0x4e]	1793	1			T3	8		T5	10		T99	1
valid_sources[0x4f]	1781	1			T3	1		T5	11		T109	4
valid_sources[0x50]	2120	1			T3	3		T5	15		T109	2
valid_sources[0x51]	2342	1			T3	10		T5	8		T102	2
valid_sources[0x52]	1826	1			T1	1		T2	1		T3	10
valid_sources[0x53]	2241	1			T1	1		T3	5		T5	7
valid_sources[0x54]	1881	1			T3	5		T5	11		T15	3
valid_sources[0x55]	1789	1			T1	1		T3	5		T5	11
valid_sources[0x56]	1795	1			T3	2		T5	12		T15	4
valid_sources[0x57]	1824	1			T3	4		T5	10		T6	18
valid_sources[0x58]	1698	1			T3	4		T5	9		T6	13
valid_sources[0x59]	1862	1			T3	4		T5	6		T15	1
valid_sources[0x5a]	2394	1			T1	1		T3	3		T5	16
valid_sources[0x5b]	1949	1			T3	3		T5	10		T6	13
valid_sources[0x5c]	1505	1			T1	1		T3	9		T5	13
valid_sources[0x5d]	1856	1			T3	3		T5	15		T15	2
valid_sources[0x5e]	2399	1			T3	7		T5	17		T15	6
valid_sources[0x5f]	1758	1			T3	5		T5	18		T66	1
valid_sources[0x60]	2221	1			T1	1		T3	1		T5	11
valid_sources[0x61]	3199	1			T3	4		T5	5		T18	6
valid_sources[0x62]	1562	1			T3	5		T5	10		T101	1
valid_sources[0x63]	1674	1			T3	6		T5	15		T15	2
valid_sources[0x64]	1528	1			T1	1		T3	5		T5	14
valid_sources[0x65]	2011	1			T1	1		T3	5		T5	8
valid_sources[0x66]	1721	1			T1	1		T3	4		T5	8
valid_sources[0x67]	2245	1			T1	1		T3	7		T5	11
valid_sources[0x68]	1858	1			T2	2		T3	5		T5	8
valid_sources[0x69]	1462	1			T3	2		T5	11		T15	5
valid_sources[0x6a]	1845	1			T3	7		T5	17		T109	1
valid_sources[0x6b]	1900	1			T2	1		T3	6		T5	13
valid_sources[0x6c]	3165	1			T2	1		T3	1		T5	13
valid_sources[0x6d]	1528	1			T3	10		T5	12		T15	1
valid_sources[0x6e]	1914	1			T3	2		T5	21		T109	1
valid_sources[0x6f]	1872	1			T2	1		T3	4		T5	7
valid_sources[0x70]	1805	1			T1	1		T3	5		T5	8
valid_sources[0x71]	1737	1			T3	5		T5	13		T15	1
valid_sources[0x72]	2324	1			T3	3		T5	12		T15	2
valid_sources[0x73]	1896	1			T3	6		T5	11		T15	2
valid_sources[0x74]	1839	1			T3	2		T5	13		T15	2
valid_sources[0x75]	1502	1			T3	3		T5	15		T101	4
valid_sources[0x76]	2070	1			T3	4		T5	6		T15	2
valid_sources[0x77]	1609	1			T3	8		T5	9		T108	8
valid_sources[0x78]	1714	1			T3	4		T5	12		T15	3
valid_sources[0x79]	1552	1			T3	6		T5	9		T102	2
valid_sources[0x7a]	2281	1			T2	1		T3	6		T5	6
valid_sources[0x7b]	1610	1			T3	7		T5	5		T101	1
valid_sources[0x7c]	1857	1			T3	4		T5	12		T15	2
valid_sources[0x7d]	1777	1			T3	4		T5	12		T6	8
valid_sources[0x7e]	3381	1			T3	2		T5	13		T15	1
valid_sources[0x7f]	1882	1			T3	9		T5	10		T18	1
valid_sources[0x80]	1698	1			T3	3		T5	8		T101	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

146286

1

T1

50

T2

20

T3

620

values[0x0]

all_enables

biggest_size

157221

1

T1

28

T2

8

T3

303

values[0x1]

all_enables

biggest_size

156775

1

T1

22

T2

12

T3

317