Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	4258057	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

2363879

1

T1

4936

T2

10226

T3

275

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	5577198	1			T1	9484		T2	13217		T3	564
values[0x0]	495112	1			T1	501		T2	3726		T3	153
values[0x1]	549626	1			T1	457		T2	5546		T3	167

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	3138678	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

3483258

1

T1

6089

T2

14247

T3

424

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	43129	1			T2	92		T7	2		T4	19
valid_sources[0x01]	21284	1			T2	85		T3	20		T7	2
valid_sources[0x02]	22201	1			T2	69		T7	3		T4	26
valid_sources[0x03]	19706	1			T2	86		T7	5		T4	27
valid_sources[0x04]	25714	1			T2	98		T3	3		T4	17
valid_sources[0x05]	23958	1			T2	84		T3	1		T7	3
valid_sources[0x06]	24000	1			T2	71		T7	4		T4	11
valid_sources[0x07]	42527	1			T2	85		T3	10		T4	18
valid_sources[0x08]	21666	1			T2	99		T4	23		T10	1
valid_sources[0x09]	23650	1			T2	74		T3	2		T7	6
valid_sources[0x0a]	20318	1			T2	95		T7	1		T4	15
valid_sources[0x0b]	22066	1			T2	85		T3	6		T7	5
valid_sources[0x0c]	21835	1			T2	86		T3	5		T7	2
valid_sources[0x0d]	19155	1			T2	94		T4	25		T5	82
valid_sources[0x0e]	20226	1			T2	90		T3	1		T7	4
valid_sources[0x0f]	19917	1			T2	106		T4	25		T10	2
valid_sources[0x10]	20544	1			T2	108		T3	1		T7	4
valid_sources[0x11]	19996	1			T2	93		T3	14		T4	18
valid_sources[0x12]	23418	1			T2	92		T3	26		T4	20
valid_sources[0x13]	23484	1			T2	85		T3	3		T4	20
valid_sources[0x14]	23426	1			T2	96		T7	5		T4	33
valid_sources[0x15]	21045	1			T2	83		T3	2		T7	1
valid_sources[0x16]	31417	1			T2	98		T7	5		T4	21
valid_sources[0x17]	32351	1			T2	71		T7	3		T4	22
valid_sources[0x18]	19894	1			T2	104		T3	7		T4	21
valid_sources[0x19]	20498	1			T2	87		T7	9		T4	20
valid_sources[0x1a]	19873	1			T2	92		T4	20		T10	7
valid_sources[0x1b]	20580	1			T2	81		T3	18		T4	17
valid_sources[0x1c]	20216	1			T2	90		T7	1		T4	18
valid_sources[0x1d]	20547	1			T2	91		T7	14		T4	16
valid_sources[0x1e]	24340	1			T2	94		T3	1		T7	4
valid_sources[0x1f]	19517	1			T2	74		T3	4		T7	4
valid_sources[0x20]	44290	1			T2	101		T3	8		T7	5
valid_sources[0x21]	25383	1			T2	101		T4	20		T5	67
valid_sources[0x22]	19301	1			T2	90		T3	4		T4	16
valid_sources[0x23]	19017	1			T2	74		T4	15		T5	79
valid_sources[0x24]	21314	1			T2	86		T3	3		T7	8
valid_sources[0x25]	20203	1			T2	73		T3	18		T7	6
valid_sources[0x26]	21155	1			T2	98		T3	14		T7	4
valid_sources[0x27]	21351	1			T2	83		T3	4		T7	1
valid_sources[0x28]	44916	1			T2	101		T3	3		T7	1
valid_sources[0x29]	23095	1			T2	81		T3	1		T7	4
valid_sources[0x2a]	24639	1			T2	99		T3	6		T4	13
valid_sources[0x2b]	19549	1			T2	88		T7	2		T4	16
valid_sources[0x2c]	21092	1			T2	89		T3	3		T7	8
valid_sources[0x2d]	19801	1			T2	77		T4	21		T5	85
valid_sources[0x2e]	19334	1			T2	78		T7	5		T4	17
valid_sources[0x2f]	32426	1			T2	96		T3	6		T4	15
valid_sources[0x30]	24913	1			T2	95		T3	9		T7	7
valid_sources[0x31]	19406	1			T2	85		T7	1		T4	20
valid_sources[0x32]	21139	1			T2	78		T4	27		T10	10
valid_sources[0x33]	26296	1			T2	82		T3	3		T7	1
valid_sources[0x34]	19795	1			T2	80		T3	13		T4	13
valid_sources[0x35]	109434	1			T2	98		T3	7		T7	8
valid_sources[0x36]	29545	1			T2	94		T4	12		T10	6
valid_sources[0x37]	21598	1			T2	74		T7	1		T4	14
valid_sources[0x38]	19860	1			T2	84		T7	2		T4	24
valid_sources[0x39]	26314	1			T2	95		T3	2		T4	16
valid_sources[0x3a]	55585	1			T2	83		T3	5		T7	3
valid_sources[0x3b]	30418	1			T2	84		T3	7		T7	4
valid_sources[0x3c]	19769	1			T2	96		T3	3		T7	3
valid_sources[0x3d]	20274	1			T2	67		T3	5		T7	4
valid_sources[0x3e]	19360	1			T2	74		T3	1		T7	2
valid_sources[0x3f]	23999	1			T2	81		T3	7		T7	4
valid_sources[0x40]	23239	1			T2	79		T3	3		T7	3
valid_sources[0x41]	29686	1			T2	93		T4	22		T5	81
valid_sources[0x42]	23312	1			T2	100		T3	3		T7	10
valid_sources[0x43]	20150	1			T2	88		T4	15		T5	70
valid_sources[0x44]	35006	1			T2	82		T7	8		T4	21
valid_sources[0x45]	18824	1			T2	89		T3	10		T7	5
valid_sources[0x46]	22061	1			T2	81		T7	3		T4	21
valid_sources[0x47]	28795	1			T2	73		T3	1		T7	2
valid_sources[0x48]	31615	1			T2	95		T7	1		T4	10
valid_sources[0x49]	24085	1			T2	86		T3	1		T7	5
valid_sources[0x4a]	19384	1			T2	99		T7	6		T4	20
valid_sources[0x4b]	19096	1			T2	96		T3	6		T7	5
valid_sources[0x4c]	19275	1			T2	82		T3	16		T4	20
valid_sources[0x4d]	20268	1			T2	97		T3	8		T7	5
valid_sources[0x4e]	25348	1			T2	89		T3	3		T7	5
valid_sources[0x4f]	19806	1			T2	87		T7	2		T4	9
valid_sources[0x50]	20837	1			T2	79		T3	6		T7	1
valid_sources[0x51]	27183	1			T2	88		T7	14		T4	24
valid_sources[0x52]	20733	1			T2	90		T3	8		T4	23
valid_sources[0x53]	36498	1			T2	89		T3	4		T4	27
valid_sources[0x54]	20436	1			T2	92		T4	14		T5	83
valid_sources[0x55]	28213	1			T2	85		T3	3		T4	22
valid_sources[0x56]	51243	1			T2	91		T3	2		T7	1
valid_sources[0x57]	26828	1			T2	90		T3	5		T4	17
valid_sources[0x58]	30391	1			T1	10442		T2	92		T4	15
valid_sources[0x59]	25358	1			T2	82		T4	17		T5	68
valid_sources[0x5a]	18869	1			T2	84		T3	1		T7	6
valid_sources[0x5b]	34532	1			T2	88		T3	21		T4	19
valid_sources[0x5c]	21270	1			T2	75		T7	7		T4	14
valid_sources[0x5d]	59069	1			T2	81		T3	3		T7	3
valid_sources[0x5e]	19991	1			T2	112		T3	1		T7	12
valid_sources[0x5f]	21969	1			T2	95		T7	1		T4	19
valid_sources[0x60]	20550	1			T2	86		T3	8		T4	19
valid_sources[0x61]	25569	1			T2	99		T3	5		T7	1
valid_sources[0x62]	34903	1			T2	80		T3	18		T7	1
valid_sources[0x63]	19566	1			T2	85		T3	8		T7	1
valid_sources[0x64]	23262	1			T2	105		T4	11		T5	77
valid_sources[0x65]	18956	1			T2	83		T3	16		T7	1
valid_sources[0x66]	25678	1			T2	75		T3	6		T7	13
valid_sources[0x67]	19256	1			T2	87		T3	5		T7	2
valid_sources[0x68]	22618	1			T2	104		T4	22		T10	2
valid_sources[0x69]	127474	1			T2	92		T3	4		T7	9
valid_sources[0x6a]	23897	1			T2	79		T3	5		T7	1
valid_sources[0x6b]	23092	1			T2	88		T3	7		T7	3
valid_sources[0x6c]	38701	1			T2	85		T7	8		T4	14
valid_sources[0x6d]	21323	1			T2	114		T7	13		T4	18
valid_sources[0x6e]	21017	1			T2	82		T3	7		T4	15
valid_sources[0x6f]	19665	1			T2	94		T3	2		T4	16
valid_sources[0x70]	22338	1			T2	72		T3	2		T7	1
valid_sources[0x71]	22000	1			T2	77		T3	2		T7	1
valid_sources[0x72]	18734	1			T2	86		T4	22		T10	4
valid_sources[0x73]	26833	1			T2	95		T3	9		T4	14
valid_sources[0x74]	24175	1			T2	72		T4	33		T5	84
valid_sources[0x75]	19769	1			T2	67		T3	4		T7	5
valid_sources[0x76]	25982	1			T2	77		T3	2		T7	3
valid_sources[0x77]	19103	1			T2	87		T3	6		T7	2
valid_sources[0x78]	27950	1			T2	82		T3	1		T7	2
valid_sources[0x79]	24011	1			T2	89		T3	3		T4	21
valid_sources[0x7a]	19591	1			T2	97		T7	1		T4	22
valid_sources[0x7b]	24000	1			T2	86		T7	3		T4	22
valid_sources[0x7c]	26873	1			T2	105		T3	4		T7	2
valid_sources[0x7d]	22435	1			T2	75		T4	21		T10	3
valid_sources[0x7e]	19251	1			T2	101		T3	6		T4	16
valid_sources[0x7f]	34670	1			T2	87		T3	19		T7	2
valid_sources[0x80]	30574	1			T2	76		T7	1		T4	22

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

1875330

1

T1

4541

T2

4819

T3

139

values[0x0]

all_enables

biggest_size

275325

1

T1

239

T2

2795

T3

76

values[0x1]

all_enables

biggest_size

213224

1

T1

156

T2

2612

T3

60

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	24693	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

461053

1

T1

180

T2

11134

T4

100

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	157922	1			T1	90		T2	2934		T4	50
values[0x0]	160008	1			T1	46		T2	4116		T4	31
values[0x1]	167816	1			T1	44		T2	4410		T4	19

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	13859	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

471887

1

T1

180

T2

11326

T4

100

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	2024	1			T2	48		T4	2		T5	33
valid_sources[0x01]	1870	1			T2	44		T5	21		T111	2
valid_sources[0x02]	1817	1			T2	39		T5	36		T16	2
valid_sources[0x03]	1697	1			T2	49		T5	17		T29	1
valid_sources[0x04]	1894	1			T2	43		T5	19		T29	1
valid_sources[0x05]	1939	1			T2	51		T4	2		T5	15
valid_sources[0x06]	2063	1			T2	47		T8	46		T5	34
valid_sources[0x07]	1885	1			T2	46		T5	31		T16	4
valid_sources[0x08]	2251	1			T2	48		T5	35		T29	2
valid_sources[0x09]	1806	1			T2	55		T5	30		T111	1
valid_sources[0x0a]	1823	1			T2	44		T5	42		T16	4
valid_sources[0x0b]	2201	1			T2	44		T5	15		T121	160
valid_sources[0x0c]	1692	1			T2	32		T5	21		T29	2
valid_sources[0x0d]	2337	1			T2	35		T5	45		T29	2
valid_sources[0x0e]	1856	1			T2	33		T5	6		T29	6
valid_sources[0x0f]	1810	1			T2	65		T5	11		T6	20
valid_sources[0x10]	3716	1			T2	38		T5	23		T29	1
valid_sources[0x11]	2112	1			T2	44		T5	23		T13	1
valid_sources[0x12]	1862	1			T2	45		T5	17		T16	5
valid_sources[0x13]	1840	1			T2	46		T5	61		T111	2
valid_sources[0x14]	1798	1			T2	37		T5	32		T29	2
valid_sources[0x15]	2197	1			T1	180		T2	46		T5	22
valid_sources[0x16]	1691	1			T2	44		T4	1		T5	33
valid_sources[0x17]	1769	1			T2	43		T5	32		T16	5
valid_sources[0x18]	1734	1			T2	69		T5	17		T111	1
valid_sources[0x19]	1909	1			T2	40		T5	30		T111	5
valid_sources[0x1a]	1719	1			T2	46		T4	1		T5	22
valid_sources[0x1b]	1709	1			T2	48		T5	36		T16	3
valid_sources[0x1c]	1808	1			T2	41		T5	31		T29	1
valid_sources[0x1d]	1689	1			T2	35		T4	1		T5	43
valid_sources[0x1e]	1923	1			T2	60		T5	25		T111	2
valid_sources[0x1f]	1902	1			T2	55		T5	36		T16	8
valid_sources[0x20]	1844	1			T2	37		T4	1		T5	19
valid_sources[0x21]	2413	1			T2	46		T5	43		T29	4
valid_sources[0x22]	1798	1			T2	44		T5	44		T111	1
valid_sources[0x23]	1528	1			T2	55		T5	48		T16	4
valid_sources[0x24]	2102	1			T2	61		T5	9		T111	1
valid_sources[0x25]	1901	1			T2	66		T4	1		T5	18
valid_sources[0x26]	2257	1			T2	55		T5	30		T111	1
valid_sources[0x27]	1671	1			T2	59		T5	31		T16	5
valid_sources[0x28]	1842	1			T2	43		T5	17		T29	1
valid_sources[0x29]	2069	1			T2	42		T5	35		T111	4
valid_sources[0x2a]	1755	1			T2	45		T5	34		T111	1
valid_sources[0x2b]	2015	1			T2	46		T5	13		T111	1
valid_sources[0x2c]	1715	1			T2	40		T4	1		T5	31
valid_sources[0x2d]	1789	1			T2	48		T5	35		T29	1
valid_sources[0x2e]	3436	1			T2	44		T4	2		T5	50
valid_sources[0x2f]	1811	1			T2	39		T5	47		T111	2
valid_sources[0x30]	2640	1			T2	42		T5	27		T16	4
valid_sources[0x31]	1762	1			T2	44		T5	27		T111	1
valid_sources[0x32]	1704	1			T2	60		T5	35		T29	1
valid_sources[0x33]	2419	1			T2	48		T5	30		T111	3
valid_sources[0x34]	1876	1			T2	62		T4	1		T5	17
valid_sources[0x35]	1751	1			T2	32		T5	8		T111	3
valid_sources[0x36]	1706	1			T2	54		T5	7		T29	2
valid_sources[0x37]	1940	1			T2	32		T5	35		T111	2
valid_sources[0x38]	2104	1			T2	54		T5	24		T111	2
valid_sources[0x39]	1861	1			T2	37		T5	15		T16	4
valid_sources[0x3a]	1737	1			T2	35		T4	1		T5	25
valid_sources[0x3b]	2296	1			T2	52		T5	34		T111	1
valid_sources[0x3c]	1790	1			T2	58		T5	19		T111	2
valid_sources[0x3d]	1825	1			T2	38		T4	1		T5	23
valid_sources[0x3e]	2021	1			T2	46		T5	25		T16	3
valid_sources[0x3f]	1726	1			T2	31		T5	7		T111	1
valid_sources[0x40]	2023	1			T2	37		T4	2		T5	31
valid_sources[0x41]	1834	1			T2	38		T5	66		T16	5
valid_sources[0x42]	1867	1			T2	36		T5	61		T16	2
valid_sources[0x43]	1758	1			T2	48		T5	32		T111	1
valid_sources[0x44]	1764	1			T2	44		T5	62		T29	4
valid_sources[0x45]	1743	1			T2	36		T4	3		T5	35
valid_sources[0x46]	2356	1			T2	45		T5	19		T16	10
valid_sources[0x47]	1925	1			T2	38		T5	28		T16	3
valid_sources[0x48]	1975	1			T2	37		T5	32		T29	1
valid_sources[0x49]	1935	1			T2	39		T4	1		T5	20
valid_sources[0x4a]	1887	1			T2	56		T4	1		T5	26
valid_sources[0x4b]	1820	1			T2	36		T4	1		T5	24
valid_sources[0x4c]	1724	1			T2	56		T4	4		T5	24
valid_sources[0x4d]	1626	1			T2	57		T4	1		T5	30
valid_sources[0x4e]	1660	1			T2	46		T5	35		T111	1
valid_sources[0x4f]	2088	1			T2	51		T5	29		T35	1
valid_sources[0x50]	1816	1			T2	42		T5	36		T16	2
valid_sources[0x51]	1809	1			T2	32		T5	27		T16	6
valid_sources[0x52]	1842	1			T2	46		T5	66		T111	1
valid_sources[0x53]	1894	1			T2	46		T4	1		T5	25
valid_sources[0x54]	1781	1			T2	46		T4	1		T5	20
valid_sources[0x55]	1749	1			T2	40		T5	34		T29	2
valid_sources[0x56]	1706	1			T2	40		T5	9		T29	1
valid_sources[0x57]	2086	1			T2	57		T4	1		T5	22
valid_sources[0x58]	2285	1			T2	45		T5	18		T111	1
valid_sources[0x59]	1925	1			T2	32		T5	15		T16	5
valid_sources[0x5a]	1924	1			T2	56		T9	100		T5	27
valid_sources[0x5b]	1752	1			T2	37		T4	2		T5	33
valid_sources[0x5c]	2043	1			T2	43		T5	30		T111	1
valid_sources[0x5d]	1949	1			T2	44		T5	52		T16	1
valid_sources[0x5e]	1820	1			T2	47		T5	26		T111	1
valid_sources[0x5f]	2140	1			T2	45		T5	24		T111	1
valid_sources[0x60]	2414	1			T2	43		T5	17		T16	8
valid_sources[0x61]	1921	1			T2	42		T5	46		T29	1
valid_sources[0x62]	1775	1			T2	46		T4	1		T5	24
valid_sources[0x63]	1800	1			T2	36		T5	39		T29	2
valid_sources[0x64]	2084	1			T2	40		T4	1		T5	63
valid_sources[0x65]	1615	1			T2	40		T4	2		T5	42
valid_sources[0x66]	1904	1			T2	47		T4	1		T5	53
valid_sources[0x67]	1759	1			T2	52		T5	36		T16	4
valid_sources[0x68]	2176	1			T2	39		T5	58		T111	2
valid_sources[0x69]	1725	1			T2	56		T4	2		T5	19
valid_sources[0x6a]	1674	1			T2	42		T5	29		T13	1
valid_sources[0x6b]	1943	1			T2	31		T4	2		T5	30
valid_sources[0x6c]	1820	1			T2	55		T5	18		T16	1
valid_sources[0x6d]	1638	1			T2	37		T5	31		T16	4
valid_sources[0x6e]	2143	1			T2	42		T5	17		T29	1
valid_sources[0x6f]	1820	1			T2	30		T5	19		T16	7
valid_sources[0x70]	1765	1			T2	37		T5	35		T13	1
valid_sources[0x71]	1953	1			T2	59		T5	43		T29	1
valid_sources[0x72]	2430	1			T2	59		T5	14		T111	1
valid_sources[0x73]	1559	1			T2	31		T4	1		T5	40
valid_sources[0x74]	1729	1			T2	64		T5	39		T111	1
valid_sources[0x75]	1952	1			T2	36		T5	32		T111	1
valid_sources[0x76]	1985	1			T2	39		T8	13		T5	32
valid_sources[0x77]	1932	1			T2	40		T4	2		T5	42
valid_sources[0x78]	1760	1			T2	38		T5	33		T29	2
valid_sources[0x79]	1916	1			T2	41		T5	20		T111	1
valid_sources[0x7a]	2026	1			T2	57		T5	19		T29	1
valid_sources[0x7b]	1939	1			T2	41		T4	2		T5	28
valid_sources[0x7c]	1670	1			T2	35		T5	26		T16	3
valid_sources[0x7d]	1934	1			T2	41		T5	27		T13	1
valid_sources[0x7e]	2130	1			T2	53		T4	1		T5	18
valid_sources[0x7f]	1735	1			T2	29		T5	37		T111	1
valid_sources[0x80]	1902	1			T2	43		T5	28		T16	2

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

145123

1

T1

90

T2

2896

T4

50

values[0x0]

all_enables

biggest_size

158482

1

T1

46

T2

4099

T4

31

values[0x1]

all_enables

biggest_size

157448

1

T1

44

T2

4139

T4

19