Group : tb.dut.u_otp_ctrl_cov_if::sram_0_req_condition_cg
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Group : tb.dut.u_otp_ctrl_cov_if::sram_0_req_condition_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
0.00 1 100 1 64 64


Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv



Summary for Group tb.dut.u_otp_ctrl_cov_if::sram_0_req_condition_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 12 12 0 0.00


Variables for Group tb.dut.u_otp_ctrl_cov_if::sram_0_req_condition_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
sram_0_req_during_flash_addr_req 2 2 0 0.00 100 1 1 2
sram_0_req_during_flash_data_req 2 2 0 0.00 100 1 1 2
sram_0_req_during_lc_esc 2 2 0 0.00 100 1 1 0
sram_0_req_during_otbn_req 2 2 0 0.00 100 1 1 2
sram_0_req_during_otp_idle 2 2 0 0.00 100 1 1 2
sram_0_req_during_sram_1_req 2 2 0 0.00 100 1 1 2


Summary for Variable sram_0_req_during_flash_addr_req

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 2 0 0.00


Automatically Generated Bins for sram_0_req_during_flash_addr_req

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
[auto[0] - auto[1]] -- -- 2



Summary for Variable sram_0_req_during_flash_data_req

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 2 0 0.00


Automatically Generated Bins for sram_0_req_during_flash_data_req

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
[auto[0] - auto[1]] -- -- 2



Summary for Variable sram_0_req_during_lc_esc

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 2 0 0.00


User Defined Bins for sram_0_req_during_lc_esc

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
lc_esc_off 0 1 1
lc_esc_on 0 1 1



Summary for Variable sram_0_req_during_otbn_req

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 2 0 0.00


Automatically Generated Bins for sram_0_req_during_otbn_req

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
[auto[0] - auto[1]] -- -- 2



Summary for Variable sram_0_req_during_otp_idle

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 2 0 0.00


Automatically Generated Bins for sram_0_req_during_otp_idle

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
[auto[0] - auto[1]] -- -- 2



Summary for Variable sram_0_req_during_sram_1_req

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 2 0 0.00


Automatically Generated Bins for sram_0_req_during_sram_1_req

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
[auto[0] - auto[1]] -- -- 2

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