Group : otp_ctrl_env_pkg::otp_ctrl_env_cov::flash_req_cg
dashboard | hierarchy | modlist | groups | tests | asserts

Group : otp_ctrl_env_pkg::otp_ctrl_env_cov::flash_req_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
0.00 1 100 1 64 64


Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv



Summary for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::flash_req_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 4 0 0.00
Crosses 4 4 0 0.00


Variables for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::flash_req_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
flash_index 2 2 0 0.00 100 1 1 0
secret1_lock 2 2 0 0.00 100 1 1 2


Crosses for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::flash_req_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
flash_req_lock_cross 4 4 0 0.00 100 1 1 0


Summary for Variable flash_index

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 2 0 0.00


User Defined Bins for flash_index

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
flash_addr_key 0 1 1
flash_data_key 0 1 1


Excluded/Illegal bins
NAMECOUNTSTATUS
il 0 Illegal



Summary for Variable secret1_lock

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 2 0 0.00


Automatically Generated Bins for secret1_lock

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
[auto[0] - auto[1]] -- -- 2



Summary for Cross flash_req_lock_cross

Samples crossed: flash_index secret1_lock
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 4 0 0.00 4


Automatically Generated Cross Bins for flash_req_lock_cross

Uncovered bins
flash_indexsecret1_lockCOUNTAT LEASTNUMBERSTATUS
* * -- -- 4

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%