Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	4452683	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

2528901

1

T1

231

T2

16864

T3

580

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	5828660	1			T1	470		T2	47673		T3	4756
values[0x0]	538023	1			T1	137		T2	2577		T3	149
values[0x1]	614901	1			T1	136		T2	2580		T3	172

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	3277180	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

3704404

1

T1

351

T2

26395

T3

2063

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	22223	1			T1	5		T2	210		T5	108
valid_sources[0x01]	23533	1			T1	8		T2	178		T5	94
valid_sources[0x02]	20674	1			T1	4		T2	186		T5	118
valid_sources[0x03]	26018	1			T1	1		T2	199		T5	100
valid_sources[0x04]	25277	1			T1	6		T2	222		T5	86
valid_sources[0x05]	24399	1			T1	3		T2	209		T5	122
valid_sources[0x06]	26008	1			T2	209		T5	97		T9	39
valid_sources[0x07]	21203	1			T2	200		T5	129		T8	12
valid_sources[0x08]	26476	1			T2	187		T7	1350		T5	114
valid_sources[0x09]	21373	1			T2	197		T5	114		T8	7
valid_sources[0x0a]	33038	1			T2	200		T5	113		T9	37
valid_sources[0x0b]	101196	1			T1	5		T2	193		T5	118
valid_sources[0x0c]	23963	1			T1	1		T2	223		T5	89
valid_sources[0x0d]	24216	1			T1	2		T2	226		T5	97
valid_sources[0x0e]	21739	1			T1	1		T2	197		T5	101
valid_sources[0x0f]	20157	1			T2	193		T5	108		T8	13
valid_sources[0x10]	28215	1			T1	4		T2	178		T5	97
valid_sources[0x11]	25680	1			T2	185		T5	120		T9	33
valid_sources[0x12]	25028	1			T1	2		T2	209		T5	125
valid_sources[0x13]	25124	1			T2	199		T5	102		T9	36
valid_sources[0x14]	34731	1			T1	7		T2	176		T5	135
valid_sources[0x15]	24205	1			T1	3		T2	201		T5	106
valid_sources[0x16]	33774	1			T1	1		T2	204		T5	110
valid_sources[0x17]	30449	1			T2	199		T5	122		T8	5
valid_sources[0x18]	22148	1			T2	200		T5	113		T9	22
valid_sources[0x19]	24660	1			T1	1		T2	223		T5	130
valid_sources[0x1a]	28775	1			T2	197		T5	113		T9	39
valid_sources[0x1b]	20897	1			T2	215		T5	100		T8	1
valid_sources[0x1c]	23685	1			T2	217		T5	125		T8	10
valid_sources[0x1d]	20510	1			T1	12		T2	210		T5	149
valid_sources[0x1e]	24456	1			T1	4		T2	202		T5	121
valid_sources[0x1f]	24488	1			T1	1		T2	208		T5	144
valid_sources[0x20]	23246	1			T1	5		T2	234		T5	111
valid_sources[0x21]	23456	1			T2	195		T5	109		T8	1
valid_sources[0x22]	29658	1			T2	198		T5	112		T9	34
valid_sources[0x23]	21365	1			T1	6		T2	186		T5	115
valid_sources[0x24]	23014	1			T1	3		T2	226		T5	116
valid_sources[0x25]	38618	1			T2	215		T5	122		T8	6
valid_sources[0x26]	21583	1			T2	189		T5	138		T8	3
valid_sources[0x27]	21978	1			T1	2		T2	222		T5	112
valid_sources[0x28]	26774	1			T1	11		T2	187		T5	113
valid_sources[0x29]	26407	1			T2	205		T5	115		T8	14
valid_sources[0x2a]	20496	1			T1	8		T2	196		T5	123
valid_sources[0x2b]	24011	1			T1	6		T2	210		T5	137
valid_sources[0x2c]	26903	1			T1	1		T2	198		T5	111
valid_sources[0x2d]	74473	1			T2	214		T5	104		T9	38
valid_sources[0x2e]	24717	1			T1	4		T2	205		T5	121
valid_sources[0x2f]	21525	1			T1	5		T2	273		T5	101
valid_sources[0x30]	26358	1			T1	4		T2	197		T5	115
valid_sources[0x31]	27721	1			T1	9		T2	217		T5	136
valid_sources[0x32]	23055	1			T1	7		T2	205		T5	113
valid_sources[0x33]	22021	1			T1	3		T2	207		T5	130
valid_sources[0x34]	27378	1			T2	217		T5	119		T9	30
valid_sources[0x35]	25249	1			T2	219		T5	89		T8	12
valid_sources[0x36]	31619	1			T1	21		T2	191		T5	114
valid_sources[0x37]	23145	1			T1	11		T2	218		T5	136
valid_sources[0x38]	26617	1			T2	236		T5	131		T9	33
valid_sources[0x39]	27410	1			T1	13		T2	224		T5	122
valid_sources[0x3a]	32531	1			T1	1		T2	239		T5	129
valid_sources[0x3b]	26104	1			T2	196		T5	127		T8	12
valid_sources[0x3c]	23011	1			T1	2		T2	205		T5	92
valid_sources[0x3d]	22387	1			T1	1		T2	214		T5	112
valid_sources[0x3e]	22128	1			T1	2		T2	207		T5	101
valid_sources[0x3f]	20859	1			T2	216		T5	112		T9	43
valid_sources[0x40]	23765	1			T2	184		T5	120		T8	19
valid_sources[0x41]	31029	1			T1	3		T2	197		T5	106
valid_sources[0x42]	82827	1			T2	184		T5	101		T9	46
valid_sources[0x43]	24116	1			T1	9		T2	204		T5	101
valid_sources[0x44]	20443	1			T1	8		T2	189		T5	129
valid_sources[0x45]	22732	1			T1	3		T2	203		T5	118
valid_sources[0x46]	21827	1			T1	2		T2	232		T5	96
valid_sources[0x47]	21260	1			T1	1		T2	213		T5	90
valid_sources[0x48]	22877	1			T1	5		T2	195		T5	115
valid_sources[0x49]	87981	1			T1	8		T2	191		T5	125
valid_sources[0x4a]	21912	1			T1	1		T2	207		T5	132
valid_sources[0x4b]	27621	1			T2	205		T5	119		T8	16
valid_sources[0x4c]	34225	1			T1	10		T2	210		T5	110
valid_sources[0x4d]	72241	1			T2	175		T5	95		T9	38
valid_sources[0x4e]	22413	1			T1	9		T2	210		T5	110
valid_sources[0x4f]	25145	1			T2	194		T5	115		T9	35
valid_sources[0x50]	23299	1			T2	194		T5	118		T8	6
valid_sources[0x51]	20839	1			T1	2		T2	184		T5	120
valid_sources[0x52]	23487	1			T1	6		T2	203		T5	127
valid_sources[0x53]	24873	1			T1	8		T2	205		T5	122
valid_sources[0x54]	29628	1			T2	190		T5	121		T8	4
valid_sources[0x55]	30199	1			T2	208		T5	130		T8	4
valid_sources[0x56]	30478	1			T1	8		T2	198		T5	104
valid_sources[0x57]	22219	1			T1	1		T2	205		T5	117
valid_sources[0x58]	22036	1			T2	203		T5	106		T8	14
valid_sources[0x59]	26780	1			T1	5		T2	193		T5	125
valid_sources[0x5a]	22462	1			T1	4		T2	203		T5	118
valid_sources[0x5b]	31254	1			T1	1		T2	188		T5	115
valid_sources[0x5c]	30224	1			T1	4		T2	218		T5	111
valid_sources[0x5d]	26764	1			T1	4		T2	233		T5	157
valid_sources[0x5e]	23905	1			T2	201		T5	90		T8	5
valid_sources[0x5f]	33848	1			T1	12		T2	220		T5	120
valid_sources[0x60]	22074	1			T1	1		T2	205		T5	98
valid_sources[0x61]	24499	1			T1	4		T2	200		T5	123
valid_sources[0x62]	29750	1			T1	13		T2	188		T5	113
valid_sources[0x63]	25442	1			T1	5		T2	200		T5	103
valid_sources[0x64]	28907	1			T1	7		T2	226		T5	112
valid_sources[0x65]	21147	1			T1	3		T2	229		T5	118
valid_sources[0x66]	24416	1			T1	6		T2	216		T5	127
valid_sources[0x67]	21198	1			T1	2		T2	200		T5	107
valid_sources[0x68]	23976	1			T1	6		T2	233		T5	142
valid_sources[0x69]	74948	1			T2	232		T5	119		T9	41
valid_sources[0x6a]	38500	1			T2	203		T5	137		T9	21
valid_sources[0x6b]	20951	1			T1	6		T2	203		T5	114
valid_sources[0x6c]	30881	1			T2	187		T5	102		T9	45
valid_sources[0x6d]	22613	1			T1	18		T2	231		T5	119
valid_sources[0x6e]	22271	1			T2	198		T5	126		T8	3
valid_sources[0x6f]	21882	1			T2	215		T5	134		T8	4
valid_sources[0x70]	22745	1			T1	9		T2	191		T5	111
valid_sources[0x71]	21236	1			T2	200		T5	140		T9	48
valid_sources[0x72]	21823	1			T1	2		T2	217		T5	109
valid_sources[0x73]	23216	1			T2	236		T5	99		T8	5
valid_sources[0x74]	27761	1			T1	1		T2	190		T5	114
valid_sources[0x75]	23956	1			T2	231		T5	136		T9	38
valid_sources[0x76]	76332	1			T1	5		T2	229		T5	105
valid_sources[0x77]	23750	1			T1	1		T2	221		T5	101
valid_sources[0x78]	21615	1			T1	9		T2	199		T5	137
valid_sources[0x79]	26313	1			T1	9		T2	201		T5	100
valid_sources[0x7a]	21171	1			T1	5		T2	230		T5	118
valid_sources[0x7b]	21352	1			T2	208		T5	116		T8	5
valid_sources[0x7c]	22903	1			T1	13		T2	183		T5	108
valid_sources[0x7d]	22902	1			T2	245		T5	122		T9	34
valid_sources[0x7e]	28260	1			T2	215		T5	99		T9	36
valid_sources[0x7f]	21584	1			T1	2		T2	222		T5	124
valid_sources[0x80]	51289	1			T1	1		T2	184		T5	118

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

1979764

1

T1

117

T2

15026

T3

428

values[0x0]

all_enables

biggest_size

306975

1

T1

68

T2

1141

T3

92

values[0x1]

all_enables

biggest_size

242162

1

T1

46

T2

697

T3

60

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	27853	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

617167

1

T2

780

T3

80

T4

160

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	198409	1			T2	390		T3	40		T4	80
values[0x0]	217112	1			T2	181		T3	17		T4	36
values[0x1]	229499	1			T2	209		T3	23		T4	44

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	14811	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

630209

1

T2

780

T3

80

T4

160

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	2326	1			T2	10		T4	5		T95	1
valid_sources[0x01]	2499	1			T2	5		T9	1		T96	2
valid_sources[0x02]	2456	1			T2	1		T3	80		T9	4
valid_sources[0x03]	2503	1			T96	2		T97	3		T16	1
valid_sources[0x04]	2822	1			T4	3		T96	2		T6	14
valid_sources[0x05]	3235	1			T7	1		T95	1		T96	1
valid_sources[0x06]	2487	1			T9	2		T95	2		T96	1
valid_sources[0x07]	2533	1			T9	1		T95	3		T96	1
valid_sources[0x08]	2478	1			T2	8		T16	1		T12	27
valid_sources[0x09]	2096	1			T6	41		T12	12		T109	3
valid_sources[0x0a]	2643	1			T2	2		T4	5		T7	1
valid_sources[0x0b]	2258	1			T2	4		T95	5		T96	1
valid_sources[0x0c]	2901	1			T9	2		T95	1		T96	3
valid_sources[0x0d]	2410	1			T2	6		T96	1		T6	97
valid_sources[0x0e]	3229	1			T2	9		T7	1		T96	1
valid_sources[0x0f]	2808	1			T2	3		T9	2		T95	4
valid_sources[0x10]	2286	1			T2	2		T9	1		T95	1
valid_sources[0x11]	2524	1			T2	4		T9	1		T95	2
valid_sources[0x12]	3112	1			T96	2		T6	76		T12	2
valid_sources[0x13]	2486	1			T97	2		T12	5		T13	29
valid_sources[0x14]	2293	1			T2	1		T97	8		T12	17
valid_sources[0x15]	2139	1			T4	3		T9	2		T96	1
valid_sources[0x16]	2568	1			T96	3		T97	1		T6	21
valid_sources[0x17]	2276	1			T38	13		T95	2		T12	16
valid_sources[0x18]	2598	1			T2	2		T9	1		T95	1
valid_sources[0x19]	2623	1			T97	1		T6	21		T12	7
valid_sources[0x1a]	2550	1			T2	2		T95	2		T96	1
valid_sources[0x1b]	2402	1			T2	1		T9	1		T95	1
valid_sources[0x1c]	2713	1			T2	3		T96	2		T6	77
valid_sources[0x1d]	2209	1			T2	6		T95	1		T12	5
valid_sources[0x1e]	2378	1			T2	5		T96	1		T97	5
valid_sources[0x1f]	2343	1			T9	1		T95	2		T96	2
valid_sources[0x20]	2458	1			T97	1		T6	112		T12	27
valid_sources[0x21]	2606	1			T2	12		T9	1		T96	1
valid_sources[0x22]	2205	1			T2	2		T95	1		T6	37
valid_sources[0x23]	2228	1			T9	1		T16	1		T6	7
valid_sources[0x24]	2526	1			T9	1		T95	3		T96	2
valid_sources[0x25]	2158	1			T2	4		T97	4		T12	42
valid_sources[0x26]	2215	1			T9	2		T95	1		T6	7
valid_sources[0x27]	2927	1			T2	4		T12	26		T101	1
valid_sources[0x28]	2309	1			T2	8		T6	40		T12	13
valid_sources[0x29]	2361	1			T9	1		T95	2		T6	79
valid_sources[0x2a]	1902	1			T9	3		T97	2		T16	2
valid_sources[0x2b]	2843	1			T2	3		T9	1		T6	77
valid_sources[0x2c]	2841	1			T2	14		T9	1		T95	1
valid_sources[0x2d]	2388	1			T2	1		T6	36		T12	35
valid_sources[0x2e]	2712	1			T97	5		T6	31		T12	36
valid_sources[0x2f]	2571	1			T6	12		T12	1		T171	3
valid_sources[0x30]	2558	1			T2	4		T9	1		T97	1
valid_sources[0x31]	2920	1			T4	6		T38	2		T95	5
valid_sources[0x32]	2559	1			T2	3		T9	1		T95	4
valid_sources[0x33]	2267	1			T2	3		T9	3		T96	2
valid_sources[0x34]	2400	1			T2	3		T95	8		T96	1
valid_sources[0x35]	2437	1			T95	3		T96	1		T12	61
valid_sources[0x36]	2878	1			T4	1		T96	3		T258	4
valid_sources[0x37]	2089	1			T2	2		T7	1		T9	1
valid_sources[0x38]	2148	1			T2	1		T96	2		T6	18
valid_sources[0x39]	2571	1			T4	1		T96	1		T16	3
valid_sources[0x3a]	2374	1			T9	2		T12	63		T226	1
valid_sources[0x3b]	2236	1			T9	2		T16	1		T107	9
valid_sources[0x3c]	2130	1			T2	1		T9	1		T96	1
valid_sources[0x3d]	2643	1			T9	1		T6	3		T12	29
valid_sources[0x3e]	2331	1			T9	1		T95	1		T97	1
valid_sources[0x3f]	2526	1			T2	4		T96	2		T16	4
valid_sources[0x40]	2976	1			T4	7		T97	1		T107	3
valid_sources[0x41]	2958	1			T2	6		T4	5		T96	1
valid_sources[0x42]	2584	1			T2	1		T16	2		T6	20
valid_sources[0x43]	2449	1			T2	1		T9	2		T16	5
valid_sources[0x44]	2487	1			T9	1		T95	3		T96	1
valid_sources[0x45]	2369	1			T2	2		T9	1		T99	1
valid_sources[0x46]	2338	1			T2	2		T4	10		T9	1
valid_sources[0x47]	2570	1			T9	1		T96	1		T6	2
valid_sources[0x48]	2537	1			T2	1		T96	2		T99	5
valid_sources[0x49]	2176	1			T2	7		T95	3		T97	2
valid_sources[0x4a]	2344	1			T2	1		T7	1		T9	1
valid_sources[0x4b]	2143	1			T2	5		T96	2		T6	1
valid_sources[0x4c]	2668	1			T95	4		T96	1		T16	3
valid_sources[0x4d]	2301	1			T2	1		T9	1		T96	1
valid_sources[0x4e]	2749	1			T9	1		T95	2		T96	1
valid_sources[0x4f]	2709	1			T2	4		T9	1		T38	24
valid_sources[0x50]	2955	1			T2	3		T9	1		T95	3
valid_sources[0x51]	2616	1			T2	5		T6	30		T12	7
valid_sources[0x52]	2325	1			T7	1		T9	1		T99	1
valid_sources[0x53]	2507	1			T16	1		T14	1		T12	32
valid_sources[0x54]	2410	1			T2	1		T38	1		T107	1
valid_sources[0x55]	2480	1			T2	2		T9	1		T96	1
valid_sources[0x56]	2326	1			T2	3		T96	2		T6	44
valid_sources[0x57]	2442	1			T2	11		T95	5		T96	1
valid_sources[0x58]	3021	1			T2	3		T9	2		T6	1
valid_sources[0x59]	2657	1			T2	15		T9	1		T95	1
valid_sources[0x5a]	2211	1			T7	2		T9	1		T96	2
valid_sources[0x5b]	2102	1			T2	4		T12	11		T13	28
valid_sources[0x5c]	2930	1			T2	19		T95	2		T96	1
valid_sources[0x5d]	2580	1			T95	2		T97	1		T6	84
valid_sources[0x5e]	2276	1			T2	2		T97	2		T16	1
valid_sources[0x5f]	2742	1			T9	1		T96	1		T6	33
valid_sources[0x60]	2870	1			T2	7		T9	1		T16	6
valid_sources[0x61]	2589	1			T97	3		T99	4		T13	33
valid_sources[0x62]	2331	1			T2	10		T96	1		T16	10
valid_sources[0x63]	2473	1			T2	4		T9	2		T96	1
valid_sources[0x64]	2228	1			T2	2		T9	1		T95	1
valid_sources[0x65]	2198	1			T96	2		T6	28		T12	28
valid_sources[0x66]	2748	1			T95	2		T96	1		T97	1
valid_sources[0x67]	2709	1			T2	16		T96	1		T97	4
valid_sources[0x68]	2510	1			T2	3		T9	3		T96	1
valid_sources[0x69]	2038	1			T2	2		T6	58		T13	10
valid_sources[0x6a]	3145	1			T2	8		T9	2		T97	1
valid_sources[0x6b]	2433	1			T95	1		T6	13		T12	37
valid_sources[0x6c]	2277	1			T96	2		T6	13		T12	51
valid_sources[0x6d]	2502	1			T2	6		T97	1		T6	33
valid_sources[0x6e]	2852	1			T2	6		T9	1		T16	5
valid_sources[0x6f]	2264	1			T2	4		T4	1		T9	3
valid_sources[0x70]	2238	1			T2	4		T107	3		T12	17
valid_sources[0x71]	2458	1			T9	1		T95	4		T6	13
valid_sources[0x72]	3125	1			T7	1		T9	2		T96	1
valid_sources[0x73]	2428	1			T95	2		T97	2		T12	18
valid_sources[0x74]	2464	1			T2	13		T9	1		T95	1
valid_sources[0x75]	2524	1			T2	6		T97	1		T6	86
valid_sources[0x76]	2558	1			T2	4		T9	1		T96	1
valid_sources[0x77]	2073	1			T2	5		T96	1		T6	3
valid_sources[0x78]	2193	1			T2	6		T9	1		T96	1
valid_sources[0x79]	2314	1			T96	3		T6	16		T12	9
valid_sources[0x7a]	2481	1			T2	1		T9	1		T95	2
valid_sources[0x7b]	2724	1			T4	9		T7	1		T9	1
valid_sources[0x7c]	2755	1			T2	7		T9	3		T95	2
valid_sources[0x7d]	2354	1			T2	7		T9	1		T96	1
valid_sources[0x7e]	2929	1			T2	11		T9	1		T96	3
valid_sources[0x7f]	2581	1			T9	2		T96	2		T6	16
valid_sources[0x80]	2937	1			T2	2		T9	2		T97	2

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

185734

1

T2

390

T3

40

T4

80

values[0x0]

all_enables

biggest_size

215548

1

T2

181

T3

17

T4

36

values[0x1]

all_enables

biggest_size

215885

1

T2

209

T3

23

T4

44