Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	4317032	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

2482955

1

T1

1477

T2

2846

T3

374

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	5729905	1			T1	3179		T2	7642		T3	833
values[0x0]	507152	1			T1	202		T2	368		T3	72
values[0x1]	562930	1			T1	217		T2	362		T3	48

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	3192684	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

3607303

1

T1

1963

T2

4268

T3

507

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	25379	1			T2	38		T4	66		T9	23
valid_sources[0x01]	26921	1			T2	35		T3	6		T4	38
valid_sources[0x02]	22099	1			T2	38		T3	1		T4	39
valid_sources[0x03]	21108	1			T2	32		T3	1		T4	51
valid_sources[0x04]	46791	1			T2	37		T4	39		T9	21
valid_sources[0x05]	27726	1			T2	20		T4	66		T9	22
valid_sources[0x06]	27603	1			T2	26		T3	5		T4	58
valid_sources[0x07]	19503	1			T2	42		T3	5		T4	47
valid_sources[0x08]	32894	1			T2	39		T4	40		T9	26
valid_sources[0x09]	20434	1			T2	37		T3	1		T4	59
valid_sources[0x0a]	21396	1			T2	55		T3	5		T4	74
valid_sources[0x0b]	19692	1			T2	40		T3	4		T4	58
valid_sources[0x0c]	19076	1			T2	42		T3	3		T4	79
valid_sources[0x0d]	19396	1			T2	44		T4	45		T9	27
valid_sources[0x0e]	20605	1			T2	28		T4	43		T9	26
valid_sources[0x0f]	20090	1			T2	26		T4	74		T9	23
valid_sources[0x10]	40006	1			T2	33		T4	48		T9	30
valid_sources[0x11]	19437	1			T2	26		T4	73		T9	28
valid_sources[0x12]	20206	1			T2	29		T3	8		T4	49
valid_sources[0x13]	28100	1			T2	43		T3	4		T4	30
valid_sources[0x14]	19115	1			T2	30		T4	34		T9	24
valid_sources[0x15]	23317	1			T2	35		T4	57		T9	32
valid_sources[0x16]	33477	1			T2	30		T3	2		T4	57
valid_sources[0x17]	23257	1			T2	32		T3	17		T4	49
valid_sources[0x18]	23997	1			T2	37		T3	5		T4	36
valid_sources[0x19]	20321	1			T2	46		T3	2		T4	42
valid_sources[0x1a]	19403	1			T2	31		T4	57		T9	15
valid_sources[0x1b]	19886	1			T2	34		T3	4		T4	58
valid_sources[0x1c]	19980	1			T2	27		T4	24		T9	26
valid_sources[0x1d]	27255	1			T2	28		T3	16		T4	39
valid_sources[0x1e]	24968	1			T2	32		T4	62		T9	23
valid_sources[0x1f]	20011	1			T2	38		T3	1		T4	59
valid_sources[0x20]	22887	1			T2	32		T4	15		T9	27
valid_sources[0x21]	21720	1			T2	38		T3	1		T4	70
valid_sources[0x22]	20194	1			T2	25		T3	12		T4	62
valid_sources[0x23]	22443	1			T2	27		T3	1		T4	47
valid_sources[0x24]	42411	1			T2	20		T4	64		T9	33
valid_sources[0x25]	20245	1			T2	36		T3	2		T4	65
valid_sources[0x26]	23249	1			T2	26		T4	61		T9	29
valid_sources[0x27]	25617	1			T2	27		T4	75		T9	29
valid_sources[0x28]	21180	1			T2	35		T4	68		T9	19
valid_sources[0x29]	20994	1			T2	35		T3	6		T4	37
valid_sources[0x2a]	21095	1			T2	28		T4	47		T9	35
valid_sources[0x2b]	20829	1			T2	35		T3	4		T4	33
valid_sources[0x2c]	18897	1			T2	20		T4	69		T9	29
valid_sources[0x2d]	19381	1			T2	23		T4	52		T9	26
valid_sources[0x2e]	19728	1			T2	50		T4	42		T9	35
valid_sources[0x2f]	20023	1			T2	11		T3	6		T4	45
valid_sources[0x30]	23509	1			T2	32		T4	44		T9	26
valid_sources[0x31]	22611	1			T2	31		T3	37		T4	54
valid_sources[0x32]	27399	1			T2	47		T3	2		T4	64
valid_sources[0x33]	26801	1			T2	45		T3	5		T4	64
valid_sources[0x34]	19799	1			T2	34		T4	79		T9	19
valid_sources[0x35]	57775	1			T2	22		T4	39		T9	27
valid_sources[0x36]	21934	1			T2	32		T3	5		T4	49
valid_sources[0x37]	25779	1			T2	25		T4	41		T9	24
valid_sources[0x38]	28404	1			T2	23		T4	40		T9	17
valid_sources[0x39]	20218	1			T2	39		T3	10		T4	93
valid_sources[0x3a]	27813	1			T2	27		T4	35		T9	23
valid_sources[0x3b]	20661	1			T2	33		T3	3		T4	59
valid_sources[0x3c]	22007	1			T2	54		T3	16		T4	66
valid_sources[0x3d]	22517	1			T2	33		T3	2		T4	52
valid_sources[0x3e]	31051	1			T2	21		T4	60		T9	30
valid_sources[0x3f]	23427	1			T2	38		T4	31		T9	30
valid_sources[0x40]	20760	1			T2	28		T4	56		T9	23
valid_sources[0x41]	27040	1			T2	38		T3	17		T4	52
valid_sources[0x42]	19433	1			T2	45		T3	6		T4	37
valid_sources[0x43]	19650	1			T2	35		T3	3		T4	61
valid_sources[0x44]	20647	1			T2	32		T3	4		T4	65
valid_sources[0x45]	22495	1			T2	14		T3	7		T4	51
valid_sources[0x46]	25853	1			T2	27		T4	65		T9	23
valid_sources[0x47]	19571	1			T2	33		T4	36		T9	34
valid_sources[0x48]	19253	1			T2	39		T3	3		T4	55
valid_sources[0x49]	21553	1			T2	18		T4	63		T9	32
valid_sources[0x4a]	28565	1			T2	27		T3	2		T4	39
valid_sources[0x4b]	19424	1			T2	23		T3	24		T4	71
valid_sources[0x4c]	25955	1			T2	39		T4	38		T9	41
valid_sources[0x4d]	21271	1			T2	33		T3	2		T4	74
valid_sources[0x4e]	24235	1			T2	34		T3	1		T4	24
valid_sources[0x4f]	66689	1			T2	34		T3	3		T4	67
valid_sources[0x50]	21650	1			T2	20		T3	1		T4	52
valid_sources[0x51]	19887	1			T2	33		T4	70		T9	20
valid_sources[0x52]	19516	1			T2	38		T3	8		T4	45
valid_sources[0x53]	22327	1			T2	24		T4	74		T9	31
valid_sources[0x54]	24069	1			T2	33		T3	12		T4	26
valid_sources[0x55]	33575	1			T2	36		T4	60		T9	26
valid_sources[0x56]	46901	1			T2	39		T3	2		T4	45
valid_sources[0x57]	30111	1			T1	3598		T2	36		T4	55
valid_sources[0x58]	20701	1			T2	28		T3	6		T4	62
valid_sources[0x59]	21326	1			T2	29		T4	65		T9	24
valid_sources[0x5a]	19584	1			T2	25		T3	2		T4	58
valid_sources[0x5b]	30323	1			T2	42		T3	3		T4	79
valid_sources[0x5c]	23221	1			T2	43		T3	3		T4	48
valid_sources[0x5d]	19719	1			T2	35		T3	16		T4	45
valid_sources[0x5e]	20594	1			T2	30		T4	38		T9	37
valid_sources[0x5f]	20741	1			T2	31		T3	15		T4	54
valid_sources[0x60]	19006	1			T2	30		T3	11		T4	85
valid_sources[0x61]	20064	1			T2	39		T4	33		T9	20
valid_sources[0x62]	22250	1			T2	36		T3	11		T4	51
valid_sources[0x63]	29712	1			T2	38		T3	8		T4	43
valid_sources[0x64]	18771	1			T2	37		T4	34		T9	21
valid_sources[0x65]	21223	1			T2	48		T4	55		T9	26
valid_sources[0x66]	57092	1			T2	45		T3	3		T4	43
valid_sources[0x67]	27838	1			T2	36		T3	4		T4	58
valid_sources[0x68]	19328	1			T2	33		T3	1		T4	27
valid_sources[0x69]	35966	1			T2	34		T4	56		T9	28
valid_sources[0x6a]	28905	1			T2	46		T3	4		T4	78
valid_sources[0x6b]	25628	1			T2	33		T4	62		T9	28
valid_sources[0x6c]	25931	1			T2	36		T3	15		T4	43
valid_sources[0x6d]	23797	1			T2	36		T3	4		T4	73
valid_sources[0x6e]	20069	1			T2	31		T3	3		T4	46
valid_sources[0x6f]	81691	1			T2	43		T4	47		T9	23
valid_sources[0x70]	19354	1			T2	31		T3	16		T4	29
valid_sources[0x71]	22111	1			T2	35		T4	80		T9	18
valid_sources[0x72]	24218	1			T2	48		T4	80		T9	37
valid_sources[0x73]	19351	1			T2	31		T4	45		T8	79
valid_sources[0x74]	26175	1			T2	28		T4	53		T9	33
valid_sources[0x75]	25668	1			T2	33		T3	5		T4	78
valid_sources[0x76]	18926	1			T2	33		T4	51		T9	24
valid_sources[0x77]	20996	1			T2	24		T4	60		T9	34
valid_sources[0x78]	20509	1			T2	33		T4	54		T9	36
valid_sources[0x79]	22929	1			T2	39		T3	5		T4	52
valid_sources[0x7a]	22446	1			T2	15		T3	6		T4	59
valid_sources[0x7b]	21072	1			T2	44		T3	5		T4	61
valid_sources[0x7c]	26600	1			T2	29		T3	2		T4	63
valid_sources[0x7d]	21251	1			T2	47		T4	84		T9	29
valid_sources[0x7e]	18982	1			T2	39		T4	100		T9	24
valid_sources[0x7f]	21716	1			T2	50		T4	68		T9	40
valid_sources[0x80]	22517	1			T2	32		T3	22		T4	66

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

1979199

1

T1

1308

T2

2553

T3

316

values[0x0]

all_enables

biggest_size

284058

1

T1

91

T2

173

T3

37

values[0x1]

all_enables

biggest_size

219698

1

T1

78

T2

120

T3

21

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	25244	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

475494

1

T1

160

T2

120

T3

20

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	162010	1			T1	80		T2	60		T3	10
values[0x0]	164665	1			T1	41		T2	33		T3	4
values[0x1]	174063	1			T1	39		T2	27		T3	6

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	14078	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

486660

1

T1

160

T2

120

T3

20

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	2482	1			T4	1		T9	2		T11	1
valid_sources[0x01]	2033	1			T9	1		T104	1		T7	3
valid_sources[0x02]	1902	1			T104	3		T7	3		T108	1
valid_sources[0x03]	2040	1			T2	8		T4	1		T9	1
valid_sources[0x04]	1660	1			T9	2		T104	4		T72	4
valid_sources[0x05]	2106	1			T4	1		T72	1		T112	1
valid_sources[0x06]	2031	1			T9	1		T7	1		T14	13
valid_sources[0x07]	1612	1			T4	1		T7	4		T171	2
valid_sources[0x08]	2002	1			T4	1		T9	4		T72	1
valid_sources[0x09]	2087	1			T4	1		T11	3		T101	5
valid_sources[0x0a]	1745	1			T11	1		T7	3		T108	3
valid_sources[0x0b]	2165	1			T11	9		T112	1		T7	3
valid_sources[0x0c]	1780	1			T3	1		T9	3		T18	1
valid_sources[0x0d]	1973	1			T9	1		T103	1		T104	1
valid_sources[0x0e]	1918	1			T4	3		T9	1		T104	2
valid_sources[0x0f]	1861	1			T9	1		T103	1		T104	2
valid_sources[0x10]	1917	1			T4	3		T9	5		T11	3
valid_sources[0x11]	1969	1			T1	2		T2	2		T9	1
valid_sources[0x12]	1821	1			T9	2		T11	3		T104	1
valid_sources[0x13]	1695	1			T2	1		T4	1		T18	1
valid_sources[0x14]	1876	1			T4	3		T9	3		T104	1
valid_sources[0x15]	1997	1			T105	3		T7	6		T14	7
valid_sources[0x16]	2063	1			T3	1		T112	3		T7	3
valid_sources[0x17]	2050	1			T72	1		T105	1		T112	3
valid_sources[0x18]	2217	1			T2	4		T4	2		T9	3
valid_sources[0x19]	1785	1			T4	1		T9	1		T112	1
valid_sources[0x1a]	1835	1			T9	1		T103	1		T72	3
valid_sources[0x1b]	1780	1			T4	2		T11	1		T104	1
valid_sources[0x1c]	2198	1			T9	2		T102	5		T104	1
valid_sources[0x1d]	1702	1			T4	1		T100	1		T72	3
valid_sources[0x1e]	2141	1			T4	1		T104	2		T7	4
valid_sources[0x1f]	1752	1			T7	6		T107	1		T108	1
valid_sources[0x20]	1773	1			T11	1		T104	4		T72	1
valid_sources[0x21]	2166	1			T4	1		T9	1		T104	1
valid_sources[0x22]	1782	1			T2	3		T4	1		T100	1
valid_sources[0x23]	1597	1			T4	1		T9	2		T11	4
valid_sources[0x24]	1642	1			T1	17		T100	1		T169	1
valid_sources[0x25]	1714	1			T9	1		T104	5		T18	1
valid_sources[0x26]	1930	1			T4	3		T9	4		T17	1
valid_sources[0x27]	2034	1			T100	2		T72	1		T7	4
valid_sources[0x28]	2062	1			T1	2		T4	2		T104	1
valid_sources[0x29]	2043	1			T2	7		T101	3		T72	1
valid_sources[0x2a]	1716	1			T4	2		T9	1		T11	2
valid_sources[0x2b]	1870	1			T4	1		T11	2		T72	2
valid_sources[0x2c]	1859	1			T1	1		T4	1		T104	1
valid_sources[0x2d]	2540	1			T1	4		T4	1		T9	1
valid_sources[0x2e]	2057	1			T72	1		T169	1		T7	1
valid_sources[0x2f]	2300	1			T100	1		T103	1		T112	1
valid_sources[0x30]	1787	1			T4	1		T11	2		T100	1
valid_sources[0x31]	1873	1			T9	1		T17	2		T72	2
valid_sources[0x32]	1694	1			T9	1		T100	1		T103	1
valid_sources[0x33]	1758	1			T4	1		T9	1		T11	2
valid_sources[0x34]	1850	1			T9	1		T11	4		T100	1
valid_sources[0x35]	2044	1			T11	3		T104	2		T72	1
valid_sources[0x36]	1977	1			T4	2		T9	2		T104	2
valid_sources[0x37]	2000	1			T2	11		T4	2		T72	2
valid_sources[0x38]	2039	1			T17	1		T7	3		T108	1
valid_sources[0x39]	2507	1			T105	6		T112	1		T235	1
valid_sources[0x3a]	2846	1			T9	1		T6	980		T103	1
valid_sources[0x3b]	1895	1			T4	3		T9	1		T11	3
valid_sources[0x3c]	1937	1			T2	2		T104	2		T72	1
valid_sources[0x3d]	1737	1			T1	17		T9	2		T101	5
valid_sources[0x3e]	2105	1			T4	1		T11	1		T104	1
valid_sources[0x3f]	1881	1			T72	1		T7	1		T106	1
valid_sources[0x40]	2359	1			T2	5		T9	3		T72	1
valid_sources[0x41]	1811	1			T2	2		T4	1		T9	5
valid_sources[0x42]	2222	1			T9	3		T11	1		T72	1
valid_sources[0x43]	1812	1			T3	1		T4	3		T104	3
valid_sources[0x44]	2373	1			T1	11		T72	2		T170	10
valid_sources[0x45]	1979	1			T4	2		T11	1		T7	2
valid_sources[0x46]	2281	1			T104	1		T17	2		T18	1
valid_sources[0x47]	2056	1			T11	2		T18	1		T57	60
valid_sources[0x48]	1660	1			T7	2		T107	2		T108	2
valid_sources[0x49]	1905	1			T4	2		T115	1		T100	2
valid_sources[0x4a]	1641	1			T2	4		T9	2		T99	3
valid_sources[0x4b]	1756	1			T4	3		T7	3		T171	3
valid_sources[0x4c]	2110	1			T1	5		T9	1		T7	2
valid_sources[0x4d]	2323	1			T9	1		T100	1		T72	2
valid_sources[0x4e]	1861	1			T11	4		T100	1		T104	1
valid_sources[0x4f]	1618	1			T2	2		T11	3		T100	1
valid_sources[0x50]	1835	1			T2	2		T4	4		T9	1
valid_sources[0x51]	1669	1			T9	1		T17	1		T7	2
valid_sources[0x52]	1944	1			T2	1		T4	1		T9	1
valid_sources[0x53]	1975	1			T4	1		T9	3		T11	1
valid_sources[0x54]	1944	1			T4	1		T100	1		T112	1
valid_sources[0x55]	2065	1			T101	1		T104	3		T7	3
valid_sources[0x56]	1886	1			T1	2		T4	1		T11	2
valid_sources[0x57]	2028	1			T9	1		T17	2		T112	1
valid_sources[0x58]	1839	1			T104	1		T7	4		T14	17
valid_sources[0x59]	1667	1			T9	2		T104	2		T18	1
valid_sources[0x5a]	2341	1			T4	1		T102	8		T17	1
valid_sources[0x5b]	1755	1			T2	1		T4	2		T9	1
valid_sources[0x5c]	1730	1			T104	1		T7	5		T108	1
valid_sources[0x5d]	1679	1			T9	1		T11	3		T17	4
valid_sources[0x5e]	1781	1			T1	3		T4	1		T100	1
valid_sources[0x5f]	2048	1			T3	1		T4	5		T9	1
valid_sources[0x60]	1695	1			T3	1		T9	2		T112	2
valid_sources[0x61]	1776	1			T1	9		T3	3		T4	1
valid_sources[0x62]	2036	1			T2	4		T3	1		T9	2
valid_sources[0x63]	2344	1			T104	3		T72	1		T18	2
valid_sources[0x64]	1722	1			T2	4		T115	10		T104	1
valid_sources[0x65]	1958	1			T11	5		T72	1		T112	1
valid_sources[0x66]	1810	1			T1	1		T17	1		T18	1
valid_sources[0x67]	1812	1			T9	1		T11	2		T18	1
valid_sources[0x68]	1758	1			T4	1		T9	3		T11	2
valid_sources[0x69]	2087	1			T4	1		T11	2		T18	1
valid_sources[0x6a]	1924	1			T115	5		T103	1		T18	2
valid_sources[0x6b]	1877	1			T9	2		T100	1		T104	7
valid_sources[0x6c]	1870	1			T2	1		T9	6		T104	1
valid_sources[0x6d]	1750	1			T1	10		T4	2		T11	6
valid_sources[0x6e]	2016	1			T4	1		T11	4		T104	1
valid_sources[0x6f]	1983	1			T1	4		T2	3		T3	2
valid_sources[0x70]	2091	1			T4	2		T104	1		T7	3
valid_sources[0x71]	1708	1			T3	1		T100	2		T72	3
valid_sources[0x72]	1826	1			T4	2		T104	2		T72	3
valid_sources[0x73]	2139	1			T9	2		T11	1		T13	160
valid_sources[0x74]	1915	1			T11	1		T104	4		T169	1
valid_sources[0x75]	1961	1			T9	2		T100	1		T72	2
valid_sources[0x76]	2040	1			T100	2		T72	4		T170	3
valid_sources[0x77]	2291	1			T11	1		T104	1		T7	3
valid_sources[0x78]	2206	1			T72	1		T7	4		T108	1
valid_sources[0x79]	1890	1			T11	2		T104	1		T72	3
valid_sources[0x7a]	1880	1			T1	4		T4	2		T9	7
valid_sources[0x7b]	1636	1			T2	1		T4	4		T104	2
valid_sources[0x7c]	1848	1			T9	1		T100	1		T72	4
valid_sources[0x7d]	2020	1			T1	4		T2	4		T3	1
valid_sources[0x7e]	1713	1			T9	1		T105	5		T235	1
valid_sources[0x7f]	1859	1			T100	2		T101	2		T32	40
valid_sources[0x80]	2141	1			T112	3		T14	6		T16	2

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

149167

1

T1

80

T2

60

T3

10

values[0x0]

all_enables

biggest_size

163127

1

T1

41

T2

33

T3

4

values[0x1]

all_enables

biggest_size

163200

1

T1

39

T2

27

T3

6