T1066 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/191.otp_ctrl_init_fail.3705830836 |
|
|
Aug 23 05:45:10 PM UTC 24 |
Aug 23 05:45:14 PM UTC 24 |
109915740 ps |
T1067 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/193.otp_ctrl_init_fail.3333939267 |
|
|
Aug 23 05:45:10 PM UTC 24 |
Aug 23 05:45:14 PM UTC 24 |
1848740858 ps |
T1068 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/186.otp_ctrl_init_fail.2177741247 |
|
|
Aug 23 05:45:09 PM UTC 24 |
Aug 23 05:45:14 PM UTC 24 |
286741923 ps |
T1069 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/189.otp_ctrl_init_fail.3957836362 |
|
|
Aug 23 05:45:10 PM UTC 24 |
Aug 23 05:45:14 PM UTC 24 |
653956927 ps |
T1070 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/57.otp_ctrl_stress_all_with_rand_reset.1341120797 |
|
|
Aug 23 05:41:19 PM UTC 24 |
Aug 23 05:45:14 PM UTC 24 |
16535324354 ps |
T1071 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/194.otp_ctrl_init_fail.3153746153 |
|
|
Aug 23 05:45:10 PM UTC 24 |
Aug 23 05:45:14 PM UTC 24 |
174485237 ps |
T1072 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/190.otp_ctrl_init_fail.2543726514 |
|
|
Aug 23 05:45:10 PM UTC 24 |
Aug 23 05:45:14 PM UTC 24 |
441169332 ps |
T1073 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/195.otp_ctrl_init_fail.2801547318 |
|
|
Aug 23 05:45:10 PM UTC 24 |
Aug 23 05:45:15 PM UTC 24 |
301014394 ps |
T1074 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/188.otp_ctrl_init_fail.2734540537 |
|
|
Aug 23 05:45:09 PM UTC 24 |
Aug 23 05:45:15 PM UTC 24 |
235580485 ps |
T1075 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/192.otp_ctrl_init_fail.2185730889 |
|
|
Aug 23 05:45:10 PM UTC 24 |
Aug 23 05:45:15 PM UTC 24 |
607764383 ps |
T216 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/192.otp_ctrl_parallel_lc_esc.3718707167 |
|
|
Aug 23 05:45:10 PM UTC 24 |
Aug 23 05:45:15 PM UTC 24 |
409790248 ps |
T1076 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/196.otp_ctrl_init_fail.2629540228 |
|
|
Aug 23 05:45:10 PM UTC 24 |
Aug 23 05:45:16 PM UTC 24 |
260424349 ps |
T1077 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/185.otp_ctrl_parallel_lc_esc.609397931 |
|
|
Aug 23 05:45:02 PM UTC 24 |
Aug 23 05:45:17 PM UTC 24 |
671008132 ps |
T1078 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/191.otp_ctrl_parallel_lc_esc.2734353595 |
|
|
Aug 23 05:45:10 PM UTC 24 |
Aug 23 05:45:17 PM UTC 24 |
240504865 ps |
T1079 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/188.otp_ctrl_parallel_lc_esc.165235619 |
|
|
Aug 23 05:45:10 PM UTC 24 |
Aug 23 05:45:17 PM UTC 24 |
3732139200 ps |
T75 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/198.otp_ctrl_init_fail.2196369504 |
|
|
Aug 23 05:45:13 PM UTC 24 |
Aug 23 05:45:17 PM UTC 24 |
140048595 ps |
T1080 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/194.otp_ctrl_parallel_lc_esc.1946262866 |
|
|
Aug 23 05:45:10 PM UTC 24 |
Aug 23 05:45:18 PM UTC 24 |
549658051 ps |
T1081 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/197.otp_ctrl_parallel_lc_esc.2534102007 |
|
|
Aug 23 05:45:13 PM UTC 24 |
Aug 23 05:45:18 PM UTC 24 |
205902977 ps |
T1082 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/197.otp_ctrl_init_fail.3283247843 |
|
|
Aug 23 05:45:13 PM UTC 24 |
Aug 23 05:45:18 PM UTC 24 |
565071307 ps |
T1083 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/199.otp_ctrl_init_fail.1765676518 |
|
|
Aug 23 05:45:13 PM UTC 24 |
Aug 23 05:45:18 PM UTC 24 |
312947699 ps |
T1084 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/193.otp_ctrl_parallel_lc_esc.2954113477 |
|
|
Aug 23 05:45:10 PM UTC 24 |
Aug 23 05:45:18 PM UTC 24 |
382675771 ps |
T1085 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/195.otp_ctrl_parallel_lc_esc.1122205651 |
|
|
Aug 23 05:45:10 PM UTC 24 |
Aug 23 05:45:18 PM UTC 24 |
180620051 ps |
T221 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/186.otp_ctrl_parallel_lc_esc.3832351153 |
|
|
Aug 23 05:45:09 PM UTC 24 |
Aug 23 05:45:18 PM UTC 24 |
362813512 ps |
T1086 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/199.otp_ctrl_parallel_lc_esc.109253291 |
|
|
Aug 23 05:45:13 PM UTC 24 |
Aug 23 05:45:18 PM UTC 24 |
84768399 ps |
T1087 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/190.otp_ctrl_parallel_lc_esc.3334869891 |
|
|
Aug 23 05:45:10 PM UTC 24 |
Aug 23 05:45:20 PM UTC 24 |
809327971 ps |
T1088 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/210.otp_ctrl_init_fail.267169635 |
|
|
Aug 23 05:45:19 PM UTC 24 |
Aug 23 05:45:23 PM UTC 24 |
129922315 ps |
T1089 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/202.otp_ctrl_init_fail.982411972 |
|
|
Aug 23 05:45:19 PM UTC 24 |
Aug 23 05:45:23 PM UTC 24 |
154857154 ps |
T1090 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/208.otp_ctrl_init_fail.1598326208 |
|
|
Aug 23 05:45:19 PM UTC 24 |
Aug 23 05:45:23 PM UTC 24 |
148750366 ps |
T152 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/209.otp_ctrl_init_fail.1251889728 |
|
|
Aug 23 05:45:19 PM UTC 24 |
Aug 23 05:45:23 PM UTC 24 |
140044869 ps |
T1091 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/200.otp_ctrl_init_fail.2159153050 |
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|
Aug 23 05:45:19 PM UTC 24 |
Aug 23 05:45:23 PM UTC 24 |
172398398 ps |
T1092 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/211.otp_ctrl_init_fail.2419096026 |
|
|
Aug 23 05:45:19 PM UTC 24 |
Aug 23 05:45:24 PM UTC 24 |
239226785 ps |
T272 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/201.otp_ctrl_init_fail.485431701 |
|
|
Aug 23 05:45:19 PM UTC 24 |
Aug 23 05:45:24 PM UTC 24 |
122376789 ps |
T1093 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/205.otp_ctrl_init_fail.1122467898 |
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|
Aug 23 05:45:19 PM UTC 24 |
Aug 23 05:45:24 PM UTC 24 |
139846614 ps |
T77 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/212.otp_ctrl_init_fail.1928383251 |
|
|
Aug 23 05:45:19 PM UTC 24 |
Aug 23 05:45:24 PM UTC 24 |
160947615 ps |
T1094 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/207.otp_ctrl_init_fail.1886864057 |
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|
Aug 23 05:45:19 PM UTC 24 |
Aug 23 05:45:24 PM UTC 24 |
440372124 ps |
T1095 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/215.otp_ctrl_init_fail.2661842806 |
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|
Aug 23 05:45:19 PM UTC 24 |
Aug 23 05:45:24 PM UTC 24 |
298525174 ps |
T1096 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/213.otp_ctrl_init_fail.2757936648 |
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|
Aug 23 05:45:19 PM UTC 24 |
Aug 23 05:45:24 PM UTC 24 |
551912990 ps |
T1097 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/214.otp_ctrl_init_fail.72199083 |
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|
Aug 23 05:45:19 PM UTC 24 |
Aug 23 05:45:24 PM UTC 24 |
458842370 ps |
T268 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/206.otp_ctrl_init_fail.264468947 |
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|
Aug 23 05:45:19 PM UTC 24 |
Aug 23 05:45:24 PM UTC 24 |
2424022370 ps |
T1098 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/204.otp_ctrl_init_fail.2862802599 |
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|
Aug 23 05:45:19 PM UTC 24 |
Aug 23 05:45:25 PM UTC 24 |
2306301386 ps |
T1099 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/198.otp_ctrl_parallel_lc_esc.4076987939 |
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|
Aug 23 05:45:13 PM UTC 24 |
Aug 23 05:45:25 PM UTC 24 |
3641217018 ps |
T1100 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/232.otp_ctrl_init_fail.3550904527 |
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|
Aug 23 05:45:29 PM UTC 24 |
Aug 23 05:45:32 PM UTC 24 |
1263197402 ps |
T1101 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/217.otp_ctrl_init_fail.2257851347 |
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|
Aug 23 05:45:28 PM UTC 24 |
Aug 23 05:45:32 PM UTC 24 |
296702475 ps |
T1102 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/216.otp_ctrl_init_fail.2130064766 |
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|
Aug 23 05:45:28 PM UTC 24 |
Aug 23 05:45:33 PM UTC 24 |
260756593 ps |
T1103 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/241.otp_ctrl_init_fail.1168740241 |
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|
Aug 23 05:45:29 PM UTC 24 |
Aug 23 05:45:33 PM UTC 24 |
182166376 ps |
T1104 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/242.otp_ctrl_init_fail.2070994370 |
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|
Aug 23 05:45:29 PM UTC 24 |
Aug 23 05:45:33 PM UTC 24 |
211607163 ps |
T1105 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/225.otp_ctrl_init_fail.4195432388 |
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|
Aug 23 05:45:28 PM UTC 24 |
Aug 23 05:45:33 PM UTC 24 |
352569684 ps |
T1106 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/235.otp_ctrl_init_fail.1948687207 |
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|
Aug 23 05:45:29 PM UTC 24 |
Aug 23 05:45:33 PM UTC 24 |
259827192 ps |
T1107 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/222.otp_ctrl_init_fail.3061228306 |
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|
Aug 23 05:45:28 PM UTC 24 |
Aug 23 05:45:33 PM UTC 24 |
120286498 ps |
T85 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/226.otp_ctrl_init_fail.2349468740 |
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|
Aug 23 05:45:28 PM UTC 24 |
Aug 23 05:45:33 PM UTC 24 |
124003719 ps |
T1108 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/223.otp_ctrl_init_fail.2749272436 |
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|
Aug 23 05:45:28 PM UTC 24 |
Aug 23 05:45:33 PM UTC 24 |
170910066 ps |
T1109 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/240.otp_ctrl_init_fail.3168489554 |
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|
Aug 23 05:45:29 PM UTC 24 |
Aug 23 05:45:33 PM UTC 24 |
212075473 ps |
T1110 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/237.otp_ctrl_init_fail.2176125987 |
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|
Aug 23 05:45:29 PM UTC 24 |
Aug 23 05:45:33 PM UTC 24 |
282199370 ps |
T1111 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/220.otp_ctrl_init_fail.1978416990 |
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|
Aug 23 05:45:28 PM UTC 24 |
Aug 23 05:45:33 PM UTC 24 |
568788873 ps |
T1112 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/230.otp_ctrl_init_fail.786420122 |
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|
Aug 23 05:45:28 PM UTC 24 |
Aug 23 05:45:33 PM UTC 24 |
630784084 ps |
T1113 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/233.otp_ctrl_init_fail.1263550045 |
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|
Aug 23 05:45:29 PM UTC 24 |
Aug 23 05:45:33 PM UTC 24 |
144607346 ps |
T1114 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/224.otp_ctrl_init_fail.1921656777 |
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|
Aug 23 05:45:28 PM UTC 24 |
Aug 23 05:45:33 PM UTC 24 |
562881429 ps |
T1115 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/236.otp_ctrl_init_fail.1196624987 |
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|
Aug 23 05:45:29 PM UTC 24 |
Aug 23 05:45:33 PM UTC 24 |
464078830 ps |
T76 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/227.otp_ctrl_init_fail.3099762454 |
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|
Aug 23 05:45:28 PM UTC 24 |
Aug 23 05:45:33 PM UTC 24 |
310720229 ps |
T1116 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/244.otp_ctrl_init_fail.946302054 |
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|
Aug 23 05:45:29 PM UTC 24 |
Aug 23 05:45:33 PM UTC 24 |
136783133 ps |
T1117 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/229.otp_ctrl_init_fail.3024987477 |
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|
Aug 23 05:45:28 PM UTC 24 |
Aug 23 05:45:33 PM UTC 24 |
575571342 ps |
T1118 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/218.otp_ctrl_init_fail.968224250 |
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|
Aug 23 05:45:28 PM UTC 24 |
Aug 23 05:45:33 PM UTC 24 |
133697874 ps |
T1119 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/221.otp_ctrl_init_fail.3841569600 |
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|
Aug 23 05:45:28 PM UTC 24 |
Aug 23 05:45:34 PM UTC 24 |
134203143 ps |
T1120 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/231.otp_ctrl_init_fail.2902003540 |
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|
Aug 23 05:45:29 PM UTC 24 |
Aug 23 05:45:34 PM UTC 24 |
1549714206 ps |
T1121 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/219.otp_ctrl_init_fail.2586070837 |
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|
Aug 23 05:45:28 PM UTC 24 |
Aug 23 05:45:34 PM UTC 24 |
2202955933 ps |
T1122 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/239.otp_ctrl_init_fail.99415224 |
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|
Aug 23 05:45:29 PM UTC 24 |
Aug 23 05:45:34 PM UTC 24 |
641234635 ps |
T1123 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/228.otp_ctrl_init_fail.170407540 |
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|
Aug 23 05:45:28 PM UTC 24 |
Aug 23 05:45:34 PM UTC 24 |
296710606 ps |
T1124 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/238.otp_ctrl_init_fail.729804576 |
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|
Aug 23 05:45:29 PM UTC 24 |
Aug 23 05:45:34 PM UTC 24 |
112555588 ps |
T1125 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/234.otp_ctrl_init_fail.2298342003 |
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|
Aug 23 05:45:29 PM UTC 24 |
Aug 23 05:45:34 PM UTC 24 |
264123787 ps |
T1126 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/243.otp_ctrl_init_fail.1772742352 |
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|
Aug 23 05:45:29 PM UTC 24 |
Aug 23 05:45:34 PM UTC 24 |
249822633 ps |
T36 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/245.otp_ctrl_init_fail.4202315035 |
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|
Aug 23 05:45:29 PM UTC 24 |
Aug 23 05:45:35 PM UTC 24 |
3087852963 ps |
T1127 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/246.otp_ctrl_init_fail.1904792382 |
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|
Aug 23 05:45:30 PM UTC 24 |
Aug 23 05:45:37 PM UTC 24 |
2044801931 ps |
T1128 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/250.otp_ctrl_init_fail.2801638957 |
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|
Aug 23 05:45:40 PM UTC 24 |
Aug 23 05:45:44 PM UTC 24 |
258394506 ps |
T1129 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/272.otp_ctrl_init_fail.4037465658 |
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Aug 23 05:45:41 PM UTC 24 |
Aug 23 05:45:45 PM UTC 24 |
102502619 ps |
T1130 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/263.otp_ctrl_init_fail.3917723360 |
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|
Aug 23 05:45:41 PM UTC 24 |
Aug 23 05:45:45 PM UTC 24 |
149443646 ps |
T69 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/254.otp_ctrl_init_fail.3277253597 |
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|
Aug 23 05:45:41 PM UTC 24 |
Aug 23 05:45:45 PM UTC 24 |
225525713 ps |
T1131 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/260.otp_ctrl_init_fail.2113541564 |
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|
Aug 23 05:45:41 PM UTC 24 |
Aug 23 05:45:45 PM UTC 24 |
342705799 ps |
T1132 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/256.otp_ctrl_init_fail.2661825143 |
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|
Aug 23 05:45:41 PM UTC 24 |
Aug 23 05:45:45 PM UTC 24 |
141117259 ps |
T1133 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/253.otp_ctrl_init_fail.3413725451 |
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|
Aug 23 05:45:40 PM UTC 24 |
Aug 23 05:45:45 PM UTC 24 |
378910871 ps |
T1134 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/271.otp_ctrl_init_fail.907433677 |
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|
Aug 23 05:45:41 PM UTC 24 |
Aug 23 05:45:45 PM UTC 24 |
209673836 ps |
T1135 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/265.otp_ctrl_init_fail.2147788098 |
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|
Aug 23 05:45:41 PM UTC 24 |
Aug 23 05:45:45 PM UTC 24 |
386895219 ps |
T1136 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/255.otp_ctrl_init_fail.3074568621 |
|
|
Aug 23 05:45:41 PM UTC 24 |
Aug 23 05:45:45 PM UTC 24 |
455857417 ps |
T1137 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/249.otp_ctrl_init_fail.401001694 |
|
|
Aug 23 05:45:40 PM UTC 24 |
Aug 23 05:45:45 PM UTC 24 |
424175504 ps |
T1138 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/264.otp_ctrl_init_fail.65532080 |
|
|
Aug 23 05:45:41 PM UTC 24 |
Aug 23 05:45:46 PM UTC 24 |
166669358 ps |
T1139 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/258.otp_ctrl_init_fail.270291418 |
|
|
Aug 23 05:45:41 PM UTC 24 |
Aug 23 05:45:46 PM UTC 24 |
173301708 ps |
T1140 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/266.otp_ctrl_init_fail.1516505593 |
|
|
Aug 23 05:45:41 PM UTC 24 |
Aug 23 05:45:46 PM UTC 24 |
151849464 ps |
T1141 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/267.otp_ctrl_init_fail.1517582535 |
|
|
Aug 23 05:45:41 PM UTC 24 |
Aug 23 05:45:46 PM UTC 24 |
163272697 ps |
T1142 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/251.otp_ctrl_init_fail.1268101687 |
|
|
Aug 23 05:45:40 PM UTC 24 |
Aug 23 05:45:46 PM UTC 24 |
171090308 ps |
T1143 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/273.otp_ctrl_init_fail.4115215369 |
|
|
Aug 23 05:45:41 PM UTC 24 |
Aug 23 05:45:46 PM UTC 24 |
184382005 ps |
T1144 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/262.otp_ctrl_init_fail.3050188107 |
|
|
Aug 23 05:45:41 PM UTC 24 |
Aug 23 05:45:46 PM UTC 24 |
454134149 ps |
T1145 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/275.otp_ctrl_init_fail.3727240437 |
|
|
Aug 23 05:45:41 PM UTC 24 |
Aug 23 05:45:46 PM UTC 24 |
499407078 ps |
T271 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/259.otp_ctrl_init_fail.2037757584 |
|
|
Aug 23 05:45:41 PM UTC 24 |
Aug 23 05:45:46 PM UTC 24 |
336710194 ps |
T1146 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/248.otp_ctrl_init_fail.3052346658 |
|
|
Aug 23 05:45:40 PM UTC 24 |
Aug 23 05:45:46 PM UTC 24 |
1753077908 ps |
T1147 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/257.otp_ctrl_init_fail.3433784482 |
|
|
Aug 23 05:45:41 PM UTC 24 |
Aug 23 05:45:46 PM UTC 24 |
575596268 ps |
T1148 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/247.otp_ctrl_init_fail.1651432262 |
|
|
Aug 23 05:45:40 PM UTC 24 |
Aug 23 05:45:46 PM UTC 24 |
2550385085 ps |
T1149 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/268.otp_ctrl_init_fail.3163402994 |
|
|
Aug 23 05:45:41 PM UTC 24 |
Aug 23 05:45:46 PM UTC 24 |
554742460 ps |
T1150 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/274.otp_ctrl_init_fail.337385872 |
|
|
Aug 23 05:45:41 PM UTC 24 |
Aug 23 05:45:46 PM UTC 24 |
249610770 ps |
T1151 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/252.otp_ctrl_init_fail.1467214292 |
|
|
Aug 23 05:45:40 PM UTC 24 |
Aug 23 05:45:47 PM UTC 24 |
2262289182 ps |
T1152 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/270.otp_ctrl_init_fail.770089081 |
|
|
Aug 23 05:45:41 PM UTC 24 |
Aug 23 05:45:47 PM UTC 24 |
2224484726 ps |
T173 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/269.otp_ctrl_init_fail.834222881 |
|
|
Aug 23 05:45:41 PM UTC 24 |
Aug 23 05:45:47 PM UTC 24 |
2157524904 ps |
T1153 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/276.otp_ctrl_init_fail.2422754808 |
|
|
Aug 23 05:45:41 PM UTC 24 |
Aug 23 05:45:47 PM UTC 24 |
210891309 ps |
T1154 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/277.otp_ctrl_init_fail.16243891 |
|
|
Aug 23 05:45:42 PM UTC 24 |
Aug 23 05:45:47 PM UTC 24 |
289612589 ps |
T1155 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/261.otp_ctrl_init_fail.1881460644 |
|
|
Aug 23 05:45:41 PM UTC 24 |
Aug 23 05:45:47 PM UTC 24 |
2031461809 ps |
T422 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/90.otp_ctrl_stress_all_with_rand_reset.3017924335 |
|
|
Aug 23 05:43:18 PM UTC 24 |
Aug 23 05:45:47 PM UTC 24 |
66351566077 ps |
T1156 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/278.otp_ctrl_init_fail.207639996 |
|
|
Aug 23 05:45:53 PM UTC 24 |
Aug 23 05:45:57 PM UTC 24 |
102333833 ps |
T1157 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/285.otp_ctrl_init_fail.2841163880 |
|
|
Aug 23 05:45:53 PM UTC 24 |
Aug 23 05:45:57 PM UTC 24 |
142894457 ps |
T1158 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/295.otp_ctrl_init_fail.509879178 |
|
|
Aug 23 05:45:53 PM UTC 24 |
Aug 23 05:45:57 PM UTC 24 |
126912546 ps |
T1159 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/291.otp_ctrl_init_fail.3207979590 |
|
|
Aug 23 05:45:53 PM UTC 24 |
Aug 23 05:45:57 PM UTC 24 |
126171604 ps |
T1160 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/280.otp_ctrl_init_fail.2766933380 |
|
|
Aug 23 05:45:53 PM UTC 24 |
Aug 23 05:45:57 PM UTC 24 |
569216226 ps |
T1161 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/294.otp_ctrl_init_fail.4200571324 |
|
|
Aug 23 05:45:53 PM UTC 24 |
Aug 23 05:45:57 PM UTC 24 |
123004080 ps |
T1162 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/299.otp_ctrl_init_fail.1894092013 |
|
|
Aug 23 05:45:53 PM UTC 24 |
Aug 23 05:45:57 PM UTC 24 |
404425867 ps |
T1163 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/281.otp_ctrl_init_fail.91678050 |
|
|
Aug 23 05:45:53 PM UTC 24 |
Aug 23 05:45:57 PM UTC 24 |
604035822 ps |
T1164 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/290.otp_ctrl_init_fail.3383538405 |
|
|
Aug 23 05:45:53 PM UTC 24 |
Aug 23 05:45:57 PM UTC 24 |
219452296 ps |
T1165 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/287.otp_ctrl_init_fail.1136103318 |
|
|
Aug 23 05:45:53 PM UTC 24 |
Aug 23 05:45:58 PM UTC 24 |
250197868 ps |
T1166 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/286.otp_ctrl_init_fail.574921172 |
|
|
Aug 23 05:45:53 PM UTC 24 |
Aug 23 05:45:58 PM UTC 24 |
337568989 ps |
T1167 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/293.otp_ctrl_init_fail.787209312 |
|
|
Aug 23 05:45:53 PM UTC 24 |
Aug 23 05:45:58 PM UTC 24 |
282292115 ps |
T1168 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/289.otp_ctrl_init_fail.2933502954 |
|
|
Aug 23 05:45:53 PM UTC 24 |
Aug 23 05:45:58 PM UTC 24 |
315339938 ps |
T1169 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/279.otp_ctrl_init_fail.3560075634 |
|
|
Aug 23 05:45:53 PM UTC 24 |
Aug 23 05:45:58 PM UTC 24 |
2224911806 ps |
T1170 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/282.otp_ctrl_init_fail.2251304676 |
|
|
Aug 23 05:45:53 PM UTC 24 |
Aug 23 05:45:58 PM UTC 24 |
117726321 ps |
T1171 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/297.otp_ctrl_init_fail.3110046455 |
|
|
Aug 23 05:45:53 PM UTC 24 |
Aug 23 05:45:58 PM UTC 24 |
514721627 ps |
T174 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/298.otp_ctrl_init_fail.2671621398 |
|
|
Aug 23 05:45:53 PM UTC 24 |
Aug 23 05:45:58 PM UTC 24 |
541451627 ps |
T1172 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/283.otp_ctrl_init_fail.1031764571 |
|
|
Aug 23 05:45:53 PM UTC 24 |
Aug 23 05:45:58 PM UTC 24 |
2431929685 ps |
T1173 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/288.otp_ctrl_init_fail.731397323 |
|
|
Aug 23 05:45:53 PM UTC 24 |
Aug 23 05:45:58 PM UTC 24 |
549594812 ps |
T1174 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/284.otp_ctrl_init_fail.465923695 |
|
|
Aug 23 05:45:53 PM UTC 24 |
Aug 23 05:45:58 PM UTC 24 |
192270228 ps |
T1175 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/292.otp_ctrl_init_fail.638574440 |
|
|
Aug 23 05:45:53 PM UTC 24 |
Aug 23 05:45:59 PM UTC 24 |
2735624254 ps |
T1176 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/default/296.otp_ctrl_init_fail.2961447240 |
|
|
Aug 23 05:45:53 PM UTC 24 |
Aug 23 05:46:00 PM UTC 24 |
1702767779 ps |
T1177 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_intr_test.1829086867 |
|
|
Aug 23 05:10:19 PM UTC 24 |
Aug 23 05:10:21 PM UTC 24 |
43985210 ps |
T1178 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_mem_walk.1714716139 |
|
|
Aug 23 05:10:19 PM UTC 24 |
Aug 23 05:10:21 PM UTC 24 |
36620941 ps |
T1179 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_tl_errors.4149477720 |
|
|
Aug 23 05:10:17 PM UTC 24 |
Aug 23 05:10:21 PM UTC 24 |
221538470 ps |
T1180 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_mem_partial_access.1205294858 |
|
|
Aug 23 05:10:22 PM UTC 24 |
Aug 23 05:10:24 PM UTC 24 |
36478109 ps |
T281 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_hw_reset.85294738 |
|
|
Aug 23 05:10:22 PM UTC 24 |
Aug 23 05:10:25 PM UTC 24 |
75138858 ps |
T282 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_rw.2456051026 |
|
|
Aug 23 05:10:22 PM UTC 24 |
Aug 23 05:10:25 PM UTC 24 |
643292527 ps |
T284 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_same_csr_outstanding.4138594059 |
|
|
Aug 23 05:10:26 PM UTC 24 |
Aug 23 05:10:29 PM UTC 24 |
175269267 ps |
T283 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_aliasing.1695723325 |
|
|
Aug 23 05:10:25 PM UTC 24 |
Aug 23 05:10:29 PM UTC 24 |
405183659 ps |
T388 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_mem_rw_with_rand_reset.2377044056 |
|
|
Aug 23 05:10:27 PM UTC 24 |
Aug 23 05:10:30 PM UTC 24 |
142261740 ps |
T1181 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_mem_walk.2302237941 |
|
|
Aug 23 05:10:32 PM UTC 24 |
Aug 23 05:10:34 PM UTC 24 |
67271756 ps |
T1182 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_intr_test.1178711011 |
|
|
Aug 23 05:10:32 PM UTC 24 |
Aug 23 05:10:34 PM UTC 24 |
70379166 ps |
T301 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_bit_bash.2243281850 |
|
|
Aug 23 05:10:25 PM UTC 24 |
Aug 23 05:10:34 PM UTC 24 |
916589217 ps |
T278 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_tl_intg_err.853686305 |
|
|
Aug 23 05:10:17 PM UTC 24 |
Aug 23 05:10:34 PM UTC 24 |
1310062609 ps |
T1183 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_mem_partial_access.3940345456 |
|
|
Aug 23 05:10:33 PM UTC 24 |
Aug 23 05:10:35 PM UTC 24 |
49988576 ps |
T1184 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_tl_errors.1436554252 |
|
|
Aug 23 05:10:30 PM UTC 24 |
Aug 23 05:10:36 PM UTC 24 |
489116149 ps |
T322 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_rw.662172273 |
|
|
Aug 23 05:10:35 PM UTC 24 |
Aug 23 05:10:37 PM UTC 24 |
571048727 ps |
T329 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_hw_reset.3269857176 |
|
|
Aug 23 05:10:35 PM UTC 24 |
Aug 23 05:10:38 PM UTC 24 |
186066959 ps |
T302 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_bit_bash.1470643291 |
|
|
Aug 23 05:10:35 PM UTC 24 |
Aug 23 05:10:39 PM UTC 24 |
117165745 ps |
T323 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_same_csr_outstanding.206706023 |
|
|
Aug 23 05:10:36 PM UTC 24 |
Aug 23 05:10:40 PM UTC 24 |
114031134 ps |
T1185 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_mem_rw_with_rand_reset.1554771149 |
|
|
Aug 23 05:10:37 PM UTC 24 |
Aug 23 05:10:40 PM UTC 24 |
140728267 ps |
T1186 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_intr_test.3987508775 |
|
|
Aug 23 05:10:40 PM UTC 24 |
Aug 23 05:10:42 PM UTC 24 |
43950066 ps |
T1187 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_mem_partial_access.2451258083 |
|
|
Aug 23 05:10:40 PM UTC 24 |
Aug 23 05:10:42 PM UTC 24 |
38448170 ps |
T1188 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_mem_walk.3209600186 |
|
|
Aug 23 05:10:40 PM UTC 24 |
Aug 23 05:10:42 PM UTC 24 |
135103302 ps |
T303 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_hw_reset.3284924422 |
|
|
Aug 23 05:10:40 PM UTC 24 |
Aug 23 05:10:43 PM UTC 24 |
140762200 ps |
T1189 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_tl_errors.2029751270 |
|
|
Aug 23 05:10:38 PM UTC 24 |
Aug 23 05:10:45 PM UTC 24 |
651755583 ps |
T279 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_tl_intg_err.1457250975 |
|
|
Aug 23 05:10:30 PM UTC 24 |
Aug 23 05:10:45 PM UTC 24 |
9774801704 ps |
T304 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_aliasing.943405785 |
|
|
Aug 23 05:10:36 PM UTC 24 |
Aug 23 05:10:46 PM UTC 24 |
3259174944 ps |
T324 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_rw.2505402502 |
|
|
Aug 23 05:10:45 PM UTC 24 |
Aug 23 05:10:48 PM UTC 24 |
671094480 ps |
T305 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_same_csr_outstanding.1867060482 |
|
|
Aug 23 05:10:45 PM UTC 24 |
Aug 23 05:10:48 PM UTC 24 |
50071114 ps |
T1190 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_intr_test.33517375 |
|
|
Aug 23 05:10:46 PM UTC 24 |
Aug 23 05:10:48 PM UTC 24 |
141855369 ps |
T1191 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_mem_rw_with_rand_reset.715645378 |
|
|
Aug 23 05:10:45 PM UTC 24 |
Aug 23 05:10:49 PM UTC 24 |
1105085206 ps |
T1192 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_mem_walk.3920287153 |
|
|
Aug 23 05:10:47 PM UTC 24 |
Aug 23 05:10:49 PM UTC 24 |
139147734 ps |
T306 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_aliasing.1916742200 |
|
|
Aug 23 05:10:45 PM UTC 24 |
Aug 23 05:10:50 PM UTC 24 |
1551480943 ps |
T1193 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_mem_partial_access.1774406345 |
|
|
Aug 23 05:10:48 PM UTC 24 |
Aug 23 05:10:50 PM UTC 24 |
40745919 ps |
T280 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_tl_intg_err.3497439441 |
|
|
Aug 23 05:10:39 PM UTC 24 |
Aug 23 05:10:50 PM UTC 24 |
1005814355 ps |
T307 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_bit_bash.1950748902 |
|
|
Aug 23 05:10:45 PM UTC 24 |
Aug 23 05:10:50 PM UTC 24 |
1272873159 ps |
T308 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_hw_reset.2647474214 |
|
|
Aug 23 05:10:48 PM UTC 24 |
Aug 23 05:10:51 PM UTC 24 |
109112202 ps |
T1194 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_tl_errors.3206145614 |
|
|
Aug 23 05:10:45 PM UTC 24 |
Aug 23 05:10:52 PM UTC 24 |
188551172 ps |
T311 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_rw.3313869471 |
|
|
Aug 23 05:10:49 PM UTC 24 |
Aug 23 05:10:52 PM UTC 24 |
86930061 ps |
T312 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_same_csr_outstanding.2630218928 |
|
|
Aug 23 05:10:51 PM UTC 24 |
Aug 23 05:10:53 PM UTC 24 |
75160558 ps |
T1195 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_mem_rw_with_rand_reset.823677207 |
|
|
Aug 23 05:10:51 PM UTC 24 |
Aug 23 05:10:54 PM UTC 24 |
103684849 ps |
T313 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_aliasing.1808890711 |
|
|
Aug 23 05:10:49 PM UTC 24 |
Aug 23 05:10:54 PM UTC 24 |
221304768 ps |
T1196 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_mem_walk.159729012 |
|
|
Aug 23 05:10:52 PM UTC 24 |
Aug 23 05:10:54 PM UTC 24 |
72498405 ps |
T1197 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_intr_test.3386090988 |
|
|
Aug 23 05:10:52 PM UTC 24 |
Aug 23 05:10:54 PM UTC 24 |
76812740 ps |
T1198 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_mem_partial_access.3748704008 |
|
|
Aug 23 05:10:52 PM UTC 24 |
Aug 23 05:10:54 PM UTC 24 |
549903174 ps |
T314 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_csr_rw.940876993 |
|
|
Aug 23 05:10:52 PM UTC 24 |
Aug 23 05:10:55 PM UTC 24 |
90524313 ps |
T315 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_csr_hw_reset.3925939473 |
|
|
Aug 23 05:10:52 PM UTC 24 |
Aug 23 05:10:55 PM UTC 24 |
149000378 ps |
T1199 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_tl_errors.1576414362 |
|
|
Aug 23 05:10:52 PM UTC 24 |
Aug 23 05:10:56 PM UTC 24 |
168959836 ps |
T1200 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_csr_aliasing.312959533 |
|
|
Aug 23 05:10:53 PM UTC 24 |
Aug 23 05:10:57 PM UTC 24 |
213902424 ps |
T325 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_same_csr_outstanding.1938823159 |
|
|
Aug 23 05:10:54 PM UTC 24 |
Aug 23 05:10:57 PM UTC 24 |
68522773 ps |
T1201 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_csr_rw.3188278603 |
|
|
Aug 23 05:10:55 PM UTC 24 |
Aug 23 05:10:58 PM UTC 24 |
42773880 ps |
T1202 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_csr_mem_rw_with_rand_reset.219422566 |
|
|
Aug 23 05:10:54 PM UTC 24 |
Aug 23 05:10:58 PM UTC 24 |
207021697 ps |
T1203 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_bit_bash.3817468594 |
|
|
Aug 23 05:10:49 PM UTC 24 |
Aug 23 05:10:58 PM UTC 24 |
855888585 ps |
T1204 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_intr_test.3518916205 |
|
|
Aug 23 05:10:55 PM UTC 24 |
Aug 23 05:10:58 PM UTC 24 |
572407615 ps |
T326 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_same_csr_outstanding.1238613789 |
|
|
Aug 23 05:10:55 PM UTC 24 |
Aug 23 05:10:59 PM UTC 24 |
107446025 ps |
T320 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_csr_bit_bash.1411359938 |
|
|
Aug 23 05:10:53 PM UTC 24 |
Aug 23 05:10:59 PM UTC 24 |
567757574 ps |
T1205 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_intr_test.951804905 |
|
|
Aug 23 05:10:58 PM UTC 24 |
Aug 23 05:11:00 PM UTC 24 |
557543373 ps |
T1206 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_tl_errors.2170193171 |
|
|
Aug 23 05:10:54 PM UTC 24 |
Aug 23 05:11:00 PM UTC 24 |
81858212 ps |
T1207 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_csr_mem_rw_with_rand_reset.1374189093 |
|
|
Aug 23 05:10:56 PM UTC 24 |
Aug 23 05:11:00 PM UTC 24 |
1694407370 ps |
T1208 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_tl_errors.2606859069 |
|
|
Aug 23 05:10:57 PM UTC 24 |
Aug 23 05:11:00 PM UTC 24 |
308168966 ps |
T286 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_tl_intg_err.3035592844 |
|
|
Aug 23 05:10:52 PM UTC 24 |
Aug 23 05:11:02 PM UTC 24 |
596498728 ps |
T1209 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_csr_mem_rw_with_rand_reset.2453044456 |
|
|
Aug 23 05:10:59 PM UTC 24 |
Aug 23 05:11:02 PM UTC 24 |
122901231 ps |
T1210 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_csr_rw.1655743767 |
|
|
Aug 23 05:10:59 PM UTC 24 |
Aug 23 05:11:02 PM UTC 24 |
638197862 ps |
T327 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_same_csr_outstanding.3429439680 |
|
|
Aug 23 05:10:59 PM UTC 24 |
Aug 23 05:11:02 PM UTC 24 |
1027266308 ps |
T1211 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_intr_test.1233733645 |
|
|
Aug 23 05:11:00 PM UTC 24 |
Aug 23 05:11:02 PM UTC 24 |
40472961 ps |
T328 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_csr_rw.795718375 |
|
|
Aug 23 05:11:00 PM UTC 24 |
Aug 23 05:11:02 PM UTC 24 |
40703511 ps |
T1212 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_intr_test.3124457150 |
|
|
Aug 23 05:11:01 PM UTC 24 |
Aug 23 05:11:04 PM UTC 24 |
139637611 ps |
T1213 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_csr_mem_rw_with_rand_reset.914762478 |
|
|
Aug 23 05:11:01 PM UTC 24 |
Aug 23 05:11:04 PM UTC 24 |
83449316 ps |
T1214 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_same_csr_outstanding.1558101484 |
|
|
Aug 23 05:11:01 PM UTC 24 |
Aug 23 05:11:04 PM UTC 24 |
1129609299 ps |
T1215 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_tl_errors.3898036775 |
|
|
Aug 23 05:10:59 PM UTC 24 |
Aug 23 05:11:05 PM UTC 24 |
531490800 ps |
T316 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_csr_rw.3280173145 |
|
|
Aug 23 05:11:02 PM UTC 24 |
Aug 23 05:11:05 PM UTC 24 |
686529875 ps |
T1216 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_csr_mem_rw_with_rand_reset.1832438706 |
|
|
Aug 23 05:11:02 PM UTC 24 |
Aug 23 05:11:05 PM UTC 24 |
84447157 ps |
T1217 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_same_csr_outstanding.7571777 |
|
|
Aug 23 05:11:02 PM UTC 24 |
Aug 23 05:11:05 PM UTC 24 |
72382478 ps |
T1218 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_intr_test.855160601 |
|
|
Aug 23 05:11:04 PM UTC 24 |
Aug 23 05:11:06 PM UTC 24 |
39729633 ps |
T363 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_tl_intg_err.1843649403 |
|
|
Aug 23 05:10:46 PM UTC 24 |
Aug 23 05:11:06 PM UTC 24 |
5773887937 ps |
T1219 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_csr_rw.1362155649 |
|
|
Aug 23 05:11:04 PM UTC 24 |
Aug 23 05:11:06 PM UTC 24 |
37447359 ps |
T1220 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_tl_errors.33489342 |
|
|
Aug 23 05:11:01 PM UTC 24 |
Aug 23 05:11:06 PM UTC 24 |
246807680 ps |
T1221 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_tl_errors.3126149145 |
|
|
Aug 23 05:11:02 PM UTC 24 |
Aug 23 05:11:06 PM UTC 24 |
873627664 ps |
T1222 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_intr_test.923088742 |
|
|
Aug 23 05:11:06 PM UTC 24 |
Aug 23 05:11:09 PM UTC 24 |
77565124 ps |
T1223 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_csr_rw.1813103325 |
|
|
Aug 23 05:11:06 PM UTC 24 |
Aug 23 05:11:09 PM UTC 24 |
45146570 ps |
T1224 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_intr_test.3938264284 |
|
|
Aug 23 05:11:07 PM UTC 24 |
Aug 23 05:11:09 PM UTC 24 |
132218957 ps |
T1225 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_same_csr_outstanding.230229131 |
|
|
Aug 23 05:11:06 PM UTC 24 |
Aug 23 05:11:09 PM UTC 24 |
86625950 ps |
T374 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_tl_intg_err.2097456268 |
|
|
Aug 23 05:10:59 PM UTC 24 |
Aug 23 05:11:09 PM UTC 24 |
871978197 ps |
T1226 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_csr_mem_rw_with_rand_reset.2362027805 |
|
|
Aug 23 05:11:06 PM UTC 24 |
Aug 23 05:11:09 PM UTC 24 |
169859042 ps |
T1227 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_same_csr_outstanding.3622499945 |
|
|
Aug 23 05:11:06 PM UTC 24 |
Aug 23 05:11:09 PM UTC 24 |
133855148 ps |
T1228 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_csr_rw.1512994404 |
|
|
Aug 23 05:11:08 PM UTC 24 |
Aug 23 05:11:10 PM UTC 24 |
49228175 ps |
T1229 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_same_csr_outstanding.2555633062 |
|
|
Aug 23 05:11:08 PM UTC 24 |
Aug 23 05:11:10 PM UTC 24 |
173390668 ps |
T1230 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_csr_mem_rw_with_rand_reset.3908068835 |
|
|
Aug 23 05:11:06 PM UTC 24 |
Aug 23 05:11:10 PM UTC 24 |
297099178 ps |
T1231 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_tl_errors.1524846188 |
|
|
Aug 23 05:11:06 PM UTC 24 |
Aug 23 05:11:11 PM UTC 24 |
297612157 ps |
T369 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_tl_intg_err.3561290735 |
|
|
Aug 23 05:11:01 PM UTC 24 |
Aug 23 05:11:12 PM UTC 24 |
1492797818 ps |
T1232 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_intr_test.2593009528 |
|
|
Aug 23 05:11:10 PM UTC 24 |
Aug 23 05:11:12 PM UTC 24 |
41140633 ps |
T1233 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_csr_rw.1203995884 |
|
|
Aug 23 05:11:10 PM UTC 24 |
Aug 23 05:11:12 PM UTC 24 |
41657433 ps |
T1234 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_same_csr_outstanding.332635961 |
|
|
Aug 23 05:11:10 PM UTC 24 |
Aug 23 05:11:13 PM UTC 24 |
102453582 ps |
T340 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_tl_errors.851698745 |
|
|
Aug 23 05:11:06 PM UTC 24 |
Aug 23 05:11:13 PM UTC 24 |
677962562 ps |
T1235 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_csr_mem_rw_with_rand_reset.3974601655 |
|
|
Aug 23 05:11:10 PM UTC 24 |
Aug 23 05:11:13 PM UTC 24 |
1090909425 ps |
T1236 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_intr_test.1486133647 |
|
|
Aug 23 05:11:11 PM UTC 24 |
Aug 23 05:11:13 PM UTC 24 |
40798896 ps |
T368 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_tl_intg_err.2141044047 |
|
|
Aug 23 05:10:55 PM UTC 24 |
Aug 23 05:11:13 PM UTC 24 |
2541069245 ps |
T1237 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_csr_mem_rw_with_rand_reset.1381710348 |
|
|
Aug 23 05:11:11 PM UTC 24 |
Aug 23 05:11:14 PM UTC 24 |
110378667 ps |
T317 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_csr_rw.10168040 |
|
|
Aug 23 05:11:12 PM UTC 24 |
Aug 23 05:11:15 PM UTC 24 |
47256493 ps |
T1238 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_tl_errors.1858699849 |
|
|
Aug 23 05:11:11 PM UTC 24 |
Aug 23 05:11:15 PM UTC 24 |
131818176 ps |
T1239 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_same_csr_outstanding.4045522790 |
|
|
Aug 23 05:11:12 PM UTC 24 |
Aug 23 05:11:16 PM UTC 24 |
135420675 ps |
T1240 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_csr_mem_rw_with_rand_reset.1929239171 |
|
|
Aug 23 05:11:13 PM UTC 24 |
Aug 23 05:11:16 PM UTC 24 |
71548690 ps |
T285 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_tl_intg_err.3293159584 |
|
|
Aug 23 05:11:06 PM UTC 24 |
Aug 23 05:11:16 PM UTC 24 |
2475693727 ps |
T1241 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_intr_test.3774615017 |
|
|
Aug 23 05:11:14 PM UTC 24 |
Aug 23 05:11:17 PM UTC 24 |
38970662 ps |
T318 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_csr_rw.3585277824 |
|
|
Aug 23 05:11:14 PM UTC 24 |
Aug 23 05:11:17 PM UTC 24 |
82734677 ps |
T1242 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_csr_mem_rw_with_rand_reset.1246860535 |
|
|
Aug 23 05:11:14 PM UTC 24 |
Aug 23 05:11:17 PM UTC 24 |
117002779 ps |
T1243 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_same_csr_outstanding.2649909712 |
|
|
Aug 23 05:11:14 PM UTC 24 |
Aug 23 05:11:17 PM UTC 24 |
73365983 ps |
T1244 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_tl_errors.3502849583 |
|
|
Aug 23 05:11:10 PM UTC 24 |
Aug 23 05:11:17 PM UTC 24 |
2481071661 ps |
T1245 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_csr_rw.1970269374 |
|
|
Aug 23 05:11:16 PM UTC 24 |
Aug 23 05:11:18 PM UTC 24 |
81367370 ps |
T1246 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_intr_test.1897190609 |
|
|
Aug 23 05:11:15 PM UTC 24 |
Aug 23 05:11:18 PM UTC 24 |
44128422 ps |
T1247 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_same_csr_outstanding.2490757210 |
|
|
Aug 23 05:11:17 PM UTC 24 |
Aug 23 05:11:19 PM UTC 24 |
976535141 ps |
T1248 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_tl_errors.2247399100 |
|
|
Aug 23 05:11:13 PM UTC 24 |
Aug 23 05:11:20 PM UTC 24 |
2655180734 ps |
T1249 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_intr_test.3869255564 |
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Aug 23 05:11:18 PM UTC 24 |
Aug 23 05:11:20 PM UTC 24 |
77724511 ps |
T319 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_csr_rw.288834278 |
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Aug 23 05:11:18 PM UTC 24 |
Aug 23 05:11:20 PM UTC 24 |
93996183 ps |
T1250 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_same_csr_outstanding.2867781867 |
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Aug 23 05:11:18 PM UTC 24 |
Aug 23 05:11:21 PM UTC 24 |
970848247 ps |
T1251 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_csr_mem_rw_with_rand_reset.2148047456 |
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Aug 23 05:11:17 PM UTC 24 |
Aug 23 05:11:22 PM UTC 24 |
1650658128 ps |
T1252 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_intr_test.360926867 |
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Aug 23 05:11:20 PM UTC 24 |
Aug 23 05:11:22 PM UTC 24 |
79600948 ps |
T1253 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_csr_mem_rw_with_rand_reset.1080945843 |
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Aug 23 05:11:19 PM UTC 24 |
Aug 23 05:11:23 PM UTC 24 |
105294653 ps |
T367 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_tl_intg_err.3626081507 |
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Aug 23 05:11:04 PM UTC 24 |
Aug 23 05:11:23 PM UTC 24 |
5093647031 ps |
T365 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_tl_intg_err.3814804350 |
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Aug 23 05:11:13 PM UTC 24 |
Aug 23 05:11:23 PM UTC 24 |
1209962007 ps |
T321 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_csr_rw.36901726 |
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Aug 23 05:11:21 PM UTC 24 |
Aug 23 05:11:23 PM UTC 24 |
43343729 ps |
T1254 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_tl_errors.2604274958 |
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Aug 23 05:11:14 PM UTC 24 |
Aug 23 05:11:23 PM UTC 24 |
3440439397 ps |
T366 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_tl_intg_err.722565429 |
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Aug 23 05:11:07 PM UTC 24 |
Aug 23 05:11:24 PM UTC 24 |
1251034412 ps |
T1255 |
/workspaces/repo/scratch/os_regression_2024_08_22/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_tl_errors.2128694600 |
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Aug 23 05:11:18 PM UTC 24 |
Aug 23 05:11:24 PM UTC 24 |
174174785 ps |