Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	4300314	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

2419121

1

T1

3

T2

198

T3

575

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	5642446	1			T1	4		T2	582		T3	1612
values[0x0]	501873	1			T1	6		T2	123		T3	87
values[0x1]	575116	1			T1	9		T2	124		T3	80

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	3157978	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

3561457

1

T1

6

T2

368

T3

887

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	20619	1			T3	5		T5	4		T11	26
valid_sources[0x01]	65475	1			T3	11		T5	10		T11	39
valid_sources[0x02]	30005	1			T3	7		T5	10		T11	24
valid_sources[0x03]	24136	1			T3	4		T5	14		T11	22
valid_sources[0x04]	22107	1			T3	8		T5	8		T11	31
valid_sources[0x05]	24292	1			T3	9		T5	13		T11	19
valid_sources[0x06]	21324	1			T3	8		T5	32		T11	46
valid_sources[0x07]	20132	1			T3	11		T5	9		T11	41
valid_sources[0x08]	41553	1			T3	10		T5	11		T11	20
valid_sources[0x09]	27640	1			T3	4		T5	8		T11	29
valid_sources[0x0a]	21170	1			T3	4		T5	7		T11	17
valid_sources[0x0b]	21419	1			T3	5		T5	2		T11	16
valid_sources[0x0c]	34621	1			T3	10		T5	11		T11	26
valid_sources[0x0d]	28575	1			T3	8		T5	6		T11	20
valid_sources[0x0e]	22811	1			T3	8		T5	20		T11	17
valid_sources[0x0f]	24494	1			T3	6		T5	19		T11	23
valid_sources[0x10]	26462	1			T3	8		T5	6		T11	43
valid_sources[0x11]	22428	1			T3	10		T5	20		T11	8
valid_sources[0x12]	21756	1			T3	6		T5	19		T11	40
valid_sources[0x13]	20839	1			T3	2		T5	23		T11	18
valid_sources[0x14]	21360	1			T3	4		T5	5		T11	18
valid_sources[0x15]	20845	1			T3	4		T5	27		T11	21
valid_sources[0x16]	20637	1			T3	3		T5	8		T11	21
valid_sources[0x17]	20864	1			T3	12		T5	13		T11	34
valid_sources[0x18]	20796	1			T3	1		T5	26		T11	21
valid_sources[0x19]	21249	1			T3	4		T5	28		T11	45
valid_sources[0x1a]	20874	1			T3	2		T5	11		T11	23
valid_sources[0x1b]	21083	1			T3	7		T5	15		T11	46
valid_sources[0x1c]	30687	1			T3	7		T5	22		T11	25
valid_sources[0x1d]	50348	1			T3	4		T5	12		T11	21
valid_sources[0x1e]	20838	1			T3	7		T5	2		T11	21
valid_sources[0x1f]	19942	1			T3	10		T5	28		T11	41
valid_sources[0x20]	23976	1			T3	11		T5	22		T11	46
valid_sources[0x21]	32983	1			T3	3		T5	4		T11	35
valid_sources[0x22]	20755	1			T3	6		T5	16		T11	39
valid_sources[0x23]	21272	1			T3	8		T5	11		T11	12
valid_sources[0x24]	21713	1			T3	8		T5	10		T11	30
valid_sources[0x25]	20116	1			T3	7		T5	17		T11	11
valid_sources[0x26]	19945	1			T3	11		T5	11		T11	31
valid_sources[0x27]	25823	1			T3	6		T5	13		T11	25
valid_sources[0x28]	33086	1			T3	7		T5	15		T11	20
valid_sources[0x29]	23026	1			T3	6		T5	15		T11	16
valid_sources[0x2a]	27976	1			T3	3		T5	6		T11	31
valid_sources[0x2b]	20393	1			T3	4		T5	15		T11	36
valid_sources[0x2c]	25811	1			T3	9		T5	23		T11	18
valid_sources[0x2d]	26581	1			T3	16		T5	8		T11	34
valid_sources[0x2e]	21890	1			T3	11		T5	5		T11	43
valid_sources[0x2f]	38596	1			T3	3		T5	25		T11	21
valid_sources[0x30]	21508	1			T3	10		T5	19		T11	20
valid_sources[0x31]	29965	1			T3	7		T5	12		T11	48
valid_sources[0x32]	20722	1			T3	10		T5	13		T11	21
valid_sources[0x33]	22139	1			T3	11		T5	13		T11	40
valid_sources[0x34]	20231	1			T3	4		T5	36		T11	45
valid_sources[0x35]	27173	1			T3	9		T5	20		T11	34
valid_sources[0x36]	21740	1			T3	7		T5	18		T11	21
valid_sources[0x37]	34570	1			T3	5		T5	29		T11	19
valid_sources[0x38]	41880	1			T3	4		T5	13		T11	32
valid_sources[0x39]	26000	1			T3	10		T5	18		T11	46
valid_sources[0x3a]	21173	1			T3	5		T5	23		T11	33
valid_sources[0x3b]	20493	1			T3	8		T5	9		T11	21
valid_sources[0x3c]	22817	1			T3	7		T5	17		T11	31
valid_sources[0x3d]	20294	1			T3	3		T5	9		T11	16
valid_sources[0x3e]	26631	1			T3	3		T5	17		T11	16
valid_sources[0x3f]	27243	1			T3	8		T5	18		T11	28
valid_sources[0x40]	34179	1			T3	3		T5	10		T11	36
valid_sources[0x41]	24046	1			T3	7		T5	10		T11	27
valid_sources[0x42]	22060	1			T3	6		T5	5		T11	24
valid_sources[0x43]	20612	1			T3	2		T5	15		T11	21
valid_sources[0x44]	25257	1			T3	4		T5	24		T11	18
valid_sources[0x45]	20383	1			T3	10		T5	13		T11	13
valid_sources[0x46]	21802	1			T3	7		T5	22		T11	22
valid_sources[0x47]	28757	1			T3	8		T5	17		T11	15
valid_sources[0x48]	20730	1			T3	8		T5	18		T11	33
valid_sources[0x49]	28049	1			T3	4		T5	16		T11	29
valid_sources[0x4a]	28786	1			T3	10		T5	34		T11	18
valid_sources[0x4b]	32690	1			T3	5		T5	12		T11	29
valid_sources[0x4c]	20764	1			T3	10		T5	14		T11	13
valid_sources[0x4d]	22297	1			T3	7		T5	20		T11	23
valid_sources[0x4e]	20348	1			T3	5		T5	6		T11	6
valid_sources[0x4f]	22322	1			T3	9		T5	12		T11	36
valid_sources[0x50]	21337	1			T3	4		T5	10		T11	34
valid_sources[0x51]	22748	1			T3	1		T5	15		T11	21
valid_sources[0x52]	49329	1			T3	7		T5	5		T11	47
valid_sources[0x53]	23908	1			T3	10		T5	15		T11	28
valid_sources[0x54]	24446	1			T3	11		T5	25		T11	19
valid_sources[0x55]	24608	1			T3	5		T5	3		T11	37
valid_sources[0x56]	20372	1			T3	9		T5	15		T11	18
valid_sources[0x57]	41099	1			T3	6		T5	15		T11	35
valid_sources[0x58]	20296	1			T3	5		T5	19		T11	40
valid_sources[0x59]	28196	1			T3	6		T5	45		T11	17
valid_sources[0x5a]	25229	1			T3	10		T5	16		T11	19
valid_sources[0x5b]	21400	1			T3	7		T5	9		T11	34
valid_sources[0x5c]	20461	1			T3	8		T5	12		T11	24
valid_sources[0x5d]	23802	1			T3	13		T5	15		T11	29
valid_sources[0x5e]	24577	1			T3	7		T5	13		T11	32
valid_sources[0x5f]	21878	1			T3	6		T5	11		T11	24
valid_sources[0x60]	21629	1			T3	4		T5	11		T11	19
valid_sources[0x61]	20981	1			T3	10		T5	16		T11	25
valid_sources[0x62]	24165	1			T3	8		T5	10		T11	31
valid_sources[0x63]	20479	1			T3	6		T5	23		T11	27
valid_sources[0x64]	29127	1			T3	5		T5	11		T11	34
valid_sources[0x65]	21277	1			T3	8		T5	19		T11	11
valid_sources[0x66]	19937	1			T3	7		T5	11		T11	26
valid_sources[0x67]	20109	1			T3	10		T5	21		T11	27
valid_sources[0x68]	22987	1			T3	6		T5	13		T11	34
valid_sources[0x69]	21170	1			T3	7		T5	13		T11	29
valid_sources[0x6a]	23303	1			T3	8		T5	13		T11	23
valid_sources[0x6b]	20443	1			T3	5		T5	19		T11	23
valid_sources[0x6c]	23027	1			T3	9		T5	18		T11	22
valid_sources[0x6d]	27939	1			T3	7		T5	5		T11	40
valid_sources[0x6e]	20632	1			T3	5		T5	15		T11	10
valid_sources[0x6f]	34921	1			T3	3		T5	24		T11	35
valid_sources[0x70]	32613	1			T3	11		T5	24		T11	12
valid_sources[0x71]	27640	1			T3	4		T5	13		T11	39
valid_sources[0x72]	21195	1			T3	7		T5	23		T11	29
valid_sources[0x73]	27978	1			T3	8		T5	6		T11	46
valid_sources[0x74]	22199	1			T3	14		T5	10		T11	29
valid_sources[0x75]	23670	1			T3	11		T5	4		T11	27
valid_sources[0x76]	24616	1			T3	7		T5	14		T11	35
valid_sources[0x77]	32929	1			T3	4		T5	12		T11	27
valid_sources[0x78]	24365	1			T3	8		T5	18		T11	15
valid_sources[0x79]	20478	1			T3	7		T5	23		T11	20
valid_sources[0x7a]	21134	1			T3	5		T5	23		T11	24
valid_sources[0x7b]	20789	1			T3	5		T5	29		T11	22
valid_sources[0x7c]	34592	1			T3	13		T5	19		T11	23
valid_sources[0x7d]	25865	1			T3	7		T5	21		T11	27
valid_sources[0x7e]	32020	1			T3	4		T5	8		T11	37
valid_sources[0x7f]	21483	1			T3	6		T5	10		T11	31
valid_sources[0x80]	22977	1			T3	10		T5	28		T11	23

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

1896289

1

T1

1

T2

98

T3

509

values[0x0]

all_enables

biggest_size

291467

1

T1

1

T2

62

T3

43

values[0x1]

all_enables

biggest_size

231365

1

T1

1

T2

38

T3

23

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	29380	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

589771

1

T3

40

T4

60

T6

180

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	191850	1			T3	20		T4	30		T6	90
values[0x0]	207652	1			T3	11		T4	19		T6	50
values[0x1]	219649	1			T3	9		T4	11		T6	40

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	15990	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

603161

1

T3

40

T4

60

T6

180

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	2028	1			T8	1		T117	1		T226	1
valid_sources[0x01]	2797	1			T95	1		T117	1		T298	1
valid_sources[0x02]	2067	1			T7	1		T95	1		T200	1
valid_sources[0x03]	3568	1			T7	1		T12	1		T97	1
valid_sources[0x04]	2521	1			T7	2		T115	140		T224	1
valid_sources[0x05]	2627	1			T95	1		T224	1		T117	5
valid_sources[0x06]	2155	1			T70	4		T124	3		T97	1
valid_sources[0x07]	2247	1			T7	1		T12	2		T70	3
valid_sources[0x08]	2676	1			T6	2		T12	1		T121	1
valid_sources[0x09]	2280	1			T3	1		T12	1		T122	6
valid_sources[0x0a]	3111	1			T95	3		T282	2		T285	1
valid_sources[0x0b]	2636	1			T6	1		T70	3		T116	1
valid_sources[0x0c]	3001	1			T7	1		T95	2		T70	3
valid_sources[0x0d]	2966	1			T6	4		T12	1		T116	1
valid_sources[0x0e]	2412	1			T6	1		T70	2		T133	2
valid_sources[0x0f]	2666	1			T4	1		T223	2		T200	1
valid_sources[0x10]	2625	1			T70	1		T97	1		T223	1
valid_sources[0x11]	2391	1			T3	1		T7	3		T95	1
valid_sources[0x12]	2819	1			T4	1		T6	2		T12	3
valid_sources[0x13]	2452	1			T3	1		T4	1		T12	1
valid_sources[0x14]	2622	1			T4	2		T95	2		T70	5
valid_sources[0x15]	2072	1			T6	1		T12	1		T97	1
valid_sources[0x16]	2473	1			T4	2		T6	3		T116	1
valid_sources[0x17]	2126	1			T6	3		T95	1		T70	1
valid_sources[0x18]	2315	1			T6	1		T95	1		T146	1
valid_sources[0x19]	2851	1			T97	2		T118	1		T20	3
valid_sources[0x1a]	2220	1			T3	1		T122	1		T200	2
valid_sources[0x1b]	2378	1			T12	1		T95	1		T200	4
valid_sources[0x1c]	2309	1			T124	12		T116	2		T223	1
valid_sources[0x1d]	2439	1			T4	1		T6	6		T7	1
valid_sources[0x1e]	2534	1			T12	2		T116	1		T118	1
valid_sources[0x1f]	1954	1			T12	1		T97	1		T20	1
valid_sources[0x20]	3317	1			T6	2		T70	3		T224	4
valid_sources[0x21]	2243	1			T4	1		T70	3		T176	1
valid_sources[0x22]	2366	1			T4	3		T70	3		T146	1
valid_sources[0x23]	2061	1			T3	1		T7	2		T12	1
valid_sources[0x24]	2765	1			T4	1		T7	1		T97	1
valid_sources[0x25]	2421	1			T97	1		T118	1		T254	1
valid_sources[0x26]	2666	1			T4	1		T116	2		T118	1
valid_sources[0x27]	2443	1			T6	1		T7	2		T70	1
valid_sources[0x28]	2143	1			T4	1		T6	1		T95	2
valid_sources[0x29]	2362	1			T12	1		T8	1		T70	1
valid_sources[0x2a]	2285	1			T6	1		T12	2		T70	5
valid_sources[0x2b]	2568	1			T3	2		T6	2		T122	12
valid_sources[0x2c]	2420	1			T6	1		T116	1		T174	1
valid_sources[0x2d]	2577	1			T6	2		T7	1		T116	1
valid_sources[0x2e]	2439	1			T95	1		T224	1		T298	1
valid_sources[0x2f]	2402	1			T6	2		T124	2		T298	1
valid_sources[0x30]	2422	1			T70	3		T116	1		T117	1
valid_sources[0x31]	2146	1			T6	2		T95	1		T117	2
valid_sources[0x32]	2277	1			T12	2		T97	1		T118	1
valid_sources[0x33]	2036	1			T6	1		T223	1		T118	2
valid_sources[0x34]	2248	1			T7	1		T122	2		T298	1
valid_sources[0x35]	2652	1			T4	1		T12	1		T95	1
valid_sources[0x36]	2667	1			T7	1		T12	2		T8	2
valid_sources[0x37]	2052	1			T6	1		T133	1		T118	2
valid_sources[0x38]	2792	1			T4	1		T7	1		T12	2
valid_sources[0x39]	2293	1			T7	1		T95	1		T70	1
valid_sources[0x3a]	2311	1			T7	1		T12	1		T116	1
valid_sources[0x3b]	2068	1			T4	1		T116	2		T19	9
valid_sources[0x3c]	2294	1			T6	3		T12	1		T117	1
valid_sources[0x3d]	2216	1			T6	1		T156	1		T138	2
valid_sources[0x3e]	2683	1			T3	1		T97	2		T200	7
valid_sources[0x3f]	2714	1			T6	3		T20	1		T394	11
valid_sources[0x40]	2419	1			T4	1		T6	2		T95	1
valid_sources[0x41]	2660	1			T3	1		T6	1		T19	3
valid_sources[0x42]	2615	1			T4	1		T70	6		T124	1
valid_sources[0x43]	2466	1			T6	1		T146	1		T116	1
valid_sources[0x44]	2923	1			T121	1		T70	1		T117	1
valid_sources[0x45]	1890	1			T7	1		T117	1		T136	1
valid_sources[0x46]	2220	1			T116	1		T223	1		T227	1
valid_sources[0x47]	2529	1			T12	1		T70	2		T116	1
valid_sources[0x48]	2840	1			T6	2		T8	1		T97	3
valid_sources[0x49]	2390	1			T7	1		T200	2		T251	20
valid_sources[0x4a]	2239	1			T7	1		T97	3		T116	3
valid_sources[0x4b]	2695	1			T6	3		T70	2		T146	1
valid_sources[0x4c]	3352	1			T6	1		T7	1		T20	6
valid_sources[0x4d]	2226	1			T97	1		T120	4		T156	1
valid_sources[0x4e]	2162	1			T7	1		T223	1		T226	1
valid_sources[0x4f]	2789	1			T12	1		T122	2		T95	1
valid_sources[0x50]	2526	1			T4	1		T12	1		T187	2
valid_sources[0x51]	2527	1			T4	1		T7	2		T95	1
valid_sources[0x52]	2210	1			T12	1		T224	1		T200	3
valid_sources[0x53]	2256	1			T146	1		T116	1		T224	1
valid_sources[0x54]	2220	1			T4	1		T6	1		T124	1
valid_sources[0x55]	3132	1			T7	1		T12	1		T95	1
valid_sources[0x56]	2321	1			T6	2		T7	1		T12	1
valid_sources[0x57]	2103	1			T6	1		T7	2		T12	2
valid_sources[0x58]	2479	1			T3	1		T95	1		T200	1
valid_sources[0x59]	2176	1			T95	1		T70	1		T118	1
valid_sources[0x5a]	2212	1			T3	1		T4	1		T19	2
valid_sources[0x5b]	2447	1			T6	6		T122	2		T155	140
valid_sources[0x5c]	2793	1			T6	1		T133	2		T118	2
valid_sources[0x5d]	2258	1			T7	1		T12	1		T70	3
valid_sources[0x5e]	2582	1			T12	1		T97	1		T116	1
valid_sources[0x5f]	2463	1			T97	1		T19	11		T20	3
valid_sources[0x60]	2243	1			T4	1		T12	2		T121	1
valid_sources[0x61]	2259	1			T7	1		T12	1		T95	2
valid_sources[0x62]	2503	1			T6	1		T7	1		T116	1
valid_sources[0x63]	2667	1			T6	1		T12	1		T95	1
valid_sources[0x64]	2525	1			T3	1		T97	1		T117	1
valid_sources[0x65]	2808	1			T4	1		T6	1		T12	1
valid_sources[0x66]	2380	1			T4	1		T7	2		T8	1
valid_sources[0x67]	2373	1			T6	2		T117	1		T118	3
valid_sources[0x68]	2588	1			T6	1		T12	1		T95	1
valid_sources[0x69]	2403	1			T12	1		T121	1		T70	1
valid_sources[0x6a]	2485	1			T3	1		T97	1		T226	1
valid_sources[0x6b]	2105	1			T4	1		T12	1		T95	1
valid_sources[0x6c]	2422	1			T97	1		T224	2		T123	1
valid_sources[0x6d]	2544	1			T200	5		T174	1		T37	2
valid_sources[0x6e]	2094	1			T6	1		T12	1		T70	4
valid_sources[0x6f]	2353	1			T4	1		T6	3		T121	2
valid_sources[0x70]	2111	1			T6	3		T12	2		T70	2
valid_sources[0x71]	2279	1			T6	1		T133	2		T117	1
valid_sources[0x72]	2119	1			T7	1		T97	1		T120	1
valid_sources[0x73]	2696	1			T6	2		T122	1		T95	2
valid_sources[0x74]	1972	1			T6	3		T12	1		T95	1
valid_sources[0x75]	2361	1			T12	2		T116	2		T117	3
valid_sources[0x76]	2280	1			T146	1		T116	1		T19	2
valid_sources[0x77]	1917	1			T223	1		T200	1		T118	6
valid_sources[0x78]	2406	1			T4	1		T6	3		T7	1
valid_sources[0x79]	2433	1			T227	1		T299	1		T37	1
valid_sources[0x7a]	2830	1			T3	1		T6	2		T7	3
valid_sources[0x7b]	2396	1			T4	1		T7	2		T12	1
valid_sources[0x7c]	2107	1			T6	1		T7	1		T12	1
valid_sources[0x7d]	1880	1			T3	1		T8	1		T95	1
valid_sources[0x7e]	2359	1			T3	1		T4	1		T6	2
valid_sources[0x7f]	2311	1			T120	1		T156	1		T130	1
valid_sources[0x80]	2251	1			T7	1		T224	1		T117	5

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

177823

1

T3

20

T4

30

T6

90

values[0x0]

all_enables

biggest_size

205959

1

T3

11

T4

19

T6

50

values[0x1]

all_enables

biggest_size

205989

1

T3

9

T4

11

T6

40