| T1065 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/181.otp_ctrl_parallel_lc_esc.1685394513 |
|
|
Aug 27 03:11:29 PM UTC 24 |
Aug 27 03:11:37 PM UTC 24 |
295899890 ps |
| T165 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/189.otp_ctrl_parallel_lc_esc.2790449023 |
|
|
Aug 27 03:11:29 PM UTC 24 |
Aug 27 03:11:37 PM UTC 24 |
335763715 ps |
| T1066 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/176.otp_ctrl_parallel_lc_esc.115985453 |
|
|
Aug 27 03:11:22 PM UTC 24 |
Aug 27 03:11:37 PM UTC 24 |
966426338 ps |
| T1067 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/195.otp_ctrl_init_fail.2841852536 |
|
|
Aug 27 03:11:32 PM UTC 24 |
Aug 27 03:11:37 PM UTC 24 |
145468330 ps |
| T1068 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/204.otp_ctrl_init_fail.1348653713 |
|
|
Aug 27 03:11:36 PM UTC 24 |
Aug 27 03:11:41 PM UTC 24 |
146421898 ps |
| T180 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/197.otp_ctrl_init_fail.1101856909 |
|
|
Aug 27 03:11:33 PM UTC 24 |
Aug 27 03:11:37 PM UTC 24 |
548877495 ps |
| T279 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/86.otp_ctrl_stress_all_with_rand_reset.4139492202 |
|
|
Aug 27 03:09:58 PM UTC 24 |
Aug 27 03:11:37 PM UTC 24 |
2432159046 ps |
| T68 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/193.otp_ctrl_init_fail.2557156163 |
|
|
Aug 27 03:11:32 PM UTC 24 |
Aug 27 03:11:37 PM UTC 24 |
382544312 ps |
| T1069 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/184.otp_ctrl_parallel_lc_esc.1933207801 |
|
|
Aug 27 03:11:29 PM UTC 24 |
Aug 27 03:11:38 PM UTC 24 |
575447223 ps |
| T1070 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/196.otp_ctrl_init_fail.1624663142 |
|
|
Aug 27 03:11:32 PM UTC 24 |
Aug 27 03:11:38 PM UTC 24 |
200416890 ps |
| T1071 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/200.otp_ctrl_init_fail.56847010 |
|
|
Aug 27 03:11:36 PM UTC 24 |
Aug 27 03:11:41 PM UTC 24 |
195995776 ps |
| T1072 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/192.otp_ctrl_parallel_lc_esc.2198885539 |
|
|
Aug 27 03:11:32 PM UTC 24 |
Aug 27 03:11:38 PM UTC 24 |
1558252763 ps |
| T1073 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/91.otp_ctrl_stress_all_with_rand_reset.3830909355 |
|
|
Aug 27 03:10:10 PM UTC 24 |
Aug 27 03:11:39 PM UTC 24 |
4624157918 ps |
| T1074 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/195.otp_ctrl_parallel_lc_esc.1435707433 |
|
|
Aug 27 03:11:32 PM UTC 24 |
Aug 27 03:11:39 PM UTC 24 |
249825998 ps |
| T1075 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/142.otp_ctrl_parallel_lc_esc.1774600987 |
|
|
Aug 27 03:11:07 PM UTC 24 |
Aug 27 03:11:39 PM UTC 24 |
1340910318 ps |
| T1076 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/197.otp_ctrl_parallel_lc_esc.3455428285 |
|
|
Aug 27 03:11:33 PM UTC 24 |
Aug 27 03:11:40 PM UTC 24 |
587959966 ps |
| T1077 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/194.otp_ctrl_init_fail.1047696414 |
|
|
Aug 27 03:11:32 PM UTC 24 |
Aug 27 03:11:40 PM UTC 24 |
2572629297 ps |
| T1078 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/194.otp_ctrl_parallel_lc_esc.617501640 |
|
|
Aug 27 03:11:32 PM UTC 24 |
Aug 27 03:11:40 PM UTC 24 |
357326839 ps |
| T1079 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/174.otp_ctrl_parallel_lc_esc.673048546 |
|
|
Aug 27 03:11:22 PM UTC 24 |
Aug 27 03:11:40 PM UTC 24 |
6520159159 ps |
| T1080 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/182.otp_ctrl_parallel_lc_esc.4157494492 |
|
|
Aug 27 03:11:29 PM UTC 24 |
Aug 27 03:11:40 PM UTC 24 |
360972185 ps |
| T1081 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/198.otp_ctrl_init_fail.1006923566 |
|
|
Aug 27 03:11:36 PM UTC 24 |
Aug 27 03:11:40 PM UTC 24 |
287917792 ps |
| T1082 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/205.otp_ctrl_init_fail.3031890432 |
|
|
Aug 27 03:11:36 PM UTC 24 |
Aug 27 03:11:40 PM UTC 24 |
132895728 ps |
| T1083 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/193.otp_ctrl_parallel_lc_esc.3493856217 |
|
|
Aug 27 03:11:32 PM UTC 24 |
Aug 27 03:11:40 PM UTC 24 |
256015610 ps |
| T1084 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/209.otp_ctrl_init_fail.2121730437 |
|
|
Aug 27 03:11:36 PM UTC 24 |
Aug 27 03:11:41 PM UTC 24 |
129926249 ps |
| T1085 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/207.otp_ctrl_init_fail.2188161363 |
|
|
Aug 27 03:11:36 PM UTC 24 |
Aug 27 03:11:41 PM UTC 24 |
456740994 ps |
| T1086 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/213.otp_ctrl_init_fail.1857092585 |
|
|
Aug 27 03:11:36 PM UTC 24 |
Aug 27 03:11:41 PM UTC 24 |
258997765 ps |
| T1087 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/210.otp_ctrl_init_fail.346626492 |
|
|
Aug 27 03:11:36 PM UTC 24 |
Aug 27 03:11:41 PM UTC 24 |
145749541 ps |
| T1088 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/199.otp_ctrl_init_fail.4066042750 |
|
|
Aug 27 03:11:36 PM UTC 24 |
Aug 27 03:11:41 PM UTC 24 |
443904977 ps |
| T1089 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/208.otp_ctrl_init_fail.2630507209 |
|
|
Aug 27 03:11:36 PM UTC 24 |
Aug 27 03:11:41 PM UTC 24 |
430028138 ps |
| T77 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/203.otp_ctrl_init_fail.1678443196 |
|
|
Aug 27 03:11:36 PM UTC 24 |
Aug 27 03:11:41 PM UTC 24 |
145476261 ps |
| T1090 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/206.otp_ctrl_init_fail.2760269502 |
|
|
Aug 27 03:11:36 PM UTC 24 |
Aug 27 03:11:41 PM UTC 24 |
128942295 ps |
| T1091 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/214.otp_ctrl_init_fail.2968667108 |
|
|
Aug 27 03:11:36 PM UTC 24 |
Aug 27 03:11:41 PM UTC 24 |
479665437 ps |
| T1092 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/186.otp_ctrl_parallel_lc_esc.1697517261 |
|
|
Aug 27 03:11:29 PM UTC 24 |
Aug 27 03:11:41 PM UTC 24 |
6052203066 ps |
| T1093 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/215.otp_ctrl_init_fail.2559535938 |
|
|
Aug 27 03:11:36 PM UTC 24 |
Aug 27 03:11:41 PM UTC 24 |
225641118 ps |
| T1094 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/211.otp_ctrl_init_fail.2160837678 |
|
|
Aug 27 03:11:36 PM UTC 24 |
Aug 27 03:11:41 PM UTC 24 |
475401554 ps |
| T1095 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/217.otp_ctrl_init_fail.1036607729 |
|
|
Aug 27 03:11:37 PM UTC 24 |
Aug 27 03:11:42 PM UTC 24 |
529986679 ps |
| T1096 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/202.otp_ctrl_init_fail.3097469428 |
|
|
Aug 27 03:11:36 PM UTC 24 |
Aug 27 03:11:42 PM UTC 24 |
1787252872 ps |
| T1097 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/216.otp_ctrl_init_fail.1979729732 |
|
|
Aug 27 03:11:36 PM UTC 24 |
Aug 27 03:11:42 PM UTC 24 |
169030850 ps |
| T78 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/201.otp_ctrl_init_fail.4016900885 |
|
|
Aug 27 03:11:36 PM UTC 24 |
Aug 27 03:11:42 PM UTC 24 |
812938285 ps |
| T1098 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/188.otp_ctrl_parallel_lc_esc.2112513459 |
|
|
Aug 27 03:11:29 PM UTC 24 |
Aug 27 03:11:42 PM UTC 24 |
489135336 ps |
| T1099 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/212.otp_ctrl_init_fail.3788602357 |
|
|
Aug 27 03:11:36 PM UTC 24 |
Aug 27 03:11:45 PM UTC 24 |
2956980093 ps |
| T1100 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/199.otp_ctrl_parallel_lc_esc.4062251354 |
|
|
Aug 27 03:11:36 PM UTC 24 |
Aug 27 03:11:45 PM UTC 24 |
1503668849 ps |
| T1101 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_stress_all.2202037692 |
|
|
Aug 27 03:04:55 PM UTC 24 |
Aug 27 03:11:46 PM UTC 24 |
137134343681 ps |
| T1102 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/46.otp_ctrl_stress_all.4077557630 |
|
|
Aug 27 03:08:41 PM UTC 24 |
Aug 27 03:11:47 PM UTC 24 |
14415500084 ps |
| T1103 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/198.otp_ctrl_parallel_lc_esc.2027852284 |
|
|
Aug 27 03:11:36 PM UTC 24 |
Aug 27 03:11:49 PM UTC 24 |
513817627 ps |
| T105 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/220.otp_ctrl_init_fail.2843766323 |
|
|
Aug 27 03:11:45 PM UTC 24 |
Aug 27 03:11:49 PM UTC 24 |
382899290 ps |
| T1104 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/221.otp_ctrl_init_fail.3712188576 |
|
|
Aug 27 03:11:45 PM UTC 24 |
Aug 27 03:11:50 PM UTC 24 |
556804161 ps |
| T1105 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/226.otp_ctrl_init_fail.890723627 |
|
|
Aug 27 03:11:45 PM UTC 24 |
Aug 27 03:11:50 PM UTC 24 |
222674036 ps |
| T1106 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/245.otp_ctrl_init_fail.2484543023 |
|
|
Aug 27 03:11:45 PM UTC 24 |
Aug 27 03:11:50 PM UTC 24 |
94456016 ps |
| T1107 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/229.otp_ctrl_init_fail.2436407913 |
|
|
Aug 27 03:11:45 PM UTC 24 |
Aug 27 03:11:50 PM UTC 24 |
156691411 ps |
| T145 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/225.otp_ctrl_init_fail.1912740921 |
|
|
Aug 27 03:11:45 PM UTC 24 |
Aug 27 03:11:50 PM UTC 24 |
672735696 ps |
| T1108 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/244.otp_ctrl_init_fail.1830685751 |
|
|
Aug 27 03:11:45 PM UTC 24 |
Aug 27 03:11:50 PM UTC 24 |
149887807 ps |
| T1109 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/228.otp_ctrl_init_fail.2869558863 |
|
|
Aug 27 03:11:45 PM UTC 24 |
Aug 27 03:11:50 PM UTC 24 |
189109634 ps |
| T1110 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/233.otp_ctrl_init_fail.2643850754 |
|
|
Aug 27 03:11:45 PM UTC 24 |
Aug 27 03:11:50 PM UTC 24 |
148449892 ps |
| T1111 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/256.otp_ctrl_init_fail.866492617 |
|
|
Aug 27 03:11:46 PM UTC 24 |
Aug 27 03:11:50 PM UTC 24 |
124336304 ps |
| T1112 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/230.otp_ctrl_init_fail.4159173588 |
|
|
Aug 27 03:11:45 PM UTC 24 |
Aug 27 03:11:50 PM UTC 24 |
100854387 ps |
| T1113 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/237.otp_ctrl_init_fail.3693164692 |
|
|
Aug 27 03:11:45 PM UTC 24 |
Aug 27 03:11:50 PM UTC 24 |
292717380 ps |
| T1114 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/240.otp_ctrl_init_fail.575633422 |
|
|
Aug 27 03:11:45 PM UTC 24 |
Aug 27 03:11:50 PM UTC 24 |
161328030 ps |
| T1115 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/241.otp_ctrl_init_fail.1109954502 |
|
|
Aug 27 03:11:45 PM UTC 24 |
Aug 27 03:11:50 PM UTC 24 |
123796009 ps |
| T1116 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/251.otp_ctrl_init_fail.3579723651 |
|
|
Aug 27 03:11:46 PM UTC 24 |
Aug 27 03:11:50 PM UTC 24 |
190580242 ps |
| T1117 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/238.otp_ctrl_init_fail.1893154291 |
|
|
Aug 27 03:11:45 PM UTC 24 |
Aug 27 03:11:51 PM UTC 24 |
230070722 ps |
| T1118 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/231.otp_ctrl_init_fail.3965093440 |
|
|
Aug 27 03:11:45 PM UTC 24 |
Aug 27 03:11:51 PM UTC 24 |
1580835358 ps |
| T1119 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/232.otp_ctrl_init_fail.1737890376 |
|
|
Aug 27 03:11:45 PM UTC 24 |
Aug 27 03:11:51 PM UTC 24 |
524006346 ps |
| T1120 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/224.otp_ctrl_init_fail.2070887924 |
|
|
Aug 27 03:11:45 PM UTC 24 |
Aug 27 03:11:51 PM UTC 24 |
540475669 ps |
| T1121 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/219.otp_ctrl_init_fail.3709228600 |
|
|
Aug 27 03:11:45 PM UTC 24 |
Aug 27 03:11:51 PM UTC 24 |
469793783 ps |
| T1122 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/246.otp_ctrl_init_fail.24255249 |
|
|
Aug 27 03:11:46 PM UTC 24 |
Aug 27 03:11:51 PM UTC 24 |
255551005 ps |
| T1123 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/247.otp_ctrl_init_fail.4268397464 |
|
|
Aug 27 03:11:46 PM UTC 24 |
Aug 27 03:11:51 PM UTC 24 |
304135247 ps |
| T1124 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/260.otp_ctrl_init_fail.3802515280 |
|
|
Aug 27 03:11:46 PM UTC 24 |
Aug 27 03:11:51 PM UTC 24 |
2126063557 ps |
| T1125 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/236.otp_ctrl_init_fail.67329843 |
|
|
Aug 27 03:11:45 PM UTC 24 |
Aug 27 03:11:51 PM UTC 24 |
193866712 ps |
| T1126 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/234.otp_ctrl_init_fail.3559518106 |
|
|
Aug 27 03:11:45 PM UTC 24 |
Aug 27 03:11:51 PM UTC 24 |
663154371 ps |
| T1127 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/265.otp_ctrl_init_fail.2471096572 |
|
|
Aug 27 03:11:46 PM UTC 24 |
Aug 27 03:11:51 PM UTC 24 |
120374986 ps |
| T1128 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/243.otp_ctrl_init_fail.2196907683 |
|
|
Aug 27 03:11:45 PM UTC 24 |
Aug 27 03:11:51 PM UTC 24 |
175773843 ps |
| T1129 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/222.otp_ctrl_init_fail.3253097468 |
|
|
Aug 27 03:11:45 PM UTC 24 |
Aug 27 03:11:51 PM UTC 24 |
2243431153 ps |
| T1130 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/235.otp_ctrl_init_fail.399710511 |
|
|
Aug 27 03:11:45 PM UTC 24 |
Aug 27 03:11:51 PM UTC 24 |
359749993 ps |
| T1131 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/261.otp_ctrl_init_fail.2743740492 |
|
|
Aug 27 03:11:46 PM UTC 24 |
Aug 27 03:11:51 PM UTC 24 |
597766036 ps |
| T1132 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/242.otp_ctrl_init_fail.1459951312 |
|
|
Aug 27 03:11:45 PM UTC 24 |
Aug 27 03:11:51 PM UTC 24 |
280472424 ps |
| T1133 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/227.otp_ctrl_init_fail.140030520 |
|
|
Aug 27 03:11:45 PM UTC 24 |
Aug 27 03:11:51 PM UTC 24 |
513113367 ps |
| T1134 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/264.otp_ctrl_init_fail.2734228566 |
|
|
Aug 27 03:11:46 PM UTC 24 |
Aug 27 03:11:51 PM UTC 24 |
103647177 ps |
| T1135 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/248.otp_ctrl_init_fail.745392008 |
|
|
Aug 27 03:11:46 PM UTC 24 |
Aug 27 03:11:52 PM UTC 24 |
147357310 ps |
| T1136 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/252.otp_ctrl_init_fail.2790103497 |
|
|
Aug 27 03:11:46 PM UTC 24 |
Aug 27 03:11:52 PM UTC 24 |
309800184 ps |
| T297 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/249.otp_ctrl_init_fail.2552179320 |
|
|
Aug 27 03:11:46 PM UTC 24 |
Aug 27 03:11:52 PM UTC 24 |
137913105 ps |
| T1137 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/263.otp_ctrl_init_fail.3294699852 |
|
|
Aug 27 03:11:46 PM UTC 24 |
Aug 27 03:11:52 PM UTC 24 |
165340017 ps |
| T1138 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/253.otp_ctrl_init_fail.2993534449 |
|
|
Aug 27 03:11:46 PM UTC 24 |
Aug 27 03:11:52 PM UTC 24 |
214522742 ps |
| T1139 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/250.otp_ctrl_init_fail.2577943307 |
|
|
Aug 27 03:11:46 PM UTC 24 |
Aug 27 03:11:52 PM UTC 24 |
462424179 ps |
| T1140 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/223.otp_ctrl_init_fail.3932239914 |
|
|
Aug 27 03:11:45 PM UTC 24 |
Aug 27 03:11:52 PM UTC 24 |
1902886241 ps |
| T1141 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/254.otp_ctrl_init_fail.3158640233 |
|
|
Aug 27 03:11:46 PM UTC 24 |
Aug 27 03:11:52 PM UTC 24 |
204118069 ps |
| T1142 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/239.otp_ctrl_init_fail.849270864 |
|
|
Aug 27 03:11:45 PM UTC 24 |
Aug 27 03:11:52 PM UTC 24 |
1885239225 ps |
| T1143 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/259.otp_ctrl_init_fail.1334767146 |
|
|
Aug 27 03:11:46 PM UTC 24 |
Aug 27 03:11:53 PM UTC 24 |
2472862529 ps |
| T1144 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/255.otp_ctrl_init_fail.903465954 |
|
|
Aug 27 03:11:46 PM UTC 24 |
Aug 27 03:11:53 PM UTC 24 |
2001502338 ps |
| T1145 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/262.otp_ctrl_init_fail.2141705844 |
|
|
Aug 27 03:11:46 PM UTC 24 |
Aug 27 03:11:54 PM UTC 24 |
2212523475 ps |
| T1146 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/258.otp_ctrl_init_fail.1066333825 |
|
|
Aug 27 03:11:46 PM UTC 24 |
Aug 27 03:11:54 PM UTC 24 |
2953197589 ps |
| T1147 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/267.otp_ctrl_init_fail.649200735 |
|
|
Aug 27 03:11:46 PM UTC 24 |
Aug 27 03:11:54 PM UTC 24 |
2370653876 ps |
| T1148 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/257.otp_ctrl_init_fail.280322341 |
|
|
Aug 27 03:11:46 PM UTC 24 |
Aug 27 03:11:55 PM UTC 24 |
2821380312 ps |
| T1149 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/274.otp_ctrl_init_fail.2583747119 |
|
|
Aug 27 03:11:54 PM UTC 24 |
Aug 27 03:11:59 PM UTC 24 |
448301371 ps |
| T1150 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/266.otp_ctrl_init_fail.157156403 |
|
|
Aug 27 03:11:46 PM UTC 24 |
Aug 27 03:11:55 PM UTC 24 |
2484827184 ps |
| T1151 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/268.otp_ctrl_init_fail.1696525400 |
|
|
Aug 27 03:11:54 PM UTC 24 |
Aug 27 03:11:58 PM UTC 24 |
350344305 ps |
| T1152 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/269.otp_ctrl_init_fail.825227305 |
|
|
Aug 27 03:11:54 PM UTC 24 |
Aug 27 03:11:59 PM UTC 24 |
284561862 ps |
| T1153 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/278.otp_ctrl_init_fail.3388303760 |
|
|
Aug 27 03:11:54 PM UTC 24 |
Aug 27 03:11:59 PM UTC 24 |
325833941 ps |
| T144 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/273.otp_ctrl_init_fail.3448039917 |
|
|
Aug 27 03:11:54 PM UTC 24 |
Aug 27 03:11:59 PM UTC 24 |
197938156 ps |
| T131 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/280.otp_ctrl_init_fail.2219255592 |
|
|
Aug 27 03:11:54 PM UTC 24 |
Aug 27 03:11:59 PM UTC 24 |
227362540 ps |
| T1154 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/282.otp_ctrl_init_fail.2489153316 |
|
|
Aug 27 03:11:54 PM UTC 24 |
Aug 27 03:11:59 PM UTC 24 |
193901389 ps |
| T1155 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/283.otp_ctrl_init_fail.1114943749 |
|
|
Aug 27 03:11:54 PM UTC 24 |
Aug 27 03:11:59 PM UTC 24 |
458164010 ps |
| T1156 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/285.otp_ctrl_init_fail.3346785606 |
|
|
Aug 27 03:11:54 PM UTC 24 |
Aug 27 03:11:59 PM UTC 24 |
139813176 ps |
| T1157 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/279.otp_ctrl_init_fail.1041473648 |
|
|
Aug 27 03:11:54 PM UTC 24 |
Aug 27 03:11:59 PM UTC 24 |
791737111 ps |
| T129 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/275.otp_ctrl_init_fail.3491274215 |
|
|
Aug 27 03:11:54 PM UTC 24 |
Aug 27 03:11:59 PM UTC 24 |
422714576 ps |
| T1158 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/277.otp_ctrl_init_fail.2147679070 |
|
|
Aug 27 03:11:54 PM UTC 24 |
Aug 27 03:11:59 PM UTC 24 |
1647992930 ps |
| T1159 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/298.otp_ctrl_init_fail.2921595447 |
|
|
Aug 27 03:11:54 PM UTC 24 |
Aug 27 03:11:59 PM UTC 24 |
432662154 ps |
| T1160 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/286.otp_ctrl_init_fail.4290714954 |
|
|
Aug 27 03:11:54 PM UTC 24 |
Aug 27 03:11:59 PM UTC 24 |
544956521 ps |
| T1161 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/276.otp_ctrl_init_fail.3979134942 |
|
|
Aug 27 03:11:54 PM UTC 24 |
Aug 27 03:11:59 PM UTC 24 |
126434211 ps |
| T1162 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/294.otp_ctrl_init_fail.4260899835 |
|
|
Aug 27 03:11:54 PM UTC 24 |
Aug 27 03:11:59 PM UTC 24 |
98865436 ps |
| T1163 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/284.otp_ctrl_init_fail.3309026294 |
|
|
Aug 27 03:11:54 PM UTC 24 |
Aug 27 03:11:59 PM UTC 24 |
477547984 ps |
| T1164 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/270.otp_ctrl_init_fail.3988741563 |
|
|
Aug 27 03:11:54 PM UTC 24 |
Aug 27 03:12:00 PM UTC 24 |
523132507 ps |
| T1165 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/288.otp_ctrl_init_fail.460318292 |
|
|
Aug 27 03:11:54 PM UTC 24 |
Aug 27 03:12:00 PM UTC 24 |
540526945 ps |
| T1166 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/290.otp_ctrl_init_fail.2566469954 |
|
|
Aug 27 03:11:54 PM UTC 24 |
Aug 27 03:12:00 PM UTC 24 |
153079439 ps |
| T1167 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/291.otp_ctrl_init_fail.3433249361 |
|
|
Aug 27 03:11:54 PM UTC 24 |
Aug 27 03:12:00 PM UTC 24 |
125439816 ps |
| T69 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/292.otp_ctrl_init_fail.2242727738 |
|
|
Aug 27 03:11:54 PM UTC 24 |
Aug 27 03:12:00 PM UTC 24 |
127599838 ps |
| T1168 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/295.otp_ctrl_init_fail.790624450 |
|
|
Aug 27 03:11:54 PM UTC 24 |
Aug 27 03:12:00 PM UTC 24 |
110763254 ps |
| T1169 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/62.otp_ctrl_stress_all_with_rand_reset.148768059 |
|
|
Aug 27 03:09:17 PM UTC 24 |
Aug 27 03:12:00 PM UTC 24 |
61806344617 ps |
| T1170 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/271.otp_ctrl_init_fail.3805418508 |
|
|
Aug 27 03:11:54 PM UTC 24 |
Aug 27 03:12:00 PM UTC 24 |
2765631180 ps |
| T1171 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/299.otp_ctrl_init_fail.3822044890 |
|
|
Aug 27 03:11:55 PM UTC 24 |
Aug 27 03:12:00 PM UTC 24 |
156986674 ps |
| T1172 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/281.otp_ctrl_init_fail.1876149544 |
|
|
Aug 27 03:11:54 PM UTC 24 |
Aug 27 03:12:00 PM UTC 24 |
1969785294 ps |
| T1173 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/293.otp_ctrl_init_fail.1451766958 |
|
|
Aug 27 03:11:54 PM UTC 24 |
Aug 27 03:12:01 PM UTC 24 |
1467559506 ps |
| T1174 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/296.otp_ctrl_init_fail.327952347 |
|
|
Aug 27 03:11:54 PM UTC 24 |
Aug 27 03:12:01 PM UTC 24 |
372647790 ps |
| T1175 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/272.otp_ctrl_init_fail.3327326485 |
|
|
Aug 27 03:11:54 PM UTC 24 |
Aug 27 03:12:02 PM UTC 24 |
2627369117 ps |
| T1176 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/289.otp_ctrl_init_fail.3450852505 |
|
|
Aug 27 03:11:54 PM UTC 24 |
Aug 27 03:12:02 PM UTC 24 |
2369162304 ps |
| T1177 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/287.otp_ctrl_init_fail.2053837633 |
|
|
Aug 27 03:11:54 PM UTC 24 |
Aug 27 03:12:04 PM UTC 24 |
2944495930 ps |
| T153 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/87.otp_ctrl_stress_all_with_rand_reset.3053039113 |
|
|
Aug 27 03:10:02 PM UTC 24 |
Aug 27 03:12:04 PM UTC 24 |
16030850962 ps |
| T1178 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/99.otp_ctrl_stress_all_with_rand_reset.689428140 |
|
|
Aug 27 03:10:29 PM UTC 24 |
Aug 27 03:12:14 PM UTC 24 |
8104561362 ps |
| T388 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/94.otp_ctrl_stress_all_with_rand_reset.3028500151 |
|
|
Aug 27 03:10:16 PM UTC 24 |
Aug 27 03:12:20 PM UTC 24 |
25023115749 ps |
| T1179 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/58.otp_ctrl_stress_all_with_rand_reset.3201175920 |
|
|
Aug 27 03:09:11 PM UTC 24 |
Aug 27 03:12:34 PM UTC 24 |
19915499242 ps |
| T1180 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/85.otp_ctrl_stress_all_with_rand_reset.1225353169 |
|
|
Aug 27 03:09:57 PM UTC 24 |
Aug 27 03:12:58 PM UTC 24 |
17426672587 ps |
| T1181 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/97.otp_ctrl_stress_all_with_rand_reset.191649817 |
|
|
Aug 27 03:10:23 PM UTC 24 |
Aug 27 03:14:21 PM UTC 24 |
10103825089 ps |
| T1182 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/default/33.otp_ctrl_stress_all.3829781378 |
|
|
Aug 27 03:07:20 PM UTC 24 |
Aug 27 03:15:00 PM UTC 24 |
145426720764 ps |
| T1183 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_intr_test.2997463465 |
|
|
Aug 27 03:11:55 PM UTC 24 |
Aug 27 03:11:57 PM UTC 24 |
79812125 ps |
| T1184 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_mem_partial_access.1459900578 |
|
|
Aug 27 03:11:55 PM UTC 24 |
Aug 27 03:11:57 PM UTC 24 |
74339693 ps |
| T309 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_rw.4218486881 |
|
|
Aug 27 03:11:55 PM UTC 24 |
Aug 27 03:11:57 PM UTC 24 |
49296020 ps |
| T1185 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_mem_walk.2164884362 |
|
|
Aug 27 03:11:55 PM UTC 24 |
Aug 27 03:11:58 PM UTC 24 |
71414488 ps |
| T314 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_csr_rw.834079503 |
|
|
Aug 27 03:12:08 PM UTC 24 |
Aug 27 03:12:11 PM UTC 24 |
152377717 ps |
| T1186 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_intr_test.704660369 |
|
|
Aug 27 03:11:55 PM UTC 24 |
Aug 27 03:11:58 PM UTC 24 |
75612895 ps |
| T1187 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_mem_walk.1954070209 |
|
|
Aug 27 03:11:55 PM UTC 24 |
Aug 27 03:11:58 PM UTC 24 |
513384648 ps |
| T1188 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_mem_partial_access.824497311 |
|
|
Aug 27 03:11:56 PM UTC 24 |
Aug 27 03:11:59 PM UTC 24 |
135683969 ps |
| T310 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_same_csr_outstanding.3052219894 |
|
|
Aug 27 03:11:55 PM UTC 24 |
Aug 27 03:11:59 PM UTC 24 |
92461375 ps |
| T358 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_rw.2712417382 |
|
|
Aug 27 03:11:56 PM UTC 24 |
Aug 27 03:11:59 PM UTC 24 |
79405276 ps |
| T311 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_hw_reset.2540241196 |
|
|
Aug 27 03:11:55 PM UTC 24 |
Aug 27 03:11:59 PM UTC 24 |
403259613 ps |
| T312 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_mem_rw_with_rand_reset.1203199990 |
|
|
Aug 27 03:11:55 PM UTC 24 |
Aug 27 03:12:00 PM UTC 24 |
272750081 ps |
| T344 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_hw_reset.4277748822 |
|
|
Aug 27 03:11:56 PM UTC 24 |
Aug 27 03:12:00 PM UTC 24 |
179925928 ps |
| T1189 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_tl_errors.3407020848 |
|
|
Aug 27 03:11:55 PM UTC 24 |
Aug 27 03:12:00 PM UTC 24 |
222414000 ps |
| T359 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_bit_bash.2173131146 |
|
|
Aug 27 03:11:55 PM UTC 24 |
Aug 27 03:12:00 PM UTC 24 |
1239721062 ps |
| T427 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_mem_rw_with_rand_reset.1004404516 |
|
|
Aug 27 03:11:57 PM UTC 24 |
Aug 27 03:12:01 PM UTC 24 |
182794547 ps |
| T1190 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_tl_errors.2551567814 |
|
|
Aug 27 03:11:55 PM UTC 24 |
Aug 27 03:12:01 PM UTC 24 |
149090406 ps |
| T1191 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_intr_test.3566720347 |
|
|
Aug 27 03:11:59 PM UTC 24 |
Aug 27 03:12:01 PM UTC 24 |
40129537 ps |
| T1192 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_mem_partial_access.1934495406 |
|
|
Aug 27 03:11:59 PM UTC 24 |
Aug 27 03:12:01 PM UTC 24 |
38246424 ps |
| T1193 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_mem_walk.1458646250 |
|
|
Aug 27 03:11:59 PM UTC 24 |
Aug 27 03:12:01 PM UTC 24 |
49659853 ps |
| T1194 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_tl_errors.752919507 |
|
|
Aug 27 03:11:58 PM UTC 24 |
Aug 27 03:12:01 PM UTC 24 |
144728606 ps |
| T329 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_rw.3265189107 |
|
|
Aug 27 03:11:59 PM UTC 24 |
Aug 27 03:12:02 PM UTC 24 |
52768793 ps |
| T330 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_hw_reset.1891007617 |
|
|
Aug 27 03:11:59 PM UTC 24 |
Aug 27 03:12:02 PM UTC 24 |
100772708 ps |
| T352 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_same_csr_outstanding.1930362844 |
|
|
Aug 27 03:11:56 PM UTC 24 |
Aug 27 03:12:02 PM UTC 24 |
548890579 ps |
| T331 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_aliasing.360007460 |
|
|
Aug 27 03:11:55 PM UTC 24 |
Aug 27 03:12:02 PM UTC 24 |
165417379 ps |
| T332 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_aliasing.3752006372 |
|
|
Aug 27 03:11:56 PM UTC 24 |
Aug 27 03:12:03 PM UTC 24 |
244511573 ps |
| T1195 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_mem_partial_access.172009410 |
|
|
Aug 27 03:12:01 PM UTC 24 |
Aug 27 03:12:04 PM UTC 24 |
46328304 ps |
| T353 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_csr_rw.2516558926 |
|
|
Aug 27 03:12:05 PM UTC 24 |
Aug 27 03:12:08 PM UTC 24 |
51114188 ps |
| T1196 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_csr_mem_rw_with_rand_reset.3467359405 |
|
|
Aug 27 03:12:05 PM UTC 24 |
Aug 27 03:12:08 PM UTC 24 |
75221996 ps |
| T1197 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_intr_test.3485381506 |
|
|
Aug 27 03:12:01 PM UTC 24 |
Aug 27 03:12:04 PM UTC 24 |
39551789 ps |
| T1198 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_mem_walk.637015566 |
|
|
Aug 27 03:12:01 PM UTC 24 |
Aug 27 03:12:04 PM UTC 24 |
129989071 ps |
| T360 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_rw.85516229 |
|
|
Aug 27 03:12:02 PM UTC 24 |
Aug 27 03:12:04 PM UTC 24 |
88063273 ps |
| T1199 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_intr_test.1114650363 |
|
|
Aug 27 03:12:02 PM UTC 24 |
Aug 27 03:12:04 PM UTC 24 |
143874431 ps |
| T428 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_mem_rw_with_rand_reset.861215300 |
|
|
Aug 27 03:12:01 PM UTC 24 |
Aug 27 03:12:04 PM UTC 24 |
135502270 ps |
| T1200 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_mem_walk.745877467 |
|
|
Aug 27 03:12:02 PM UTC 24 |
Aug 27 03:12:05 PM UTC 24 |
46599169 ps |
| T1201 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_mem_partial_access.727243862 |
|
|
Aug 27 03:12:02 PM UTC 24 |
Aug 27 03:12:05 PM UTC 24 |
560293816 ps |
| T333 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_csr_rw.941193924 |
|
|
Aug 27 03:12:02 PM UTC 24 |
Aug 27 03:12:05 PM UTC 24 |
41564832 ps |
| T1202 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_intr_test.2434487142 |
|
|
Aug 27 03:12:02 PM UTC 24 |
Aug 27 03:12:05 PM UTC 24 |
68080720 ps |
| T334 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_hw_reset.1060102612 |
|
|
Aug 27 03:12:01 PM UTC 24 |
Aug 27 03:12:05 PM UTC 24 |
102363721 ps |
| T354 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_same_csr_outstanding.2359716983 |
|
|
Aug 27 03:12:01 PM UTC 24 |
Aug 27 03:12:05 PM UTC 24 |
1091097491 ps |
| T335 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_csr_hw_reset.1582091845 |
|
|
Aug 27 03:12:02 PM UTC 24 |
Aug 27 03:12:05 PM UTC 24 |
129323592 ps |
| T336 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_same_csr_outstanding.3854362149 |
|
|
Aug 27 03:12:02 PM UTC 24 |
Aug 27 03:12:05 PM UTC 24 |
236637530 ps |
| T1203 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_csr_rw.1510223506 |
|
|
Aug 27 03:12:02 PM UTC 24 |
Aug 27 03:12:05 PM UTC 24 |
72867994 ps |
| T429 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_aliasing.3615175703 |
|
|
Aug 27 03:12:01 PM UTC 24 |
Aug 27 03:12:05 PM UTC 24 |
109598000 ps |
| T1204 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_mem_rw_with_rand_reset.2034794323 |
|
|
Aug 27 03:12:02 PM UTC 24 |
Aug 27 03:12:06 PM UTC 24 |
268062293 ps |
| T1205 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_tl_errors.970337664 |
|
|
Aug 27 03:12:01 PM UTC 24 |
Aug 27 03:12:06 PM UTC 24 |
73337373 ps |
| T355 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_same_csr_outstanding.2843178334 |
|
|
Aug 27 03:12:02 PM UTC 24 |
Aug 27 03:12:06 PM UTC 24 |
670665647 ps |
| T1206 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_csr_mem_rw_with_rand_reset.2525830637 |
|
|
Aug 27 03:12:02 PM UTC 24 |
Aug 27 03:12:06 PM UTC 24 |
139917758 ps |
| T1207 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_csr_mem_rw_with_rand_reset.2264126504 |
|
|
Aug 27 03:12:02 PM UTC 24 |
Aug 27 03:12:06 PM UTC 24 |
173321980 ps |
| T361 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_bit_bash.194449423 |
|
|
Aug 27 03:12:02 PM UTC 24 |
Aug 27 03:12:06 PM UTC 24 |
222780240 ps |
| T1208 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_intr_test.2466188515 |
|
|
Aug 27 03:12:08 PM UTC 24 |
Aug 27 03:12:11 PM UTC 24 |
575911745 ps |
| T1209 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_bit_bash.1896638908 |
|
|
Aug 27 03:11:56 PM UTC 24 |
Aug 27 03:12:07 PM UTC 24 |
382542411 ps |
| T1210 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_tl_errors.215645072 |
|
|
Aug 27 03:12:02 PM UTC 24 |
Aug 27 03:12:07 PM UTC 24 |
357691030 ps |
| T356 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_same_csr_outstanding.4003220556 |
|
|
Aug 27 03:12:02 PM UTC 24 |
Aug 27 03:12:07 PM UTC 24 |
954844723 ps |
| T1211 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_csr_aliasing.367153269 |
|
|
Aug 27 03:12:02 PM UTC 24 |
Aug 27 03:12:07 PM UTC 24 |
303963451 ps |
| T1212 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_intr_test.2954496 |
|
|
Aug 27 03:12:05 PM UTC 24 |
Aug 27 03:12:07 PM UTC 24 |
40402501 ps |
| T1213 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_tl_errors.2539541819 |
|
|
Aug 27 03:12:02 PM UTC 24 |
Aug 27 03:12:07 PM UTC 24 |
123059246 ps |
| T1214 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_tl_errors.742151258 |
|
|
Aug 27 03:12:02 PM UTC 24 |
Aug 27 03:12:07 PM UTC 24 |
205280044 ps |
| T357 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_csr_rw.3014650772 |
|
|
Aug 27 03:12:05 PM UTC 24 |
Aug 27 03:12:08 PM UTC 24 |
81078123 ps |
| T345 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_csr_rw.2544845396 |
|
|
Aug 27 03:12:05 PM UTC 24 |
Aug 27 03:12:08 PM UTC 24 |
52091198 ps |
| T1215 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_intr_test.3561328991 |
|
|
Aug 27 03:12:05 PM UTC 24 |
Aug 27 03:12:08 PM UTC 24 |
595945510 ps |
| T346 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_csr_rw.2160283913 |
|
|
Aug 27 03:12:05 PM UTC 24 |
Aug 27 03:12:08 PM UTC 24 |
102345059 ps |
| T1216 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_same_csr_outstanding.2104961080 |
|
|
Aug 27 03:12:05 PM UTC 24 |
Aug 27 03:12:08 PM UTC 24 |
87062511 ps |
| T305 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_tl_intg_err.1069080036 |
|
|
Aug 27 03:11:58 PM UTC 24 |
Aug 27 03:12:08 PM UTC 24 |
2934195336 ps |
| T1217 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_same_csr_outstanding.3342558151 |
|
|
Aug 27 03:12:05 PM UTC 24 |
Aug 27 03:12:08 PM UTC 24 |
51257593 ps |
| T1218 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_intr_test.2965167700 |
|
|
Aug 27 03:12:05 PM UTC 24 |
Aug 27 03:12:08 PM UTC 24 |
129322941 ps |
| T1219 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_bit_bash.1250357855 |
|
|
Aug 27 03:12:01 PM UTC 24 |
Aug 27 03:12:08 PM UTC 24 |
283214786 ps |
| T1220 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_intr_test.4162027687 |
|
|
Aug 27 03:12:05 PM UTC 24 |
Aug 27 03:12:08 PM UTC 24 |
569668249 ps |
| T1221 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_intr_test.570449647 |
|
|
Aug 27 03:12:06 PM UTC 24 |
Aug 27 03:12:08 PM UTC 24 |
524286949 ps |
| T347 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_aliasing.1983866764 |
|
|
Aug 27 03:12:02 PM UTC 24 |
Aug 27 03:12:09 PM UTC 24 |
465807799 ps |
| T1222 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_csr_mem_rw_with_rand_reset.1247415383 |
|
|
Aug 27 03:12:05 PM UTC 24 |
Aug 27 03:12:09 PM UTC 24 |
72737240 ps |
| T1223 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_csr_mem_rw_with_rand_reset.2409942153 |
|
|
Aug 27 03:12:05 PM UTC 24 |
Aug 27 03:12:09 PM UTC 24 |
298492165 ps |
| T1224 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_same_csr_outstanding.151393571 |
|
|
Aug 27 03:12:05 PM UTC 24 |
Aug 27 03:12:10 PM UTC 24 |
128898901 ps |
| T1225 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_tl_errors.4116064911 |
|
|
Aug 27 03:12:05 PM UTC 24 |
Aug 27 03:12:10 PM UTC 24 |
111213316 ps |
| T1226 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_csr_rw.1148014215 |
|
|
Aug 27 03:12:07 PM UTC 24 |
Aug 27 03:12:10 PM UTC 24 |
46276763 ps |
| T1227 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_same_csr_outstanding.3307198433 |
|
|
Aug 27 03:12:05 PM UTC 24 |
Aug 27 03:12:11 PM UTC 24 |
1938610142 ps |
| T1228 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_intr_test.3127481150 |
|
|
Aug 27 03:12:08 PM UTC 24 |
Aug 27 03:12:11 PM UTC 24 |
554425130 ps |
| T1229 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_csr_mem_rw_with_rand_reset.4245439593 |
|
|
Aug 27 03:12:06 PM UTC 24 |
Aug 27 03:12:11 PM UTC 24 |
403648260 ps |
| T1230 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_tl_errors.3850863492 |
|
|
Aug 27 03:12:05 PM UTC 24 |
Aug 27 03:12:11 PM UTC 24 |
1876687312 ps |
| T1231 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_csr_rw.4139968257 |
|
|
Aug 27 03:12:07 PM UTC 24 |
Aug 27 03:12:11 PM UTC 24 |
55512402 ps |
| T306 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_tl_intg_err.633150476 |
|
|
Aug 27 03:12:09 PM UTC 24 |
Aug 27 03:12:19 PM UTC 24 |
623482606 ps |
| T1232 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_intr_test.2219991431 |
|
|
Aug 27 03:12:07 PM UTC 24 |
Aug 27 03:12:11 PM UTC 24 |
43718126 ps |
| T1233 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/33.otp_ctrl_intr_test.1376220062 |
|
|
Aug 27 03:12:16 PM UTC 24 |
Aug 27 03:12:19 PM UTC 24 |
45135292 ps |
| T307 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_tl_intg_err.1235368883 |
|
|
Aug 27 03:12:08 PM UTC 24 |
Aug 27 03:12:19 PM UTC 24 |
688455468 ps |
| T1234 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_same_csr_outstanding.4001447530 |
|
|
Aug 27 03:12:07 PM UTC 24 |
Aug 27 03:12:11 PM UTC 24 |
99098380 ps |
| T1235 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_csr_mem_rw_with_rand_reset.4249414044 |
|
|
Aug 27 03:12:08 PM UTC 24 |
Aug 27 03:12:11 PM UTC 24 |
69224304 ps |
| T1236 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_csr_mem_rw_with_rand_reset.3769616687 |
|
|
Aug 27 03:12:07 PM UTC 24 |
Aug 27 03:12:12 PM UTC 24 |
1728711930 ps |
| T1237 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_csr_rw.1934212606 |
|
|
Aug 27 03:12:09 PM UTC 24 |
Aug 27 03:12:12 PM UTC 24 |
44066670 ps |
| T1238 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_same_csr_outstanding.1117694031 |
|
|
Aug 27 03:12:08 PM UTC 24 |
Aug 27 03:12:12 PM UTC 24 |
1241801254 ps |
| T1239 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_intr_test.3862569698 |
|
|
Aug 27 03:12:09 PM UTC 24 |
Aug 27 03:12:12 PM UTC 24 |
137399035 ps |
| T1240 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_intr_test.1896576796 |
|
|
Aug 27 03:12:09 PM UTC 24 |
Aug 27 03:12:13 PM UTC 24 |
42374677 ps |
| T348 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_csr_rw.3815305254 |
|
|
Aug 27 03:12:09 PM UTC 24 |
Aug 27 03:12:13 PM UTC 24 |
630298222 ps |
| T1241 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_intr_test.1189220474 |
|
|
Aug 27 03:12:10 PM UTC 24 |
Aug 27 03:12:13 PM UTC 24 |
45042665 ps |
| T349 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_csr_rw.2542247379 |
|
|
Aug 27 03:12:09 PM UTC 24 |
Aug 27 03:12:13 PM UTC 24 |
57645802 ps |
| T1242 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_csr_mem_rw_with_rand_reset.3532119633 |
|
|
Aug 27 03:12:09 PM UTC 24 |
Aug 27 03:12:13 PM UTC 24 |
165889974 ps |
| T1243 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_same_csr_outstanding.2934691553 |
|
|
Aug 27 03:12:09 PM UTC 24 |
Aug 27 03:12:13 PM UTC 24 |
75486286 ps |
| T1244 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_csr_mem_rw_with_rand_reset.1701326709 |
|
|
Aug 27 03:12:08 PM UTC 24 |
Aug 27 03:12:13 PM UTC 24 |
112172830 ps |
| T1245 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_csr_mem_rw_with_rand_reset.338698061 |
|
|
Aug 27 03:12:09 PM UTC 24 |
Aug 27 03:12:13 PM UTC 24 |
154179525 ps |
| T316 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_tl_intg_err.4092508724 |
|
|
Aug 27 03:12:02 PM UTC 24 |
Aug 27 03:12:14 PM UTC 24 |
726179502 ps |
| T1246 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_tl_errors.1434363562 |
|
|
Aug 27 03:12:06 PM UTC 24 |
Aug 27 03:12:14 PM UTC 24 |
804151728 ps |
| T1247 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_csr_mem_rw_with_rand_reset.1164328869 |
|
|
Aug 27 03:12:10 PM UTC 24 |
Aug 27 03:12:14 PM UTC 24 |
70088268 ps |
| T1248 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_csr_rw.529385328 |
|
|
Aug 27 03:12:11 PM UTC 24 |
Aug 27 03:12:14 PM UTC 24 |
97161158 ps |
| T1249 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_same_csr_outstanding.158167722 |
|
|
Aug 27 03:12:10 PM UTC 24 |
Aug 27 03:12:14 PM UTC 24 |
98968750 ps |
| T1250 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_same_csr_outstanding.2048291304 |
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|
Aug 27 03:12:11 PM UTC 24 |
Aug 27 03:12:14 PM UTC 24 |
75404081 ps |
| T1251 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_same_csr_outstanding.644843551 |
|
|
Aug 27 03:12:08 PM UTC 24 |
Aug 27 03:12:14 PM UTC 24 |
1697198265 ps |
| T409 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_tl_intg_err.2428396428 |
|
|
Aug 27 03:12:02 PM UTC 24 |
Aug 27 03:12:20 PM UTC 24 |
2592816258 ps |
| T1252 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_tl_errors.3964128467 |
|
|
Aug 27 03:12:07 PM UTC 24 |
Aug 27 03:12:14 PM UTC 24 |
1919672201 ps |
| T1253 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_same_csr_outstanding.2710403129 |
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|
Aug 27 03:12:09 PM UTC 24 |
Aug 27 03:12:15 PM UTC 24 |
1302831360 ps |
| T1254 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_csr_mem_rw_with_rand_reset.1135762360 |
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|
Aug 27 03:12:11 PM UTC 24 |
Aug 27 03:12:15 PM UTC 24 |
110001450 ps |
| T413 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_tl_intg_err.4065881713 |
|
|
Aug 27 03:11:55 PM UTC 24 |
Aug 27 03:12:15 PM UTC 24 |
2670235051 ps |
| T351 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_csr_rw.62926057 |
|
|
Aug 27 03:12:12 PM UTC 24 |
Aug 27 03:12:15 PM UTC 24 |
114302513 ps |
| T1255 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_intr_test.1097330569 |
|
|
Aug 27 03:12:12 PM UTC 24 |
Aug 27 03:12:15 PM UTC 24 |
42962452 ps |
| T1256 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_tl_errors.3746514650 |
|
|
Aug 27 03:12:05 PM UTC 24 |
Aug 27 03:12:15 PM UTC 24 |
3233984825 ps |
| T1257 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/37.otp_ctrl_intr_test.2128468599 |
|
|
Aug 27 03:12:16 PM UTC 24 |
Aug 27 03:12:19 PM UTC 24 |
97324019 ps |
| T410 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_tl_intg_err.3990999834 |
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|
Aug 27 03:12:02 PM UTC 24 |
Aug 27 03:12:20 PM UTC 24 |
1211783645 ps |
| T350 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_csr_rw.3261893465 |
|
|
Aug 27 03:12:12 PM UTC 24 |
Aug 27 03:12:16 PM UTC 24 |
46149851 ps |
| T1258 |
/workspaces/repo/scratch/os_regression_2024_08_26/otp_ctrl-sim-vcs/coverage/cover_reg_top/40.otp_ctrl_intr_test.539961878 |
|
|
Aug 27 03:12:16 PM UTC 24 |
Aug 27 03:12:22 PM UTC 24 |
48828258 ps |