Group : otp_ctrl_env_pkg::otp_ctrl_env_cov::flash_req_cg
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Group : otp_ctrl_env_pkg::otp_ctrl_env_cov::flash_req_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/default/sim-vcs/../src/lowrisc_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv


Summary for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::flash_req_cg

CATEGORY   EXPECTED   UNCOVERED   COVERED   PERCENT   
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::flash_req_cg
VARIABLE   EXPECTED   UNCOVERED   COVERED   PERCENT   GOAL   WEIGHT   AT LEAST   AUTO BIN MAX   COMMENT   
flash_index 2 0 2 100.00 100 1 1 0
secret1_lock 2 0 2 100.00 100 1 1 2


Crosses for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::flash_req_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
flash_req_lock_cross 4 0 4 100.00 100 1 1 0


Summary for Variable flash_index

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for flash_index

Excluded/Illegal bins
NAMECOUNTSTATUS
il 0 Illegal


Covered bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
flash_addr_key 4384 1 T3 1 T5 2 T6 3
flash_data_key 4357 1 T3 1 T5 2 T6 3


Summary for Variable secret1_lock

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for secret1_lock

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] 4353 1 T3 2 T5 2 T6 6
auto[1] 4388 1 T5 2 T13 2 T36 10


Summary for Cross flash_req_lock_cross

Samples crossed: flash_index secret1_lock
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for flash_req_lock_cross

Bins
flash_index   secret1_lock   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
flash_addr_key auto[0] 2171 1 T3 1 T5 1 T6 3
flash_addr_key auto[1] 2213 1 T5 1 T13 1 T36 5
flash_data_key auto[0] 2182 1 T3 1 T5 1 T6 3
flash_data_key auto[1] 2175 1 T5 1 T13 1 T36 5