Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
94.78 93.81 96.18 95.85 90.93 97.10 96.34 93.28


Total tests in report: 1296
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
65.73 65.73 86.15 86.15 77.39 77.39 53.43 53.43 41.29 41.29 80.23 80.23 88.29 88.29 33.31 33.31 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_parallel_key_req.1403374659
72.29 6.56 88.70 2.55 80.52 3.13 60.59 7.16 57.04 15.75 84.04 3.81 89.17 0.88 45.96 12.65 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_check_fail.516948704
75.99 3.70 90.40 1.70 85.57 5.04 70.06 9.48 58.71 1.67 89.09 5.05 90.05 0.88 48.03 2.07 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_test_access.2519795807
78.77 2.78 91.02 0.62 90.24 4.67 70.38 0.32 58.71 0.00 90.81 1.72 91.54 1.49 58.68 10.65 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_stress_all_with_rand_reset.4285515925
80.99 2.22 91.17 0.15 91.40 1.17 78.36 7.99 61.34 2.63 91.52 0.71 91.67 0.14 61.47 2.79 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_stress_all.2048959816
82.59 1.60 91.17 0.00 91.50 0.10 80.54 2.17 65.63 4.30 91.52 0.00 91.67 0.00 66.12 4.65 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_stress_all.3664303684
83.63 1.04 91.19 0.02 91.68 0.17 84.72 4.18 65.87 0.24 91.66 0.14 91.74 0.07 68.55 2.43 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_stress_all.2647797528
84.57 0.94 91.47 0.28 92.55 0.87 86.85 2.14 66.59 0.72 92.14 0.48 92.08 0.34 70.34 1.79 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_parallel_lc_req.3542055283
85.41 0.84 91.73 0.26 93.22 0.67 87.28 0.43 66.59 0.00 94.00 1.86 94.38 2.30 70.69 0.36 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_sec_cm.3775669234
86.00 0.59 91.91 0.18 93.34 0.12 87.36 0.08 69.21 2.63 94.24 0.24 94.45 0.07 71.48 0.79 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_init_fail.1513320377
86.56 0.56 92.05 0.15 93.37 0.02 88.69 1.33 69.93 0.72 94.52 0.29 94.45 0.00 72.91 1.43 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_stress_all.91814441
87.04 0.48 92.25 0.20 93.57 0.20 88.80 0.11 71.84 1.91 94.90 0.38 94.72 0.27 73.20 0.29 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/114.otp_ctrl_init_fail.3134839555
87.46 0.42 92.35 0.10 93.66 0.10 89.11 0.31 73.99 2.15 95.14 0.24 94.72 0.00 73.27 0.07 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_init_fail.1169820223
87.88 0.42 92.46 0.11 93.71 0.05 89.63 0.52 75.18 1.19 95.28 0.14 94.85 0.14 74.05 0.79 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_macro_errs.2473307175
88.29 0.41 92.51 0.05 94.09 0.37 90.10 0.47 75.18 0.00 95.38 0.10 94.85 0.00 75.91 1.86 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_stress_all_with_rand_reset.3217582830
88.67 0.38 92.51 0.00 94.09 0.00 91.79 1.69 75.18 0.00 95.38 0.00 94.85 0.00 76.91 1.00 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_background_chks.2205138010
89.02 0.34 92.53 0.02 94.29 0.20 91.79 0.00 75.18 0.00 95.43 0.05 94.85 0.00 79.06 2.14 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_tl_intg_err.3310910893
89.32 0.30 92.53 0.00 94.31 0.02 91.95 0.15 75.89 0.72 95.43 0.00 94.85 0.00 80.27 1.22 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_stress_all.1603129563
89.59 0.27 92.64 0.11 94.36 0.05 91.95 0.00 76.85 0.95 95.57 0.14 94.85 0.00 80.91 0.64 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_check_fail.22150385
89.84 0.25 92.64 0.00 94.39 0.02 93.18 1.24 76.85 0.00 95.57 0.00 94.85 0.00 81.42 0.50 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_parallel_lc_req.202320477
90.09 0.25 92.64 0.00 94.39 0.00 93.26 0.08 77.80 0.95 95.57 0.00 94.85 0.00 82.13 0.71 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_stress_all.1237600459
90.31 0.22 92.64 0.00 94.41 0.02 93.47 0.21 77.80 0.00 95.57 0.00 94.85 0.00 83.42 1.29 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_stress_all.941378512
90.52 0.21 92.69 0.05 94.43 0.02 93.55 0.08 79.00 1.19 95.62 0.05 94.85 0.00 83.49 0.07 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_init_fail.2759768766
90.73 0.21 92.77 0.08 94.48 0.05 93.55 0.00 80.19 1.19 95.76 0.14 94.85 0.00 83.49 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/236.otp_ctrl_init_fail.2056268470
90.93 0.20 92.77 0.00 94.51 0.02 93.55 0.00 80.19 0.00 95.76 0.00 95.94 1.08 83.77 0.29 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_aliasing.1148473037
91.13 0.20 92.85 0.08 94.51 0.00 93.55 0.00 80.67 0.48 95.81 0.05 95.94 0.00 84.56 0.79 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/59.otp_ctrl_stress_all_with_rand_reset.1654820868
91.30 0.17 92.90 0.05 94.53 0.02 93.55 0.00 81.62 0.95 95.90 0.10 95.94 0.00 84.63 0.07 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/108.otp_ctrl_init_fail.2139594667
91.46 0.16 92.90 0.00 94.53 0.00 93.76 0.21 81.62 0.00 95.90 0.00 95.94 0.00 85.56 0.93 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_parallel_key_req.3282989581
91.61 0.15 92.90 0.00 94.81 0.27 93.91 0.15 81.62 0.00 95.90 0.00 95.94 0.00 86.20 0.64 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_alert_test.2046231705
91.76 0.15 92.90 0.00 94.83 0.02 93.91 0.00 81.86 0.24 95.95 0.05 95.94 0.00 86.92 0.71 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/26.otp_ctrl_stress_all_with_rand_reset.3896283989
91.90 0.14 92.95 0.05 94.86 0.02 94.00 0.09 82.58 0.72 96.00 0.05 95.94 0.00 86.99 0.07 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_init_fail.408206148
92.04 0.14 93.05 0.10 94.86 0.00 94.02 0.02 83.05 0.48 96.09 0.10 96.01 0.07 87.21 0.21 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/23.otp_ctrl_macro_errs.2793561273
92.17 0.13 93.10 0.05 94.88 0.02 94.02 0.00 83.77 0.72 96.14 0.05 96.01 0.00 87.28 0.07 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/132.otp_ctrl_init_fail.2387279264
92.29 0.12 93.12 0.02 94.91 0.02 94.03 0.01 84.25 0.48 96.19 0.05 96.01 0.00 87.56 0.29 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_check_fail.2077060846
92.41 0.12 93.17 0.05 94.96 0.05 94.06 0.03 84.73 0.48 96.28 0.10 96.07 0.07 87.63 0.07 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/230.otp_ctrl_init_fail.4044104236
92.53 0.12 93.20 0.03 94.98 0.02 94.06 0.00 85.44 0.72 96.33 0.05 96.07 0.00 87.63 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_init_fail.2470765694
92.64 0.11 93.23 0.03 94.98 0.00 94.06 0.00 86.16 0.72 96.38 0.05 96.07 0.00 87.63 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/290.otp_ctrl_init_fail.3266333935
92.75 0.11 93.23 0.00 95.06 0.07 94.31 0.26 86.16 0.00 96.38 0.00 96.07 0.00 88.06 0.43 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_stress_all.1700131906
92.86 0.10 93.23 0.00 95.06 0.00 94.39 0.08 86.16 0.00 96.38 0.00 96.07 0.00 88.71 0.64 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_stress_all.3444340204
92.95 0.10 93.28 0.05 95.08 0.02 94.39 0.00 86.63 0.48 96.43 0.05 96.07 0.00 88.78 0.07 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/107.otp_ctrl_init_fail.2823437179
93.05 0.10 93.33 0.05 95.11 0.02 94.39 0.00 87.11 0.48 96.47 0.05 96.07 0.00 88.85 0.07 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/144.otp_ctrl_init_fail.1612744735
93.14 0.09 93.33 0.00 95.11 0.00 94.41 0.01 87.59 0.48 96.47 0.00 96.07 0.00 88.99 0.14 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_stress_all.2452547013
93.23 0.09 93.33 0.00 95.11 0.00 94.41 0.00 88.07 0.48 96.47 0.00 96.07 0.00 89.14 0.14 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/31.otp_ctrl_stress_all.711383745
93.31 0.09 93.33 0.00 95.23 0.12 94.68 0.27 88.07 0.00 96.47 0.00 96.07 0.00 89.35 0.21 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_regwen.111525788
93.40 0.08 93.39 0.07 95.25 0.02 94.69 0.01 88.31 0.24 96.57 0.10 96.07 0.00 89.49 0.14 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/36.otp_ctrl_check_fail.4019736674
93.46 0.07 93.39 0.00 95.25 0.00 94.71 0.02 88.54 0.24 96.57 0.00 96.07 0.00 89.71 0.21 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_parallel_lc_esc.19457358
93.53 0.06 93.39 0.00 95.25 0.00 94.85 0.15 88.54 0.00 96.57 0.00 96.07 0.00 89.99 0.29 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_background_chks.568793475
93.59 0.06 93.39 0.00 95.25 0.00 94.90 0.04 88.78 0.24 96.57 0.00 96.07 0.00 90.14 0.14 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_stress_all.2371217691
93.65 0.06 93.44 0.05 95.28 0.02 94.90 0.00 89.02 0.24 96.67 0.10 96.07 0.00 90.14 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/102.otp_ctrl_init_fail.51856376
93.70 0.06 93.49 0.05 95.30 0.02 94.90 0.00 89.26 0.24 96.76 0.10 96.07 0.00 90.14 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/36.otp_ctrl_init_fail.1016058917
93.76 0.06 93.49 0.00 95.30 0.00 95.07 0.18 89.26 0.00 96.76 0.00 96.07 0.00 90.35 0.21 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_dai_lock.2451603630
93.81 0.05 93.49 0.00 95.30 0.00 95.07 0.00 89.26 0.00 96.76 0.00 96.07 0.00 90.71 0.36 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/22.otp_ctrl_stress_all_with_rand_reset.634732796
93.86 0.05 93.53 0.03 95.35 0.05 95.07 0.00 89.26 0.00 96.86 0.10 96.07 0.00 90.85 0.14 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/49.otp_ctrl_check_fail.4108802857
93.90 0.05 93.53 0.00 95.35 0.00 95.11 0.03 89.26 0.00 96.86 0.00 96.07 0.00 91.14 0.29 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_regwen.3925439154
93.95 0.04 93.53 0.00 95.35 0.00 95.11 0.00 89.50 0.24 96.86 0.00 96.07 0.00 91.21 0.07 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/34.otp_ctrl_parallel_lc_esc.1284492294
93.99 0.04 93.53 0.00 95.35 0.00 95.12 0.01 89.50 0.00 96.86 0.00 96.07 0.00 91.49 0.29 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/25.otp_ctrl_stress_all.400043522
94.03 0.04 93.53 0.00 95.35 0.00 95.12 0.00 89.50 0.00 96.86 0.00 96.07 0.00 91.78 0.29 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_tl_intg_err.1847904568
94.07 0.04 93.53 0.00 95.35 0.00 95.12 0.00 89.50 0.00 96.86 0.00 96.07 0.00 92.07 0.29 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_parallel_key_req.2003278644
94.11 0.04 93.53 0.00 95.38 0.02 95.12 0.00 89.74 0.24 96.86 0.00 96.07 0.00 92.07 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/120.otp_ctrl_parallel_lc_esc.2560660669
94.14 0.04 93.62 0.10 95.38 0.00 95.12 0.00 89.74 0.00 96.95 0.10 96.14 0.07 92.07 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/28.otp_ctrl_check_fail.672156906
94.18 0.03 93.62 0.00 95.38 0.00 95.12 0.00 89.98 0.24 96.95 0.00 96.14 0.00 92.07 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/107.otp_ctrl_parallel_lc_esc.1599674800
94.21 0.03 93.62 0.00 95.38 0.00 95.12 0.00 90.21 0.24 96.95 0.00 96.14 0.00 92.07 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/253.otp_ctrl_init_fail.560426676
94.25 0.03 93.62 0.00 95.38 0.00 95.12 0.00 90.45 0.24 96.95 0.00 96.14 0.00 92.07 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_parallel_lc_esc.3745584481
94.28 0.03 93.62 0.00 95.38 0.00 95.12 0.00 90.69 0.24 96.95 0.00 96.14 0.00 92.07 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/44.otp_ctrl_parallel_lc_esc.875870952
94.32 0.03 93.62 0.00 95.38 0.00 95.12 0.00 90.93 0.24 96.95 0.00 96.14 0.00 92.07 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/78.otp_ctrl_parallel_lc_esc.1096286575
94.35 0.03 93.62 0.00 95.38 0.00 95.12 0.00 90.93 0.00 96.95 0.00 96.21 0.07 92.21 0.14 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/23.otp_ctrl_stress_all_with_rand_reset.2051757924
94.37 0.03 93.66 0.03 95.38 0.00 95.22 0.11 90.93 0.00 97.00 0.05 96.21 0.00 92.21 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/64.otp_ctrl_init_fail.507974210
94.40 0.03 93.66 0.00 95.43 0.05 95.22 0.00 90.93 0.00 97.00 0.00 96.34 0.14 92.21 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_rw.381231726
94.42 0.03 93.66 0.00 95.43 0.00 95.26 0.04 90.93 0.00 97.00 0.00 96.34 0.00 92.35 0.14 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_macro_errs.808615239
94.45 0.03 93.66 0.00 95.43 0.00 95.30 0.04 90.93 0.00 97.00 0.00 96.34 0.00 92.49 0.14 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_regwen.709205157
94.47 0.02 93.66 0.00 95.45 0.02 95.30 0.00 90.93 0.00 97.00 0.00 96.34 0.00 92.64 0.14 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_tl_intg_err.3094511419
94.50 0.02 93.66 0.00 95.45 0.00 95.30 0.00 90.93 0.00 97.00 0.00 96.34 0.00 92.78 0.14 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/28.otp_ctrl_parallel_lc_req.4204788747
94.51 0.02 93.66 0.00 95.45 0.00 95.42 0.12 90.93 0.00 97.00 0.00 96.34 0.00 92.78 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_test_access.2673280295
94.53 0.01 93.66 0.00 95.45 0.00 95.52 0.10 90.93 0.00 97.00 0.00 96.34 0.00 92.78 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_test_access.2569287711
94.54 0.01 93.71 0.05 95.45 0.00 95.52 0.00 90.93 0.00 97.05 0.05 96.34 0.00 92.78 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/30.otp_ctrl_check_fail.1447580658
94.55 0.01 93.72 0.02 95.48 0.02 95.53 0.01 90.93 0.00 97.09 0.05 96.34 0.00 92.78 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_check_fail.2712067748
94.57 0.01 93.72 0.00 95.48 0.00 95.55 0.02 90.93 0.00 97.09 0.00 96.34 0.00 92.85 0.07 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/26.otp_ctrl_test_access.2731578046
94.58 0.01 93.72 0.00 95.48 0.00 95.56 0.01 90.93 0.00 97.09 0.00 96.34 0.00 92.92 0.07 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_regwen.2646414170
94.59 0.01 93.72 0.00 95.48 0.00 95.57 0.01 90.93 0.00 97.09 0.00 96.34 0.00 92.99 0.07 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_regwen.2095365569
94.60 0.01 93.75 0.03 95.48 0.00 95.57 0.00 90.93 0.00 97.14 0.05 96.34 0.00 92.99 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/103.otp_ctrl_init_fail.1468958307
94.61 0.01 93.79 0.03 95.48 0.00 95.57 0.00 90.93 0.00 97.19 0.05 96.34 0.00 92.99 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_init_fail.2826709241
94.62 0.01 93.79 0.00 95.48 0.00 95.57 0.00 90.93 0.00 97.19 0.00 96.34 0.00 93.07 0.07 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_tl_intg_err.4258562463
94.63 0.01 93.79 0.00 95.48 0.00 95.57 0.00 90.93 0.00 97.19 0.00 96.34 0.00 93.14 0.07 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_parallel_lc_esc.3276469751
94.64 0.01 93.79 0.00 95.48 0.00 95.57 0.00 90.93 0.00 97.19 0.00 96.34 0.00 93.21 0.07 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/53.otp_ctrl_stress_all_with_rand_reset.238184618
94.65 0.01 93.79 0.00 95.48 0.00 95.57 0.00 90.93 0.00 97.19 0.00 96.34 0.00 93.28 0.07 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/54.otp_ctrl_stress_all_with_rand_reset.4099891414
94.66 0.01 93.79 0.00 95.48 0.00 95.62 0.05 90.93 0.00 97.19 0.00 96.34 0.00 93.28 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/273.otp_ctrl_init_fail.3078056455
94.67 0.01 93.79 0.00 95.48 0.00 95.62 0.00 90.93 0.00 97.24 0.05 96.34 0.00 93.28 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_wake_up.3516037586
94.68 0.01 93.79 0.00 95.48 0.00 95.67 0.05 90.93 0.00 97.24 0.00 96.34 0.00 93.28 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_parallel_lc_req.871767957
94.68 0.01 93.79 0.00 95.48 0.00 95.71 0.04 90.93 0.00 97.24 0.00 96.34 0.00 93.28 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/25.otp_ctrl_smoke.1666169765
94.69 0.01 93.79 0.00 95.48 0.00 95.74 0.03 90.93 0.00 97.24 0.00 96.34 0.00 93.28 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_test_access.4212862017
94.69 0.01 93.79 0.00 95.48 0.00 95.77 0.03 90.93 0.00 97.24 0.00 96.34 0.00 93.28 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_init_fail.3960032547
94.69 0.01 93.79 0.00 95.50 0.02 95.77 0.00 90.93 0.00 97.24 0.00 96.34 0.00 93.28 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_tl_intg_err.2758432229
94.70 0.01 93.79 0.00 95.53 0.02 95.77 0.00 90.93 0.00 97.24 0.00 96.34 0.00 93.28 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_parallel_lc_req.4243004541
94.70 0.01 93.79 0.00 95.55 0.02 95.77 0.00 90.93 0.00 97.24 0.00 96.34 0.00 93.28 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/218.otp_ctrl_init_fail.611174742
94.70 0.01 93.79 0.00 95.58 0.02 95.77 0.00 90.93 0.00 97.24 0.00 96.34 0.00 93.28 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/34.otp_ctrl_dai_errs.4087065717
94.71 0.01 93.79 0.00 95.58 0.00 95.79 0.02 90.93 0.00 97.24 0.00 96.34 0.00 93.28 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_smoke.3796185218
94.71 0.01 93.79 0.00 95.58 0.00 95.81 0.02 90.93 0.00 97.24 0.00 96.34 0.00 93.28 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/64.otp_ctrl_stress_all_with_rand_reset.1311414702
94.71 0.01 93.79 0.00 95.58 0.00 95.82 0.01 90.93 0.00 97.24 0.00 96.34 0.00 93.28 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_macro_errs.2924006118
94.71 0.01 93.79 0.00 95.58 0.00 95.83 0.01 90.93 0.00 97.24 0.00 96.34 0.00 93.28 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_test_access.3804310193
94.71 0.01 93.79 0.00 95.58 0.00 95.84 0.01 90.93 0.00 97.24 0.00 96.34 0.00 93.28 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/20.otp_ctrl_parallel_lc_req.1059513353
94.72 0.01 93.79 0.00 95.58 0.00 95.85 0.01 90.93 0.00 97.24 0.00 96.34 0.00 93.28 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/197.otp_ctrl_init_fail.4059150855
94.72 0.01 93.79 0.00 95.58 0.00 95.85 0.01 90.93 0.00 97.24 0.00 96.34 0.00 93.28 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_parallel_lc_req.810127744


Tests that do not contribute to grading

Name
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_bit_bash.4208413949
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_hw_reset.1982819549
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_mem_rw_with_rand_reset.541959616
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_intr_test.2953542244
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_mem_partial_access.618215746
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_mem_walk.278866625
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_same_csr_outstanding.716398168
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_tl_errors.2889572401
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_tl_intg_err.3952936901
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_aliasing.4114825229
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_bit_bash.2513331100
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_hw_reset.2324046051
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_mem_rw_with_rand_reset.1523921133
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_rw.1679635448
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_intr_test.2584068934
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_mem_partial_access.3430221672
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_mem_walk.448562365
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_same_csr_outstanding.1002807697
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_tl_errors.2869444256
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_csr_mem_rw_with_rand_reset.436729028
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_csr_rw.2598647329
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_intr_test.3423390412
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_same_csr_outstanding.3243220248
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_tl_errors.974969749
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_tl_intg_err.2117980776
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_csr_mem_rw_with_rand_reset.961990355
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_csr_rw.8818768
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_intr_test.53407117
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_same_csr_outstanding.1612980204
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_tl_errors.2742611288
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_tl_intg_err.2667642848
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_csr_mem_rw_with_rand_reset.673886822
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_csr_rw.2643840134
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_intr_test.2029993849
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_same_csr_outstanding.1577098645
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_tl_errors.3616206394
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_tl_intg_err.1054920134
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_csr_mem_rw_with_rand_reset.890263059
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_csr_rw.3442349237
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_intr_test.1635037571
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_same_csr_outstanding.4004917975
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_tl_errors.2322481905
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_csr_mem_rw_with_rand_reset.140333590
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_csr_rw.2645195868
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_intr_test.2348339194
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_same_csr_outstanding.3772322494
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_tl_errors.1365573626
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_tl_intg_err.1200398882
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_csr_mem_rw_with_rand_reset.1607989378
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_csr_rw.3797876214
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_intr_test.3464777224
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_same_csr_outstanding.379079254
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_tl_errors.76958834
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_tl_intg_err.373660662
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_csr_mem_rw_with_rand_reset.4152144388
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_csr_rw.2369280834
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_intr_test.2385596793
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_same_csr_outstanding.572459336
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_tl_errors.1499841491
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_tl_intg_err.197246773
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_csr_mem_rw_with_rand_reset.222804392
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_csr_rw.3650072658
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_intr_test.1762751266
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_same_csr_outstanding.1726363950
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_tl_errors.24498548
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_tl_intg_err.833910840
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_csr_mem_rw_with_rand_reset.3108890845
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_csr_rw.3018597213
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_intr_test.427516222
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_same_csr_outstanding.1893509123
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_tl_errors.1041928153
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_tl_intg_err.14865769
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/19.otp_ctrl_csr_mem_rw_with_rand_reset.2999241864
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/19.otp_ctrl_csr_rw.1868252802
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/19.otp_ctrl_intr_test.3663350471
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/19.otp_ctrl_same_csr_outstanding.3397846228
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/19.otp_ctrl_tl_errors.641347279
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/19.otp_ctrl_tl_intg_err.920116151
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_aliasing.1416981457
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_bit_bash.1474869734
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_hw_reset.2967171246
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_mem_rw_with_rand_reset.3586194912
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_rw.734148693
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_intr_test.1697095547
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_mem_partial_access.2912162050
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_mem_walk.98608865
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_same_csr_outstanding.3798891634
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_tl_errors.3672398468
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/20.otp_ctrl_intr_test.2023412462
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/cover_reg_top/21.otp_ctrl_intr_test.2058654928
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/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/81.otp_ctrl_init_fail.4084041155
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/81.otp_ctrl_parallel_lc_esc.1641449875
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/82.otp_ctrl_init_fail.41133599
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/82.otp_ctrl_parallel_lc_esc.1026249034
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/82.otp_ctrl_stress_all_with_rand_reset.3669042903
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/83.otp_ctrl_init_fail.2736271267
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/83.otp_ctrl_parallel_lc_esc.1896798688
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/83.otp_ctrl_stress_all_with_rand_reset.375378134
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/84.otp_ctrl_init_fail.4210131182
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/84.otp_ctrl_parallel_lc_esc.3891151347
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/85.otp_ctrl_init_fail.3090176649
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/85.otp_ctrl_parallel_lc_esc.1035917008
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/86.otp_ctrl_init_fail.1380457622
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/86.otp_ctrl_parallel_lc_esc.4074481375
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/86.otp_ctrl_stress_all_with_rand_reset.545318841
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/87.otp_ctrl_init_fail.2554172458
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/87.otp_ctrl_parallel_lc_esc.2660222808
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/88.otp_ctrl_init_fail.1666938740
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/88.otp_ctrl_parallel_lc_esc.1352730414
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/88.otp_ctrl_stress_all_with_rand_reset.252031524
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/89.otp_ctrl_init_fail.964403068
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/89.otp_ctrl_parallel_lc_esc.3875859859
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/89.otp_ctrl_stress_all_with_rand_reset.3837794684
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_alert_test.2458932780
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_background_chks.2912728200
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_check_fail.1117478578
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_dai_errs.1980972069
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_dai_lock.3303128602
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_init_fail.2281132806
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_macro_errs.1498643457
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_parallel_key_req.378728100
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_parallel_lc_esc.4198789520
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_parallel_lc_req.906938170
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_regwen.3369569692
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_smoke.592378727
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_stress_all_with_rand_reset.1243109307
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_test_access.3428835256
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/90.otp_ctrl_init_fail.3835896846
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/90.otp_ctrl_parallel_lc_esc.1310267674
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/90.otp_ctrl_stress_all_with_rand_reset.2545535138
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/91.otp_ctrl_init_fail.875248968
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/91.otp_ctrl_parallel_lc_esc.794771278
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/92.otp_ctrl_init_fail.2100700188
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/92.otp_ctrl_parallel_lc_esc.3819393318
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/92.otp_ctrl_stress_all_with_rand_reset.2639669357
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/93.otp_ctrl_init_fail.4089159985
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/93.otp_ctrl_parallel_lc_esc.618384850
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/93.otp_ctrl_stress_all_with_rand_reset.1366362600
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/94.otp_ctrl_init_fail.3379328514
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/94.otp_ctrl_parallel_lc_esc.800064886
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/94.otp_ctrl_stress_all_with_rand_reset.2046916011
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/95.otp_ctrl_init_fail.1349303004
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/95.otp_ctrl_parallel_lc_esc.209721515
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/96.otp_ctrl_init_fail.3736459746
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/96.otp_ctrl_parallel_lc_esc.2653966911
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/96.otp_ctrl_stress_all_with_rand_reset.37130852
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/97.otp_ctrl_init_fail.3580721506
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/97.otp_ctrl_parallel_lc_esc.18649844
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/97.otp_ctrl_stress_all_with_rand_reset.310868165
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/98.otp_ctrl_init_fail.3440288398
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/98.otp_ctrl_parallel_lc_esc.195336685
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/98.otp_ctrl_stress_all_with_rand_reset.2792156609
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/99.otp_ctrl_init_fail.2252889056
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/99.otp_ctrl_parallel_lc_esc.35663111
/workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/99.otp_ctrl_stress_all_with_rand_reset.1277870684




Total test records in report: 1296
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_wake_up.3516037586 Sep 01 06:48:42 PM UTC 24 Sep 01 06:48:47 PM UTC 24 782687238 ps
T2 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_init_fail.1513320377 Sep 01 06:48:42 PM UTC 24 Sep 01 06:48:49 PM UTC 24 516513120 ps
T3 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_smoke.789660120 Sep 01 06:48:42 PM UTC 24 Sep 01 06:48:51 PM UTC 24 556830863 ps
T4 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_parallel_lc_esc.1232470587 Sep 01 06:48:43 PM UTC 24 Sep 01 06:48:51 PM UTC 24 2450146456 ps
T10 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_alert_test.3181629561 Sep 01 06:48:50 PM UTC 24 Sep 01 06:48:54 PM UTC 24 54395723 ps
T5 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_regwen.111525788 Sep 01 06:48:45 PM UTC 24 Sep 01 06:48:55 PM UTC 24 519708727 ps
T6 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_parallel_key_req.1403374659 Sep 01 06:48:45 PM UTC 24 Sep 01 06:48:56 PM UTC 24 247541480 ps
T11 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_init_fail.2759768766 Sep 01 06:48:51 PM UTC 24 Sep 01 06:48:58 PM UTC 24 152582844 ps
T12 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_dai_errs.1277499536 Sep 01 06:48:44 PM UTC 24 Sep 01 06:49:02 PM UTC 24 252274051 ps
T13 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_smoke.1065214613 Sep 01 06:48:51 PM UTC 24 Sep 01 06:49:04 PM UTC 24 352221009 ps
T129 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_low_freq_read.1662892785 Sep 01 06:48:42 PM UTC 24 Sep 01 06:49:06 PM UTC 24 5924255319 ps
T36 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_parallel_lc_req.810127744 Sep 01 06:48:43 PM UTC 24 Sep 01 06:49:07 PM UTC 24 1461216684 ps
T94 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_parallel_lc_req.3542055283 Sep 01 06:48:53 PM UTC 24 Sep 01 06:49:10 PM UTC 24 5664151785 ps
T125 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_partition_walk.3643639428 Sep 01 06:48:42 PM UTC 24 Sep 01 06:49:11 PM UTC 24 709782484 ps
T97 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_regwen.1632882064 Sep 01 06:49:07 PM UTC 24 Sep 01 06:49:12 PM UTC 24 240573046 ps
T102 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_parallel_lc_esc.3276469751 Sep 01 06:48:55 PM UTC 24 Sep 01 06:49:13 PM UTC 24 744552962 ps
T92 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_parallel_key_req.4050625664 Sep 01 06:49:05 PM UTC 24 Sep 01 06:49:18 PM UTC 24 3263746120 ps
T17 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_alert_test.678013296 Sep 01 06:49:14 PM UTC 24 Sep 01 06:49:18 PM UTC 24 589788614 ps
T126 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_macro_errs.3811963094 Sep 01 06:49:04 PM UTC 24 Sep 01 06:49:22 PM UTC 24 2106351508 ps
T93 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_check_fail.755474175 Sep 01 06:48:59 PM UTC 24 Sep 01 06:49:25 PM UTC 24 2346670030 ps
T99 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_dai_lock.3139692240 Sep 01 06:48:44 PM UTC 24 Sep 01 06:49:25 PM UTC 24 2768349023 ps
T85 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_init_fail.3960032547 Sep 01 06:49:20 PM UTC 24 Sep 01 06:49:27 PM UTC 24 2263862057 ps
T115 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_smoke.3796185218 Sep 01 06:49:20 PM UTC 24 Sep 01 06:49:30 PM UTC 24 740717967 ps
T7 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_dai_errs.625247516 Sep 01 06:48:57 PM UTC 24 Sep 01 06:49:32 PM UTC 24 7063651322 ps
T116 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_parallel_lc_esc.4042198619 Sep 01 06:49:25 PM UTC 24 Sep 01 06:49:32 PM UTC 24 252837290 ps
T18 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_test_access.2519795807 Sep 01 06:49:08 PM UTC 24 Sep 01 06:49:43 PM UTC 24 1092043341 ps
T117 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_regwen.2762492137 Sep 01 06:49:33 PM UTC 24 Sep 01 06:49:43 PM UTC 24 316960359 ps
T96 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_dai_lock.1872386061 Sep 01 06:49:27 PM UTC 24 Sep 01 06:49:45 PM UTC 24 1346420598 ps
T100 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_check_fail.516948704 Sep 01 06:48:44 PM UTC 24 Sep 01 06:49:51 PM UTC 24 9128368680 ps
T104 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_check_fail.3095123908 Sep 01 06:49:28 PM UTC 24 Sep 01 06:49:52 PM UTC 24 806160745 ps
T118 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_dai_lock.2451603630 Sep 01 06:48:56 PM UTC 24 Sep 01 06:49:56 PM UTC 24 1861629828 ps
T19 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_test_access.1523279123 Sep 01 06:49:42 PM UTC 24 Sep 01 06:49:57 PM UTC 24 990375094 ps
T8 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_dai_errs.2403234878 Sep 01 06:49:27 PM UTC 24 Sep 01 06:49:58 PM UTC 24 885741150 ps
T20 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_test_access.3817135388 Sep 01 06:48:45 PM UTC 24 Sep 01 06:49:58 PM UTC 24 6694962407 ps
T240 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_alert_test.533317014 Sep 01 06:49:53 PM UTC 24 Sep 01 06:49:58 PM UTC 24 937236194 ps
T147 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_macro_errs.2473307175 Sep 01 06:48:44 PM UTC 24 Sep 01 06:50:03 PM UTC 24 18847852913 ps
T103 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_init_fail.3615360841 Sep 01 06:49:58 PM UTC 24 Sep 01 06:50:05 PM UTC 24 269994836 ps
T119 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_parallel_key_req.3282989581 Sep 01 06:49:33 PM UTC 24 Sep 01 06:50:05 PM UTC 24 4908238348 ps
T9 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_stress_all.2048959816 Sep 01 06:49:12 PM UTC 24 Sep 01 06:50:07 PM UTC 24 6740996976 ps
T101 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_background_chks.2781350828 Sep 01 06:49:58 PM UTC 24 Sep 01 06:50:07 PM UTC 24 500096635 ps
T120 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_background_chks.2205138010 Sep 01 06:49:25 PM UTC 24 Sep 01 06:50:08 PM UTC 24 5004885218 ps
T127 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_background_chks.3682616595 Sep 01 06:48:53 PM UTC 24 Sep 01 06:50:08 PM UTC 24 11347158040 ps
T121 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_background_chks.568793475 Sep 01 06:48:43 PM UTC 24 Sep 01 06:50:08 PM UTC 24 27813045500 ps
T210 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_smoke.3851523284 Sep 01 06:49:53 PM UTC 24 Sep 01 06:50:12 PM UTC 24 5268929705 ps
T211 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_regwen.3514069912 Sep 01 06:50:09 PM UTC 24 Sep 01 06:50:15 PM UTC 24 188064640 ps
T444 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_alert_test.744511732 Sep 01 06:50:11 PM UTC 24 Sep 01 06:50:16 PM UTC 24 769321984 ps
T218 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_parallel_lc_req.871767957 Sep 01 06:50:00 PM UTC 24 Sep 01 06:50:17 PM UTC 24 1054108193 ps
T128 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_check_fail.3215290306 Sep 01 06:50:05 PM UTC 24 Sep 01 06:50:19 PM UTC 24 421304193 ps
T219 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_parallel_key_req.4133319789 Sep 01 06:50:07 PM UTC 24 Sep 01 06:50:20 PM UTC 24 219484791 ps
T169 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_macro_errs.1984221624 Sep 01 06:49:31 PM UTC 24 Sep 01 06:50:21 PM UTC 24 6766765742 ps
T109 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_init_fail.3896711180 Sep 01 06:50:16 PM UTC 24 Sep 01 06:50:21 PM UTC 24 215051364 ps
T146 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_test_access.2673280295 Sep 01 06:50:09 PM UTC 24 Sep 01 06:50:22 PM UTC 24 479588640 ps
T192 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_parallel_lc_esc.3745584481 Sep 01 06:50:00 PM UTC 24 Sep 01 06:50:22 PM UTC 24 844190733 ps
T144 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_parallel_lc_req.202320477 Sep 01 06:49:25 PM UTC 24 Sep 01 06:50:23 PM UTC 24 10975530726 ps
T193 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_smoke.1194304616 Sep 01 06:50:13 PM UTC 24 Sep 01 06:50:27 PM UTC 24 1366875509 ps
T165 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_parallel_lc_esc.19457358 Sep 01 06:50:18 PM UTC 24 Sep 01 06:50:27 PM UTC 24 1512357725 ps
T122 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_dai_lock.3531542927 Sep 01 06:50:00 PM UTC 24 Sep 01 06:50:28 PM UTC 24 10014354265 ps
T170 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_macro_errs.2676861700 Sep 01 06:50:22 PM UTC 24 Sep 01 06:50:29 PM UTC 24 243239117 ps
T194 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_dai_lock.2807684503 Sep 01 06:50:20 PM UTC 24 Sep 01 06:50:32 PM UTC 24 782153637 ps
T141 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_background_chks.677063616 Sep 01 06:50:16 PM UTC 24 Sep 01 06:50:33 PM UTC 24 788414075 ps
T445 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_alert_test.1039159854 Sep 01 06:50:30 PM UTC 24 Sep 01 06:50:34 PM UTC 24 208051185 ps
T171 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_dai_errs.203010063 Sep 01 06:50:02 PM UTC 24 Sep 01 06:50:35 PM UTC 24 2934070862 ps
T271 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_parallel_key_req.2839016222 Sep 01 06:50:23 PM UTC 24 Sep 01 06:50:39 PM UTC 24 225512163 ps
T276 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_regwen.709205157 Sep 01 06:50:23 PM UTC 24 Sep 01 06:50:39 PM UTC 24 537975322 ps
T123 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_parallel_lc_req.2937559231 Sep 01 06:50:17 PM UTC 24 Sep 01 06:50:41 PM UTC 24 3204903883 ps
T172 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_macro_errs.808615239 Sep 01 06:50:06 PM UTC 24 Sep 01 06:50:42 PM UTC 24 3429477435 ps
T41 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_init_fail.408206148 Sep 01 06:50:34 PM UTC 24 Sep 01 06:50:43 PM UTC 24 287653181 ps
T266 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_parallel_lc_esc.3919354516 Sep 01 06:50:39 PM UTC 24 Sep 01 06:50:47 PM UTC 24 543059080 ps
T344 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_smoke.251602162 Sep 01 06:50:32 PM UTC 24 Sep 01 06:50:48 PM UTC 24 1301931205 ps
T352 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_dai_errs.2485973952 Sep 01 06:50:22 PM UTC 24 Sep 01 06:50:48 PM UTC 24 1761090829 ps
T134 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_dai_lock.1052283973 Sep 01 06:50:41 PM UTC 24 Sep 01 06:50:51 PM UTC 24 442833659 ps
T106 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_check_fail.1249035521 Sep 01 06:50:22 PM UTC 24 Sep 01 06:50:52 PM UTC 24 1590132379 ps
T135 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_test_access.3167706037 Sep 01 06:50:25 PM UTC 24 Sep 01 06:50:52 PM UTC 24 1134383205 ps
T280 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_parallel_key_req.553000802 Sep 01 06:50:44 PM UTC 24 Sep 01 06:50:55 PM UTC 24 165186368 ps
T292 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_alert_test.2046231705 Sep 01 06:50:53 PM UTC 24 Sep 01 06:50:57 PM UTC 24 219473011 ps
T249 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_regwen.4164118475 Sep 01 06:50:48 PM UTC 24 Sep 01 06:50:58 PM UTC 24 1898501485 ps
T124 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_background_chks.1965365438 Sep 01 06:50:36 PM UTC 24 Sep 01 06:50:58 PM UTC 24 8620436157 ps
T277 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_parallel_lc_req.2147387086 Sep 01 06:50:36 PM UTC 24 Sep 01 06:50:59 PM UTC 24 4473611623 ps
T345 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_smoke.2954663392 Sep 01 06:50:53 PM UTC 24 Sep 01 06:50:59 PM UTC 24 269095301 ps
T131 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_init_fail.626965759 Sep 01 06:50:53 PM UTC 24 Sep 01 06:51:00 PM UTC 24 104409955 ps
T212 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_test_access.3057587483 Sep 01 06:50:49 PM UTC 24 Sep 01 06:51:04 PM UTC 24 7490142423 ps
T133 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_check_fail.3379125409 Sep 01 06:50:42 PM UTC 24 Sep 01 06:51:04 PM UTC 24 1095909852 ps
T213 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_parallel_lc_req.2210429847 Sep 01 06:50:59 PM UTC 24 Sep 01 06:51:10 PM UTC 24 800799478 ps
T214 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_regwen.2401150327 Sep 01 06:51:05 PM UTC 24 Sep 01 06:51:13 PM UTC 24 2521468932 ps
T88 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_check_fail.2712067748 Sep 01 06:51:00 PM UTC 24 Sep 01 06:51:14 PM UTC 24 853049889 ps
T215 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_parallel_lc_esc.3269739687 Sep 01 06:50:59 PM UTC 24 Sep 01 06:51:16 PM UTC 24 1403070660 ps
T216 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_alert_test.3291479704 Sep 01 06:51:16 PM UTC 24 Sep 01 06:51:20 PM UTC 24 929749543 ps
T185 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_macro_errs.4058737133 Sep 01 06:51:01 PM UTC 24 Sep 01 06:51:21 PM UTC 24 854771481 ps
T14 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_stress_all_with_rand_reset.4285515925 Sep 01 06:49:12 PM UTC 24 Sep 01 06:51:25 PM UTC 24 4161693616 ps
T15 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_stress_all_with_rand_reset.559852590 Sep 01 06:50:09 PM UTC 24 Sep 01 06:51:25 PM UTC 24 25882912321 ps
T132 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_init_fail.430012459 Sep 01 06:51:20 PM UTC 24 Sep 01 06:51:26 PM UTC 24 385013553 ps
T294 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_background_chks.128325111 Sep 01 06:50:56 PM UTC 24 Sep 01 06:51:34 PM UTC 24 6231600341 ps
T295 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_parallel_lc_req.3613676915 Sep 01 06:51:22 PM UTC 24 Sep 01 06:51:35 PM UTC 24 636391516 ps
T246 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_smoke.1225757686 Sep 01 06:51:17 PM UTC 24 Sep 01 06:51:36 PM UTC 24 4111614476 ps
T296 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_parallel_lc_esc.1454702429 Sep 01 06:51:27 PM UTC 24 Sep 01 06:51:38 PM UTC 24 153972056 ps
T297 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_parallel_key_req.2591737267 Sep 01 06:51:01 PM UTC 24 Sep 01 06:51:39 PM UTC 24 8908808796 ps
T241 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_dai_errs.1963242915 Sep 01 06:50:41 PM UTC 24 Sep 01 06:51:39 PM UTC 24 1646369833 ps
T298 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_dai_lock.3213019339 Sep 01 06:50:59 PM UTC 24 Sep 01 06:51:42 PM UTC 24 2019941063 ps
T223 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_dai_errs.2406238178 Sep 01 06:51:00 PM UTC 24 Sep 01 06:51:42 PM UTC 24 1818859735 ps
T224 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_macro_errs.775875248 Sep 01 06:50:43 PM UTC 24 Sep 01 06:51:44 PM UTC 24 3327803738 ps
T397 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_background_chks.2291539990 Sep 01 06:51:21 PM UTC 24 Sep 01 06:51:45 PM UTC 24 2179823942 ps
T446 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_alert_test.4232278617 Sep 01 06:51:42 PM UTC 24 Sep 01 06:51:46 PM UTC 24 62031953 ps
T175 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_init_fail.1122913322 Sep 01 06:51:44 PM UTC 24 Sep 01 06:51:49 PM UTC 24 1595525664 ps
T60 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_check_fail.2961068382 Sep 01 06:51:36 PM UTC 24 Sep 01 06:51:52 PM UTC 24 476175272 ps
T166 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_stress_all.91814441 Sep 01 06:50:28 PM UTC 24 Sep 01 06:51:52 PM UTC 24 23589017133 ps
T343 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_regwen.4274605354 Sep 01 06:51:38 PM UTC 24 Sep 01 06:51:53 PM UTC 24 552987427 ps
T238 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_test_access.2185731632 Sep 01 06:51:38 PM UTC 24 Sep 01 06:51:54 PM UTC 24 907621536 ps
T447 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_parallel_lc_req.2864727560 Sep 01 06:51:46 PM UTC 24 Sep 01 06:51:57 PM UTC 24 1699743590 ps
T350 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_dai_errs.126408064 Sep 01 06:51:27 PM UTC 24 Sep 01 06:51:57 PM UTC 24 360050430 ps
T448 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_dai_lock.1617290962 Sep 01 06:51:50 PM UTC 24 Sep 01 06:51:57 PM UTC 24 307842714 ps
T239 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_test_access.2569287711 Sep 01 06:51:06 PM UTC 24 Sep 01 06:51:57 PM UTC 24 4139464909 ps
T299 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_check_fail.2972355441 Sep 01 06:51:54 PM UTC 24 Sep 01 06:51:59 PM UTC 24 289200903 ps
T142 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_background_chks.565321786 Sep 01 06:51:46 PM UTC 24 Sep 01 06:51:59 PM UTC 24 420215674 ps
T275 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_parallel_lc_esc.380201137 Sep 01 06:51:47 PM UTC 24 Sep 01 06:52:01 PM UTC 24 583334105 ps
T279 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_smoke.1506083965 Sep 01 06:51:44 PM UTC 24 Sep 01 06:52:02 PM UTC 24 394343198 ps
T300 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_alert_test.1168032925 Sep 01 06:52:01 PM UTC 24 Sep 01 06:52:05 PM UTC 24 165847635 ps
T236 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_macro_errs.3672931313 Sep 01 06:51:55 PM UTC 24 Sep 01 06:52:06 PM UTC 24 284693141 ps
T237 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_macro_errs.3253888290 Sep 01 06:51:36 PM UTC 24 Sep 01 06:52:06 PM UTC 24 3373235418 ps
T184 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_init_fail.2281132806 Sep 01 06:52:01 PM UTC 24 Sep 01 06:52:08 PM UTC 24 129982410 ps
T247 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_parallel_key_req.798659553 Sep 01 06:51:38 PM UTC 24 Sep 01 06:52:11 PM UTC 24 4395758027 ps
T372 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_regwen.3925439154 Sep 01 06:51:58 PM UTC 24 Sep 01 06:52:12 PM UTC 24 647125277 ps
T449 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_dai_lock.983593920 Sep 01 06:52:59 PM UTC 24 Sep 01 06:53:10 PM UTC 24 817870884 ps
T450 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_smoke.592378727 Sep 01 06:52:01 PM UTC 24 Sep 01 06:52:13 PM UTC 24 504916498 ps
T16 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_stress_all_with_rand_reset.1909510983 Sep 01 06:48:45 PM UTC 24 Sep 01 06:52:13 PM UTC 24 18354112459 ps
T451 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_check_fail.1117478578 Sep 01 06:52:09 PM UTC 24 Sep 01 06:52:18 PM UTC 24 2886227832 ps
T384 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_parallel_lc_esc.4198789520 Sep 01 06:52:07 PM UTC 24 Sep 01 06:52:19 PM UTC 24 3935629635 ps
T452 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_macro_errs.1498643457 Sep 01 06:52:13 PM UTC 24 Sep 01 06:52:20 PM UTC 24 177067655 ps
T248 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_dai_lock.1254709794 Sep 01 06:51:27 PM UTC 24 Sep 01 06:52:21 PM UTC 24 16417734125 ps
T143 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_stress_all.2647797528 Sep 01 06:49:45 PM UTC 24 Sep 01 06:53:11 PM UTC 24 18597115590 ps
T391 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_dai_lock.3303128602 Sep 01 06:52:07 PM UTC 24 Sep 01 06:52:22 PM UTC 24 341668265 ps
T376 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_regwen.3369569692 Sep 01 06:52:15 PM UTC 24 Sep 01 06:52:23 PM UTC 24 164453526 ps
T453 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_alert_test.2458932780 Sep 01 06:52:19 PM UTC 24 Sep 01 06:52:24 PM UTC 24 691638472 ps
T110 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_init_fail.308352007 Sep 01 06:52:21 PM UTC 24 Sep 01 06:52:27 PM UTC 24 1809457611 ps
T195 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_smoke.828178440 Sep 01 06:52:21 PM UTC 24 Sep 01 06:52:32 PM UTC 24 278287499 ps
T196 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_parallel_lc_req.906938170 Sep 01 06:52:03 PM UTC 24 Sep 01 06:52:35 PM UTC 24 1500201003 ps
T197 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_parallel_lc_esc.4066913448 Sep 01 06:52:27 PM UTC 24 Sep 01 06:52:35 PM UTC 24 141198625 ps
T198 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_dai_errs.1980972069 Sep 01 06:52:08 PM UTC 24 Sep 01 06:52:37 PM UTC 24 806799992 ps
T199 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_parallel_key_req.1248420949 Sep 01 06:51:55 PM UTC 24 Sep 01 06:52:39 PM UTC 24 1524763591 ps
T200 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_regwen.2275697588 Sep 01 06:52:28 PM UTC 24 Sep 01 06:52:39 PM UTC 24 899133509 ps
T201 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_alert_test.290234001 Sep 01 06:52:37 PM UTC 24 Sep 01 06:52:41 PM UTC 24 343629506 ps
T202 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_smoke.3649864958 Sep 01 06:52:37 PM UTC 24 Sep 01 06:52:43 PM UTC 24 243758504 ps
T176 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_init_fail.4279136149 Sep 01 06:52:39 PM UTC 24 Sep 01 06:52:48 PM UTC 24 1431721849 ps
T356 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_dai_errs.1811053296 Sep 01 06:51:54 PM UTC 24 Sep 01 06:52:48 PM UTC 24 5290742965 ps
T406 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_parallel_key_req.378728100 Sep 01 06:52:13 PM UTC 24 Sep 01 06:52:49 PM UTC 24 3597216844 ps
T217 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_test_access.3519754144 Sep 01 06:52:01 PM UTC 24 Sep 01 06:52:49 PM UTC 24 17271801330 ps
T348 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_parallel_lc_esc.3860741747 Sep 01 06:52:40 PM UTC 24 Sep 01 06:52:49 PM UTC 24 294073344 ps
T396 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_parallel_lc_req.3537892498 Sep 01 06:52:22 PM UTC 24 Sep 01 06:52:49 PM UTC 24 2638261751 ps
T398 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_test_access.3428835256 Sep 01 06:52:15 PM UTC 24 Sep 01 06:52:51 PM UTC 24 2091475429 ps
T454 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_dai_lock.1230137543 Sep 01 06:52:41 PM UTC 24 Sep 01 06:52:54 PM UTC 24 3565534379 ps
T37 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_check_fail.2077060846 Sep 01 06:52:27 PM UTC 24 Sep 01 06:52:54 PM UTC 24 3239810300 ps
T455 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_alert_test.3313843198 Sep 01 06:52:53 PM UTC 24 Sep 01 06:52:57 PM UTC 24 131029985 ps
T417 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_parallel_lc_req.2032920147 Sep 01 06:52:40 PM UTC 24 Sep 01 06:52:59 PM UTC 24 805906655 ps
T373 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_regwen.1920826457 Sep 01 06:52:51 PM UTC 24 Sep 01 06:53:00 PM UTC 24 187946337 ps
T278 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_background_chks.2912728200 Sep 01 06:52:02 PM UTC 24 Sep 01 06:53:01 PM UTC 24 16048008186 ps
T177 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_init_fail.1122392641 Sep 01 06:52:55 PM UTC 24 Sep 01 06:53:02 PM UTC 24 153155082 ps
T388 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_test_access.954089135 Sep 01 06:52:33 PM UTC 24 Sep 01 06:53:08 PM UTC 24 1680802209 ps
T456 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_check_fail.3857019102 Sep 01 06:53:01 PM UTC 24 Sep 01 06:53:08 PM UTC 24 176764806 ps
T392 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_dai_lock.1615037448 Sep 01 06:52:27 PM UTC 24 Sep 01 06:53:08 PM UTC 24 3095035163 ps
T431 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_parallel_lc_req.3261795629 Sep 01 06:52:57 PM UTC 24 Sep 01 06:53:09 PM UTC 24 277566656 ps
T457 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_dai_errs.2059264412 Sep 01 06:52:27 PM UTC 24 Sep 01 06:53:09 PM UTC 24 1653275545 ps
T458 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_parallel_key_req.4227614099 Sep 01 06:53:03 PM UTC 24 Sep 01 06:53:09 PM UTC 24 342023220 ps
T272 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_parallel_key_req.4020439546 Sep 01 06:52:51 PM UTC 24 Sep 01 06:53:09 PM UTC 24 953960692 ps
T186 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_macro_errs.934589004 Sep 01 06:53:03 PM UTC 24 Sep 01 06:53:12 PM UTC 24 221167477 ps
T429 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_parallel_key_req.3058240680 Sep 01 06:52:27 PM UTC 24 Sep 01 06:53:12 PM UTC 24 1306502210 ps
T225 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_macro_errs.2924006118 Sep 01 06:52:27 PM UTC 24 Sep 01 06:53:12 PM UTC 24 1746259151 ps
T459 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_smoke.2439895815 Sep 01 06:52:55 PM UTC 24 Sep 01 06:53:14 PM UTC 24 505831896 ps
T244 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_dai_errs.1133829006 Sep 01 06:52:44 PM UTC 24 Sep 01 06:53:14 PM UTC 24 8881348269 ps
T460 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_alert_test.4079007480 Sep 01 06:53:11 PM UTC 24 Sep 01 06:53:15 PM UTC 24 332523557 ps
T461 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_dai_errs.552031130 Sep 01 06:53:00 PM UTC 24 Sep 01 06:53:17 PM UTC 24 743517139 ps
T462 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_regwen.2499987837 Sep 01 06:53:07 PM UTC 24 Sep 01 06:53:17 PM UTC 24 294012856 ps
T24 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_stress_all_with_rand_reset.2651564880 Sep 01 06:50:49 PM UTC 24 Sep 01 06:53:17 PM UTC 24 7786644708 ps
T178 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_init_fail.3684222815 Sep 01 06:53:11 PM UTC 24 Sep 01 06:53:18 PM UTC 24 553816082 ps
T463 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_smoke.4015664315 Sep 01 06:53:11 PM UTC 24 Sep 01 06:53:19 PM UTC 24 1395641583 ps
T27 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_sec_cm.3775669234 Sep 01 06:49:13 PM UTC 24 Sep 01 06:53:21 PM UTC 24 165745457163 ps
T252 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_macro_errs.2498216456 Sep 01 06:52:51 PM UTC 24 Sep 01 06:53:21 PM UTC 24 1885391970 ps
T253 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_smoke.3460114041 Sep 01 06:54:12 PM UTC 24 Sep 01 06:54:26 PM UTC 24 924849500 ps
T254 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_parallel_lc_esc.928395730 Sep 01 06:52:57 PM UTC 24 Sep 01 06:53:22 PM UTC 24 770506425 ps
T255 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_alert_test.39086678 Sep 01 06:53:19 PM UTC 24 Sep 01 06:53:22 PM UTC 24 92929346 ps
T256 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_parallel_lc_esc.2188359173 Sep 01 06:53:12 PM UTC 24 Sep 01 06:53:24 PM UTC 24 527768672 ps
T257 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_parallel_lc_req.948646108 Sep 01 06:53:12 PM UTC 24 Sep 01 06:53:24 PM UTC 24 347224571 ps
T258 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_regwen.595682954 Sep 01 06:53:18 PM UTC 24 Sep 01 06:53:25 PM UTC 24 121338850 ps
T28 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_sec_cm.476665677 Sep 01 06:49:46 PM UTC 24 Sep 01 06:53:27 PM UTC 24 41825200378 ps
T259 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_parallel_key_req.836914582 Sep 01 06:54:03 PM UTC 24 Sep 01 06:54:26 PM UTC 24 776231746 ps
T47 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_init_fail.1389060552 Sep 01 06:53:20 PM UTC 24 Sep 01 06:53:27 PM UTC 24 133689389 ps
T464 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_dai_lock.2442969809 Sep 01 06:53:18 PM UTC 24 Sep 01 06:53:29 PM UTC 24 409716583 ps
T353 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_dai_errs.4132107856 Sep 01 06:53:18 PM UTC 24 Sep 01 06:53:29 PM UTC 24 274878905 ps
T389 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_stress_all.3964011190 Sep 01 06:51:40 PM UTC 24 Sep 01 06:53:30 PM UTC 24 9852303228 ps
T400 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_check_fail.1754892450 Sep 01 06:53:18 PM UTC 24 Sep 01 06:53:31 PM UTC 24 572170723 ps
T341 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_stress_all.1390103962 Sep 01 06:53:11 PM UTC 24 Sep 01 06:53:33 PM UTC 24 7016381201 ps
T465 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_smoke.3982389657 Sep 01 06:53:19 PM UTC 24 Sep 01 06:53:34 PM UTC 24 3447255177 ps
T466 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_alert_test.3480111811 Sep 01 06:53:30 PM UTC 24 Sep 01 06:53:34 PM UTC 24 97487891 ps
T408 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_parallel_key_req.2799454725 Sep 01 06:53:18 PM UTC 24 Sep 01 06:53:34 PM UTC 24 404097130 ps
T467 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_test_access.204076925 Sep 01 06:53:09 PM UTC 24 Sep 01 06:53:35 PM UTC 24 8366864225 ps
T468 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_dai_lock.1468230692 Sep 01 06:53:23 PM UTC 24 Sep 01 06:53:35 PM UTC 24 2345686657 ps
T268 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_parallel_lc_req.4243004541 Sep 01 06:53:20 PM UTC 24 Sep 01 06:53:36 PM UTC 24 966512889 ps
T469 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_check_fail.156348889 Sep 01 06:53:23 PM UTC 24 Sep 01 06:53:37 PM UTC 24 784778728 ps
T359 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_macro_errs.1108587953 Sep 01 06:53:25 PM UTC 24 Sep 01 06:53:38 PM UTC 24 900852937 ps
T470 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_parallel_lc_esc.2196662639 Sep 01 06:53:33 PM UTC 24 Sep 01 06:53:40 PM UTC 24 88119900 ps
T401 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_test_access.1171848973 Sep 01 06:53:18 PM UTC 24 Sep 01 06:53:40 PM UTC 24 7335620989 ps
T471 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_regwen.1070288820 Sep 01 06:53:26 PM UTC 24 Sep 01 06:53:41 PM UTC 24 3816555015 ps
T179 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_init_fail.2470765694 Sep 01 06:53:33 PM UTC 24 Sep 01 06:53:41 PM UTC 24 240991642 ps
T390 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_test_access.3804310193 Sep 01 06:52:51 PM UTC 24 Sep 01 06:53:41 PM UTC 24 14854994843 ps
T472 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_smoke.2205944951 Sep 01 06:53:30 PM UTC 24 Sep 01 06:53:41 PM UTC 24 4319219842 ps
T50 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_check_fail.2813405801 Sep 01 06:52:51 PM UTC 24 Sep 01 06:53:45 PM UTC 24 5135645511 ps
T473 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_alert_test.2044455233 Sep 01 06:53:42 PM UTC 24 Sep 01 06:53:46 PM UTC 24 74075367 ps
T357 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_dai_errs.3876246805 Sep 01 06:53:23 PM UTC 24 Sep 01 06:53:47 PM UTC 24 651384207 ps
T33 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_init_fail.1169820223 Sep 01 06:53:42 PM UTC 24 Sep 01 06:53:47 PM UTC 24 2400048249 ps
T349 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_parallel_lc_esc.25886595 Sep 01 06:53:23 PM UTC 24 Sep 01 06:53:49 PM UTC 24 1572767790 ps
T474 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_parallel_lc_req.1496461276 Sep 01 06:53:33 PM UTC 24 Sep 01 06:53:51 PM UTC 24 427879654 ps
T402 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_parallel_key_req.657906266 Sep 01 06:53:26 PM UTC 24 Sep 01 06:53:51 PM UTC 24 872863081 ps
T475 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_regwen.2774985613 Sep 01 06:53:38 PM UTC 24 Sep 01 06:53:53 PM UTC 24 1169389078 ps
T78 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_check_fail.3392270840 Sep 01 06:53:36 PM UTC 24 Sep 01 06:53:54 PM UTC 24 691740363 ps
T264 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_stress_all.1700131906 Sep 01 06:52:37 PM UTC 24 Sep 01 06:53:56 PM UTC 24 20010399190 ps
T476 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_dai_errs.1504532494 Sep 01 06:53:47 PM UTC 24 Sep 01 06:53:56 PM UTC 24 657130994 ps
T477 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_macro_errs.1195737571 Sep 01 06:53:36 PM UTC 24 Sep 01 06:53:57 PM UTC 24 964640998 ps
T478 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_test_access.1760060633 Sep 01 06:53:38 PM UTC 24 Sep 01 06:53:57 PM UTC 24 457971462 ps
T351 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_dai_errs.3372397316 Sep 01 06:53:35 PM UTC 24 Sep 01 06:53:57 PM UTC 24 512332849 ps
T137 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_parallel_lc_esc.3235497740 Sep 01 06:53:44 PM UTC 24 Sep 01 06:53:57 PM UTC 24 383789853 ps
T29 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_sec_cm.1604132104 Sep 01 06:50:30 PM UTC 24 Sep 01 06:53:58 PM UTC 24 155056544977 ps
T479 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_regwen.1075971370 Sep 01 06:53:53 PM UTC 24 Sep 01 06:53:58 PM UTC 24 486420401 ps
T480 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_smoke.2222553096 Sep 01 06:53:42 PM UTC 24 Sep 01 06:54:00 PM UTC 24 860783003 ps
T90 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_stress_all_with_rand_reset.2912125316 Sep 01 06:49:45 PM UTC 24 Sep 01 06:54:01 PM UTC 24 33889064371 ps
T419 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_parallel_key_req.3330010914 Sep 01 06:53:36 PM UTC 24 Sep 01 06:54:01 PM UTC 24 1373623550 ps
T481 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_alert_test.4287924994 Sep 01 06:54:00 PM UTC 24 Sep 01 06:54:04 PM UTC 24 180192839 ps
T190 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_init_fail.2356716076 Sep 01 06:54:00 PM UTC 24 Sep 01 06:54:08 PM UTC 24 259363606 ps
T482 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_smoke.1682279811 Sep 01 06:54:00 PM UTC 24 Sep 01 06:54:10 PM UTC 24 763895178 ps
T440 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_parallel_lc_esc.3921915312 Sep 01 06:54:01 PM UTC 24 Sep 01 06:54:11 PM UTC 24 241830483 ps
T378 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_regwen.2646414170 Sep 01 06:54:03 PM UTC 24 Sep 01 06:54:11 PM UTC 24 455547925 ps
T483 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_parallel_lc_req.2636021689 Sep 01 06:54:00 PM UTC 24 Sep 01 06:54:15 PM UTC 24 829112652 ps
T98 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_stress_all_with_rand_reset.1243109307 Sep 01 06:52:15 PM UTC 24 Sep 01 06:54:15 PM UTC 24 17416047088 ps
T484 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_macro_errs.108723553 Sep 01 06:54:03 PM UTC 24 Sep 01 06:54:16 PM UTC 24 325133804 ps
T485 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_alert_test.604697205 Sep 01 06:54:11 PM UTC 24 Sep 01 06:54:17 PM UTC 24 785637971 ps
T130 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_check_fail.3539540426 Sep 01 06:53:48 PM UTC 24 Sep 01 06:54:17 PM UTC 24 2816930711 ps
T486 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_macro_errs.1630091456 Sep 01 06:53:48 PM UTC 24 Sep 01 06:54:19 PM UTC 24 1861785313 ps
T203 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_init_fail.2826709241 Sep 01 06:54:13 PM UTC 24 Sep 01 06:54:19 PM UTC 24 92503885 ps
T399 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_stress_all.941378512 Sep 01 06:50:51 PM UTC 24 Sep 01 06:54:19 PM UTC 24 46648566708 ps
T167 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_macro_errs.259640588 Sep 01 06:53:18 PM UTC 24 Sep 01 06:54:20 PM UTC 24 24104754587 ps
T407 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_parallel_lc_req.1593336193 Sep 01 06:53:44 PM UTC 24 Sep 01 06:54:22 PM UTC 24 1683045625 ps
T79 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_check_fail.3198219020 Sep 01 06:54:01 PM UTC 24 Sep 01 06:54:22 PM UTC 24 7680078875 ps
T487 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_dai_lock.2389976597 Sep 01 06:53:47 PM UTC 24 Sep 01 06:54:23 PM UTC 24 12455871161 ps
T488 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_dai_lock.2121656458 Sep 01 06:54:01 PM UTC 24 Sep 01 06:54:24 PM UTC 24 732411721 ps
T386 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_dai_lock.1633090101 Sep 01 06:53:35 PM UTC 24 Sep 01 06:54:24 PM UTC 24 3884788386 ps
T250 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_sec_cm.4163829057 Sep 01 06:50:11 PM UTC 24 Sep 01 06:54:25 PM UTC 24 11075625555 ps
T489 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_alert_test.1098358333 Sep 01 06:54:25 PM UTC 24 Sep 01 06:54:29 PM UTC 24 738236722 ps
T265 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_parallel_lc_esc.2039018891 Sep 01 06:54:17 PM UTC 24 Sep 01 06:54:31 PM UTC 24 522910252 ps
T490 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_smoke.3293468044 Sep 01 06:54:25 PM UTC 24 Sep 01 06:54:32 PM UTC 24 183500924 ps
T387 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_parallel_key_req.181992097 Sep 01 06:53:51 PM UTC 24 Sep 01 06:54:32 PM UTC 24 2310035823 ps
T55 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_init_fail.320586661 Sep 01 06:54:27 PM UTC 24 Sep 01 06:54:34 PM UTC 24 420775358 ps
T111 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_stress_all.3664303684 Sep 01 06:52:16 PM UTC 24 Sep 01 06:54:34 PM UTC 24 15557707803 ps
T377 /workspaces/repo/scratch/os_regression_2024_08_31/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_regwen.3516420477 Sep 01 06:54:25 PM UTC 24 Sep 01 06:54:35 PM UTC 24 2454959284 ps
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