Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
94.93 93.69 96.60 95.68 91.57 97.47 96.34 93.14


Total tests in report: 1299
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
64.44 64.44 83.99 83.99 76.32 76.32 58.22 58.22 35.42 35.42 77.38 77.38 88.29 88.29 31.45 31.45 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_smoke.1784719370
71.68 7.25 88.34 4.34 84.37 8.04 66.36 8.14 45.78 10.36 86.23 8.85 89.98 1.69 40.74 9.29 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_test_access.2083189361
75.23 3.54 90.43 2.09 86.51 2.15 67.17 0.82 57.11 11.33 89.43 3.20 90.12 0.14 45.82 5.08 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_check_fail.1678700203
78.09 2.86 91.20 0.77 90.83 4.32 67.61 0.44 58.07 0.96 91.30 1.87 90.72 0.61 56.90 11.08 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_stress_all_with_rand_reset.847989051
79.81 1.72 91.26 0.07 91.46 0.62 72.08 4.47 58.80 0.72 91.54 0.24 90.93 0.20 62.62 5.72 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_parallel_key_req.4226690504
81.31 1.50 91.33 0.07 91.88 0.42 76.89 4.81 60.48 1.69 91.77 0.24 90.93 0.00 65.90 3.29 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_stress_all.3347629326
82.38 1.07 91.42 0.10 92.08 0.20 79.11 2.21 62.89 2.41 91.97 0.19 91.13 0.20 68.05 2.14 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_macro_errs.1859685157
83.28 0.90 91.42 0.00 92.16 0.07 81.67 2.56 63.37 0.48 92.06 0.10 91.13 0.00 71.12 3.07 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_stress_all.2329946092
84.17 0.89 91.62 0.20 92.36 0.20 81.78 0.11 68.19 4.82 92.44 0.38 91.40 0.27 71.41 0.29 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/57.otp_ctrl_init_fail.1467436495
85.02 0.85 91.87 0.25 93.13 0.77 84.18 2.40 69.40 1.20 92.83 0.38 91.40 0.00 72.34 0.93 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_dai_lock.2100654518
85.85 0.83 92.13 0.26 93.78 0.65 84.61 0.43 69.40 0.00 94.69 1.87 93.70 2.30 72.62 0.29 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_sec_cm.249809676
86.44 0.60 92.24 0.11 94.01 0.22 84.96 0.35 72.53 3.13 94.98 0.29 93.70 0.00 72.69 0.07 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_init_fail.3070503764
86.99 0.55 92.31 0.07 94.23 0.22 86.19 1.23 73.73 1.20 95.07 0.10 93.70 0.00 73.70 1.00 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_check_fail.1311592653
87.51 0.52 92.31 0.00 94.23 0.00 86.74 0.55 76.63 2.89 95.07 0.00 93.70 0.00 73.91 0.21 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_parallel_lc_esc.865801375
87.98 0.46 92.31 0.00 94.26 0.02 87.65 0.91 76.87 0.24 95.07 0.00 93.70 0.00 75.98 2.07 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_stress_all.986360090
88.39 0.41 92.32 0.02 94.58 0.32 88.84 1.19 76.87 0.00 95.22 0.14 93.77 0.07 77.13 1.14 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_background_chks.708895143
88.79 0.40 92.34 0.02 94.83 0.25 88.84 0.00 76.87 0.00 95.27 0.05 93.77 0.00 79.63 2.50 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_tl_intg_err.1162259049
89.13 0.34 92.44 0.10 94.83 0.00 89.11 0.27 78.31 1.45 95.36 0.10 93.91 0.14 79.99 0.36 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_macro_errs.4125664220
89.46 0.33 92.44 0.00 94.98 0.15 89.91 0.80 78.31 0.00 95.50 0.14 93.91 0.00 81.20 1.22 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_stress_all.3086152950
89.78 0.32 92.58 0.15 95.00 0.02 90.77 0.86 79.28 0.96 95.65 0.14 93.91 0.00 81.27 0.07 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_init_fail.3852623513
90.06 0.28 92.58 0.00 95.33 0.32 90.78 0.01 79.76 0.48 95.65 0.00 94.72 0.81 81.63 0.36 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/29.otp_ctrl_stress_all_with_rand_reset.3356912793
90.33 0.26 92.63 0.05 95.40 0.07 91.65 0.87 80.00 0.24 95.70 0.05 94.72 0.00 82.20 0.57 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_check_fail.1476015745
90.58 0.25 92.70 0.07 95.45 0.05 91.65 0.00 81.45 1.45 95.84 0.14 94.72 0.00 82.27 0.07 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/174.otp_ctrl_init_fail.147128396
90.80 0.21 92.70 0.00 95.45 0.00 92.07 0.42 81.45 0.00 95.84 0.00 94.72 0.00 83.35 1.07 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_stress_all.3949979522
90.99 0.19 92.70 0.00 95.50 0.05 92.07 0.00 81.45 0.00 95.84 0.00 94.72 0.00 84.63 1.29 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/38.otp_ctrl_stress_all_with_rand_reset.2152147326
91.17 0.18 92.70 0.00 95.58 0.07 92.78 0.70 81.45 0.00 95.98 0.14 94.72 0.00 84.99 0.36 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_parallel_lc_req.2548273605
91.33 0.16 92.70 0.00 95.60 0.02 92.78 0.00 81.45 0.00 95.98 0.00 95.80 1.08 84.99 0.00 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_rw.3331862959
91.48 0.16 92.75 0.05 95.63 0.02 93.19 0.41 81.93 0.48 96.03 0.05 95.80 0.00 85.06 0.07 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_init_fail.3049338761
91.63 0.15 92.75 0.00 95.90 0.27 93.31 0.12 81.93 0.00 96.03 0.00 95.80 0.00 85.70 0.64 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_alert_test.3057533689
91.78 0.15 92.75 0.00 95.93 0.02 93.59 0.29 81.93 0.00 96.03 0.00 95.80 0.00 86.42 0.71 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_parallel_key_req.3096873692
91.92 0.15 92.85 0.10 95.95 0.02 93.64 0.04 82.41 0.48 96.13 0.10 95.87 0.07 86.63 0.21 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_check_fail.1419613407
92.07 0.14 92.91 0.07 96.00 0.05 93.64 0.00 83.13 0.72 96.27 0.14 95.87 0.00 86.63 0.00 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/269.otp_ctrl_init_fail.3556306984
92.20 0.14 92.99 0.08 96.08 0.07 93.64 0.00 83.61 0.48 96.32 0.05 95.87 0.00 86.92 0.29 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_stress_all_with_rand_reset.441154997
92.33 0.13 93.04 0.05 96.10 0.02 93.64 0.00 84.34 0.72 96.37 0.05 95.87 0.00 86.99 0.07 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_init_fail.2700499081
92.47 0.13 93.09 0.05 96.13 0.02 93.64 0.00 85.06 0.72 96.41 0.05 95.87 0.00 87.06 0.07 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/47.otp_ctrl_init_fail.2245275542
92.58 0.12 93.14 0.05 96.15 0.02 93.79 0.15 85.54 0.48 96.46 0.05 95.87 0.00 87.13 0.07 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_init_fail.4186103825
92.70 0.12 93.14 0.00 96.15 0.00 94.07 0.28 85.78 0.24 96.46 0.00 95.87 0.00 87.42 0.29 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_stress_all.1610516637
92.81 0.11 93.19 0.05 96.18 0.02 94.07 0.00 86.27 0.48 96.56 0.10 95.94 0.07 87.49 0.07 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_init_fail.1941207346
92.91 0.10 93.24 0.05 96.18 0.00 94.23 0.16 86.51 0.24 96.60 0.05 96.01 0.07 87.63 0.14 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_macro_errs.1234243621
93.01 0.10 93.24 0.00 96.18 0.00 94.23 0.00 86.75 0.24 96.60 0.00 96.01 0.00 88.06 0.43 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/39.otp_ctrl_stress_all.2138250870
93.10 0.09 93.27 0.03 96.40 0.22 94.23 0.00 86.75 0.00 96.80 0.19 96.01 0.00 88.28 0.21 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_dai_errs.473929829
93.19 0.08 93.27 0.00 96.40 0.00 94.53 0.30 86.75 0.00 96.80 0.00 96.01 0.00 88.56 0.29 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_parallel_key_req.3947495362
93.27 0.08 93.27 0.00 96.40 0.00 94.53 0.00 86.75 0.00 96.80 0.00 96.01 0.00 89.14 0.57 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/31.otp_ctrl_stress_all_with_rand_reset.1901756971
93.35 0.08 93.30 0.03 96.40 0.00 94.53 0.00 87.23 0.48 96.84 0.05 96.01 0.00 89.14 0.00 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_init_fail.3621012435
93.43 0.08 93.30 0.00 96.40 0.00 94.57 0.05 87.23 0.00 96.84 0.00 96.01 0.00 89.64 0.50 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_regwen.644762627
93.50 0.07 93.30 0.00 96.40 0.00 94.57 0.00 87.71 0.48 96.84 0.00 96.01 0.00 89.64 0.00 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/107.otp_ctrl_parallel_lc_esc.3971907646
93.56 0.07 93.30 0.00 96.40 0.00 94.57 0.00 87.95 0.24 96.84 0.00 96.01 0.00 89.85 0.21 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_stress_all_with_rand_reset.1721073613
93.63 0.07 93.30 0.00 96.40 0.00 94.57 0.00 88.19 0.24 96.84 0.00 96.01 0.00 90.06 0.21 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/40.otp_ctrl_stress_all.3073741419
93.69 0.06 93.30 0.00 96.40 0.00 94.64 0.07 88.43 0.24 96.84 0.00 96.01 0.00 90.21 0.14 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_parallel_lc_esc.2674770728
93.75 0.06 93.35 0.05 96.40 0.00 94.72 0.08 88.67 0.24 96.89 0.05 96.01 0.00 90.21 0.00 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_macro_errs.220388475
93.81 0.06 93.35 0.00 96.40 0.00 94.73 0.01 88.92 0.24 96.89 0.00 96.01 0.00 90.35 0.14 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_stress_all.3667253389
93.86 0.05 93.38 0.03 96.40 0.00 94.78 0.05 89.16 0.24 96.94 0.05 96.01 0.00 90.35 0.00 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/227.otp_ctrl_init_fail.2789817825
93.91 0.05 93.38 0.00 96.40 0.00 94.78 0.01 89.16 0.00 96.94 0.00 96.01 0.00 90.71 0.36 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_parallel_key_req.3514332912
93.96 0.05 93.43 0.05 96.40 0.00 94.80 0.02 89.40 0.24 96.99 0.05 96.01 0.00 90.71 0.00 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/28.otp_ctrl_init_fail.1748287246
94.01 0.05 93.45 0.02 96.43 0.02 94.80 0.00 89.64 0.24 97.03 0.05 96.01 0.00 90.71 0.00 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/32.otp_ctrl_check_fail.2078014844
94.06 0.05 93.48 0.03 96.43 0.00 94.80 0.00 89.88 0.24 97.08 0.05 96.01 0.00 90.71 0.00 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/129.otp_ctrl_init_fail.2403067416
94.10 0.04 93.48 0.00 96.43 0.00 94.80 0.00 90.12 0.24 97.08 0.00 96.01 0.00 90.78 0.07 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/67.otp_ctrl_parallel_lc_esc.1170083881
94.14 0.04 93.48 0.00 96.43 0.00 94.80 0.00 90.36 0.24 97.08 0.00 96.07 0.07 90.78 0.00 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/52.otp_ctrl_stress_all_with_rand_reset.2879502055
94.18 0.04 93.48 0.00 96.43 0.00 95.07 0.27 90.36 0.00 97.08 0.00 96.07 0.00 90.78 0.00 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_parallel_lc_req.740431857
94.22 0.04 93.48 0.00 96.48 0.05 95.07 0.00 90.36 0.00 97.08 0.00 96.07 0.00 90.99 0.21 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_stress_all_with_rand_reset.969195096
94.26 0.04 93.55 0.07 96.50 0.02 95.07 0.00 90.36 0.00 97.18 0.10 96.07 0.00 91.07 0.07 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/35.otp_ctrl_check_fail.2894413183
94.29 0.04 93.55 0.00 96.50 0.00 95.09 0.01 90.60 0.24 97.18 0.00 96.07 0.00 91.07 0.00 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/250.otp_ctrl_init_fail.497149789
94.33 0.03 93.55 0.00 96.50 0.00 95.09 0.00 90.84 0.24 97.18 0.00 96.07 0.00 91.07 0.00 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/109.otp_ctrl_parallel_lc_esc.3654128292
94.36 0.03 93.55 0.00 96.50 0.00 95.09 0.00 91.08 0.24 97.18 0.00 96.07 0.00 91.07 0.00 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/125.otp_ctrl_init_fail.3487568145
94.40 0.03 93.55 0.00 96.50 0.00 95.09 0.00 91.33 0.24 97.18 0.00 96.07 0.00 91.07 0.00 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/160.otp_ctrl_parallel_lc_esc.3163434820
94.43 0.03 93.55 0.00 96.50 0.00 95.09 0.00 91.57 0.24 97.18 0.00 96.07 0.00 91.07 0.00 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/199.otp_ctrl_parallel_lc_esc.3898370429
94.46 0.03 93.56 0.02 96.53 0.02 95.09 0.00 91.57 0.00 97.23 0.05 96.07 0.00 91.21 0.14 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/22.otp_ctrl_check_fail.1556400911
94.50 0.03 93.56 0.00 96.53 0.00 95.09 0.00 91.57 0.00 97.23 0.00 96.07 0.00 91.42 0.21 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_tl_intg_err.2645580568
94.53 0.03 93.56 0.00 96.53 0.00 95.09 0.00 91.57 0.00 97.23 0.00 96.07 0.00 91.64 0.21 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/27.otp_ctrl_stress_all_with_rand_reset.3855986810
94.56 0.03 93.56 0.00 96.53 0.00 95.09 0.00 91.57 0.00 97.23 0.00 96.07 0.00 91.85 0.21 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/41.otp_ctrl_stress_all_with_rand_reset.2508363430
94.59 0.03 93.56 0.00 96.53 0.00 95.21 0.13 91.57 0.00 97.23 0.00 96.07 0.00 91.92 0.07 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_regwen.3360085405
94.61 0.03 93.56 0.00 96.53 0.00 95.25 0.03 91.57 0.00 97.23 0.00 96.07 0.00 92.07 0.14 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_dai_lock.882105630
94.63 0.02 93.56 0.00 96.55 0.02 95.25 0.00 91.57 0.00 97.23 0.00 96.07 0.00 92.21 0.14 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_tl_intg_err.690076129
94.66 0.02 93.58 0.02 96.58 0.02 95.25 0.01 91.57 0.00 97.27 0.05 96.07 0.00 92.28 0.07 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/24.otp_ctrl_check_fail.1854975213
94.68 0.02 93.58 0.00 96.58 0.00 95.26 0.01 91.57 0.00 97.27 0.00 96.07 0.00 92.42 0.14 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/24.otp_ctrl_regwen.2817357105
94.70 0.02 93.58 0.00 96.58 0.00 95.27 0.01 91.57 0.00 97.27 0.00 96.07 0.00 92.57 0.14 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_test_access.2570173531
94.72 0.02 93.58 0.00 96.58 0.00 95.27 0.01 91.57 0.00 97.27 0.00 96.07 0.00 92.71 0.14 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_parallel_lc_esc.3826973368
94.74 0.02 93.58 0.00 96.58 0.00 95.27 0.00 91.57 0.00 97.27 0.00 96.07 0.00 92.85 0.14 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/46.otp_ctrl_regwen.3907490079
94.76 0.02 93.58 0.00 96.58 0.00 95.27 0.00 91.57 0.00 97.27 0.00 96.14 0.07 92.92 0.07 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/299.otp_ctrl_init_fail.397616589
94.78 0.02 93.58 0.00 96.58 0.00 95.27 0.00 91.57 0.00 97.27 0.00 96.28 0.14 92.92 0.00 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_aliasing.3884020441
94.80 0.02 93.58 0.00 96.58 0.00 95.41 0.13 91.57 0.00 97.27 0.00 96.28 0.00 92.92 0.00 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_parallel_lc_req.1063737732
94.81 0.01 93.63 0.05 96.58 0.00 95.41 0.00 91.57 0.00 97.32 0.05 96.28 0.00 92.92 0.00 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/30.otp_ctrl_check_fail.3981204192
94.83 0.01 93.63 0.00 96.58 0.00 95.42 0.02 91.57 0.00 97.32 0.00 96.28 0.00 92.99 0.07 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_stress_all.2235775853
94.84 0.01 93.66 0.03 96.58 0.00 95.42 0.00 91.57 0.00 97.37 0.05 96.28 0.00 92.99 0.00 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_init_fail.50600014
94.85 0.01 93.69 0.03 96.58 0.00 95.42 0.00 91.57 0.00 97.42 0.05 96.28 0.00 92.99 0.00 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_init_fail.3831932439
94.86 0.01 93.69 0.00 96.58 0.00 95.42 0.00 91.57 0.00 97.42 0.00 96.28 0.00 93.07 0.07 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_tl_intg_err.1191773871
94.87 0.01 93.69 0.00 96.58 0.00 95.42 0.00 91.57 0.00 97.42 0.00 96.28 0.00 93.14 0.07 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/140.otp_ctrl_parallel_lc_esc.926648912
94.88 0.01 93.69 0.00 96.58 0.00 95.42 0.00 91.57 0.00 97.42 0.00 96.34 0.07 93.14 0.00 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_tl_errors.48392842
94.89 0.01 93.69 0.00 96.58 0.00 95.47 0.05 91.57 0.00 97.42 0.00 96.34 0.00 93.14 0.00 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_stress_all.595163871
94.89 0.01 93.69 0.00 96.58 0.00 95.47 0.00 91.57 0.00 97.47 0.05 96.34 0.00 93.14 0.00 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_wake_up.35516040
94.90 0.01 93.69 0.00 96.58 0.00 95.51 0.04 91.57 0.00 97.47 0.00 96.34 0.00 93.14 0.00 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/23.otp_ctrl_parallel_lc_req.2048974204
94.90 0.01 93.69 0.00 96.58 0.00 95.54 0.03 91.57 0.00 97.47 0.00 96.34 0.00 93.14 0.00 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_parallel_lc_req.836579856
94.91 0.01 93.69 0.00 96.58 0.00 95.57 0.03 91.57 0.00 97.47 0.00 96.34 0.00 93.14 0.00 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/256.otp_ctrl_init_fail.22384488
94.91 0.01 93.69 0.00 96.60 0.02 95.57 0.00 91.57 0.00 97.47 0.00 96.34 0.00 93.14 0.00 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/44.otp_ctrl_stress_all.3304734137
94.92 0.01 93.69 0.00 96.60 0.00 95.59 0.02 91.57 0.00 97.47 0.00 96.34 0.00 93.14 0.00 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_parallel_key_req.3615266711
94.92 0.01 93.69 0.00 96.60 0.00 95.62 0.02 91.57 0.00 97.47 0.00 96.34 0.00 93.14 0.00 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_regwen.1481301422
94.92 0.01 93.69 0.00 96.60 0.00 95.63 0.01 91.57 0.00 97.47 0.00 96.34 0.00 93.14 0.00 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/168.otp_ctrl_init_fail.2569136542
94.92 0.01 93.69 0.00 96.60 0.00 95.64 0.01 91.57 0.00 97.47 0.00 96.34 0.00 93.14 0.00 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/229.otp_ctrl_init_fail.2832686816
94.92 0.01 93.69 0.00 96.60 0.00 95.66 0.01 91.57 0.00 97.47 0.00 96.34 0.00 93.14 0.00 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/30.otp_ctrl_init_fail.2816390928
94.93 0.01 93.69 0.00 96.60 0.00 95.67 0.01 91.57 0.00 97.47 0.00 96.34 0.00 93.14 0.00 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/60.otp_ctrl_init_fail.3017484255
94.93 0.01 93.69 0.00 96.60 0.00 95.68 0.01 91.57 0.00 97.47 0.00 96.34 0.00 93.14 0.00 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_parallel_key_req.2275179954


Tests that do not contribute to grading

Name
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_aliasing.2439567249
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_bit_bash.666187286
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_hw_reset.1527065877
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_mem_rw_with_rand_reset.4283100893
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_intr_test.318459073
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_mem_partial_access.520855024
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_mem_walk.3667628972
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_same_csr_outstanding.2709549133
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_tl_errors.2236852016
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_tl_intg_err.3156501018
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_bit_bash.2949363956
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_hw_reset.375452012
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_mem_rw_with_rand_reset.596233784
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_rw.1422177404
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_intr_test.1513571547
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_mem_partial_access.3405504325
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_mem_walk.965699461
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_same_csr_outstanding.2859290955
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_tl_errors.2182215895
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_tl_intg_err.1336889231
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_csr_mem_rw_with_rand_reset.2909015121
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_csr_rw.3299521094
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_intr_test.1200457103
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_same_csr_outstanding.1800168702
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_tl_errors.3298736075
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_csr_mem_rw_with_rand_reset.3086374373
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_csr_rw.3709527756
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_intr_test.3189585339
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_same_csr_outstanding.2673798591
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_tl_errors.3136974607
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_tl_intg_err.1680427961
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_csr_mem_rw_with_rand_reset.3777797438
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_csr_rw.3672467974
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_intr_test.4159525495
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_same_csr_outstanding.1393637330
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_tl_errors.3285021017
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_tl_intg_err.2439759512
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_csr_mem_rw_with_rand_reset.981562827
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_csr_rw.181344217
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_intr_test.1103160450
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_same_csr_outstanding.3528375426
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_tl_errors.3530149644
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_tl_intg_err.38884894
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_csr_mem_rw_with_rand_reset.3251379472
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_csr_rw.3015719204
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_intr_test.889576986
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_same_csr_outstanding.3392219308
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_tl_errors.3780931751
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_csr_mem_rw_with_rand_reset.1488706921
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_csr_rw.1255100607
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_intr_test.2803412110
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_same_csr_outstanding.1773536741
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_tl_errors.1106971774
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_csr_mem_rw_with_rand_reset.3811972593
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_csr_rw.725086468
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_intr_test.916529685
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_same_csr_outstanding.1253041932
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_tl_errors.3741461361
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_tl_intg_err.4141306922
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_csr_mem_rw_with_rand_reset.3432639560
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_csr_rw.1838366984
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_intr_test.1336321882
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_same_csr_outstanding.4256464884
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_tl_errors.172434379
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_tl_intg_err.3446005185
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_csr_mem_rw_with_rand_reset.1562514957
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_csr_rw.1296331448
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_intr_test.3905124821
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_same_csr_outstanding.1706751483
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_tl_errors.2153608223
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_tl_intg_err.3933233952
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/19.otp_ctrl_csr_mem_rw_with_rand_reset.1863202484
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/19.otp_ctrl_csr_rw.798270406
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/19.otp_ctrl_intr_test.2798101645
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/19.otp_ctrl_same_csr_outstanding.1519813146
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/19.otp_ctrl_tl_errors.1547190927
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/19.otp_ctrl_tl_intg_err.1282128230
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_aliasing.3017951337
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_bit_bash.3731284430
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_hw_reset.2700013322
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_mem_rw_with_rand_reset.2561282160
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_rw.3154265634
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_intr_test.2968258725
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_mem_partial_access.1794925882
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_mem_walk.218527572
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_same_csr_outstanding.3490489381
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_tl_errors.3337830499
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_tl_intg_err.754599656
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/20.otp_ctrl_intr_test.2792373682
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/21.otp_ctrl_intr_test.1323547369
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/22.otp_ctrl_intr_test.1363629511
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/23.otp_ctrl_intr_test.830187251
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/24.otp_ctrl_intr_test.2663904940
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/25.otp_ctrl_intr_test.370589554
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/26.otp_ctrl_intr_test.140072509
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/27.otp_ctrl_intr_test.3222512009
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/28.otp_ctrl_intr_test.749161588
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/29.otp_ctrl_intr_test.2754537204
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_aliasing.4008360462
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_bit_bash.2498093827
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_hw_reset.3624954653
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_mem_rw_with_rand_reset.2040971499
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_rw.2236202673
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_intr_test.865104264
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_mem_partial_access.1765724725
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_mem_walk.3405722586
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_same_csr_outstanding.1725996839
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_tl_errors.307190105
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_tl_intg_err.306414933
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/30.otp_ctrl_intr_test.3282786971
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/31.otp_ctrl_intr_test.217928809
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/32.otp_ctrl_intr_test.2071255609
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/33.otp_ctrl_intr_test.1239720499
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/34.otp_ctrl_intr_test.1004364984
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/35.otp_ctrl_intr_test.301237693
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/36.otp_ctrl_intr_test.940730114
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/37.otp_ctrl_intr_test.4219801884
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/38.otp_ctrl_intr_test.1216565200
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/39.otp_ctrl_intr_test.2303763113
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_csr_aliasing.2503181600
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_csr_bit_bash.4220041525
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_csr_hw_reset.16686466
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_csr_mem_rw_with_rand_reset.2646186276
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_csr_rw.1536166566
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_intr_test.2832711658
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_mem_partial_access.2244027817
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_mem_walk.912411671
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_same_csr_outstanding.3495849654
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_tl_errors.3615875385
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/40.otp_ctrl_intr_test.967223745
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/41.otp_ctrl_intr_test.3476513305
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/42.otp_ctrl_intr_test.2218380239
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/43.otp_ctrl_intr_test.889182089
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/44.otp_ctrl_intr_test.4138582270
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/45.otp_ctrl_intr_test.909838573
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/46.otp_ctrl_intr_test.1618552109
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/47.otp_ctrl_intr_test.1455086456
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/48.otp_ctrl_intr_test.81781624
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/49.otp_ctrl_intr_test.1241449785
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_csr_mem_rw_with_rand_reset.255685315
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_csr_rw.496513643
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_intr_test.3947810994
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_same_csr_outstanding.457351622
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_tl_errors.600684164
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_tl_intg_err.1157360926
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_csr_mem_rw_with_rand_reset.2940216521
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_csr_rw.2782168064
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_intr_test.2691548344
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_same_csr_outstanding.2895886538
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_tl_errors.4045307886
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_tl_intg_err.1198091108
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_csr_mem_rw_with_rand_reset.322402656
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_csr_rw.3657538923
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_intr_test.151866845
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_same_csr_outstanding.1506991066
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_tl_errors.2818256769
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_tl_intg_err.3261178555
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_csr_mem_rw_with_rand_reset.3806854540
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_csr_rw.44843894
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_intr_test.1400234105
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_same_csr_outstanding.1847846988
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_tl_intg_err.3819183987
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_csr_rw.1159846842
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_intr_test.1286507545
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_same_csr_outstanding.4029576229
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_tl_errors.454676994
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_tl_intg_err.300910376
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_dai_errs.3263328003
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_low_freq_read.2595432250
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_macro_errs.211219869
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_parallel_lc_esc.4167123771
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_parallel_lc_req.3874207494
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_partition_walk.1989996372
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_regwen.1443326779
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_sec_cm.1223782914
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_stress_all_with_rand_reset.558967911
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_alert_test.2505847
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_background_chks.3080362778
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_dai_lock.534467527
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_parallel_lc_req.3603239003
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_regwen.1531157703
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_sec_cm.2376648135
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_smoke.3131650380
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_test_access.1815157539
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_alert_test.3046244250
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_check_fail.549168262
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_dai_errs.792026234
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_dai_lock.865139694
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_macro_errs.1563256567
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_parallel_key_req.3633215820
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_parallel_lc_esc.1004149187
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_parallel_lc_req.1488743786
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_regwen.1798824432
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_smoke.3906918378
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_stress_all.3320036917
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_test_access.1383316537
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/100.otp_ctrl_init_fail.1035202226
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/100.otp_ctrl_parallel_lc_esc.4092800229
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/101.otp_ctrl_init_fail.1175727834
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/101.otp_ctrl_parallel_lc_esc.504202326
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/102.otp_ctrl_init_fail.2676330181
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/102.otp_ctrl_parallel_lc_esc.2866599459
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/103.otp_ctrl_init_fail.1891988283
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/103.otp_ctrl_parallel_lc_esc.3696165291
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/104.otp_ctrl_init_fail.263131391
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/104.otp_ctrl_parallel_lc_esc.4107093269
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/105.otp_ctrl_init_fail.2347455931
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/105.otp_ctrl_parallel_lc_esc.741185476
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/106.otp_ctrl_init_fail.3927597408
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/106.otp_ctrl_parallel_lc_esc.635104559
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/107.otp_ctrl_init_fail.3038182994
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/108.otp_ctrl_init_fail.491018053
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/108.otp_ctrl_parallel_lc_esc.3444665304
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/109.otp_ctrl_init_fail.2277056803
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_alert_test.828922748
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_check_fail.3512428133
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_dai_errs.1678627025
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_dai_lock.1225092621
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_parallel_lc_esc.778594067
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_parallel_lc_req.3014314437
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_regwen.2934669070
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_smoke.3241353970
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_stress_all.2759967672
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_stress_all_with_rand_reset.4231538178
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_test_access.3072071420
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/110.otp_ctrl_init_fail.4031578065
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/110.otp_ctrl_parallel_lc_esc.2952458782
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/111.otp_ctrl_init_fail.165658932
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/111.otp_ctrl_parallel_lc_esc.97348616
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/112.otp_ctrl_init_fail.543513824
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/112.otp_ctrl_parallel_lc_esc.3950957695
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/113.otp_ctrl_init_fail.1021655927
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/113.otp_ctrl_parallel_lc_esc.2283728799
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/114.otp_ctrl_init_fail.4113478303
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/114.otp_ctrl_parallel_lc_esc.2313606712
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/115.otp_ctrl_init_fail.3044809063
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/115.otp_ctrl_parallel_lc_esc.739838911
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/116.otp_ctrl_init_fail.1829965587
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/116.otp_ctrl_parallel_lc_esc.239242970
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/117.otp_ctrl_init_fail.1646763696
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/117.otp_ctrl_parallel_lc_esc.1036136008
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/118.otp_ctrl_init_fail.3394017443
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/118.otp_ctrl_parallel_lc_esc.3624027531
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/119.otp_ctrl_init_fail.1455060988
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/119.otp_ctrl_parallel_lc_esc.1937374741
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_alert_test.2051771287
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_check_fail.3710517836
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_dai_errs.3657990395
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_dai_lock.241230651
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_macro_errs.994405631
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_parallel_key_req.726452613
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_parallel_lc_esc.2929336196
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_parallel_lc_req.2163327136
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_regwen.1748250690
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_smoke.526779797
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_stress_all.1167947353
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/120.otp_ctrl_init_fail.3453377221
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/120.otp_ctrl_parallel_lc_esc.1228290297
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/121.otp_ctrl_init_fail.3801949261
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/121.otp_ctrl_parallel_lc_esc.1504373343
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/122.otp_ctrl_init_fail.1935926833
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/122.otp_ctrl_parallel_lc_esc.4163177989
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/123.otp_ctrl_init_fail.3545666737
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/123.otp_ctrl_parallel_lc_esc.3969742703
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/124.otp_ctrl_init_fail.3533167050
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/124.otp_ctrl_parallel_lc_esc.2156430328
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/125.otp_ctrl_parallel_lc_esc.594355195
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/126.otp_ctrl_init_fail.2929607298
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/126.otp_ctrl_parallel_lc_esc.2652723257
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/127.otp_ctrl_init_fail.2071652886
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/127.otp_ctrl_parallel_lc_esc.2891072353
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/128.otp_ctrl_init_fail.701134006
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/128.otp_ctrl_parallel_lc_esc.828622692
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/129.otp_ctrl_parallel_lc_esc.2639299708
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_alert_test.2403303833
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_dai_errs.3376071608
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_dai_lock.687361166
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_init_fail.2145008029
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_macro_errs.2373535329
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_parallel_key_req.1066164576
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_parallel_lc_esc.2550310349
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_parallel_lc_req.1398408429
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_regwen.665186835
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_smoke.2830729408
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_stress_all_with_rand_reset.3227263753
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_test_access.2048825635
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/130.otp_ctrl_init_fail.2339999842
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/130.otp_ctrl_parallel_lc_esc.2091074161
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/131.otp_ctrl_init_fail.4241044186
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/131.otp_ctrl_parallel_lc_esc.3386720403
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/132.otp_ctrl_init_fail.4126184171
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/132.otp_ctrl_parallel_lc_esc.885200752
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/133.otp_ctrl_init_fail.454408372
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/133.otp_ctrl_parallel_lc_esc.3311377600
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/134.otp_ctrl_init_fail.742844149
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/134.otp_ctrl_parallel_lc_esc.4046855120
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/135.otp_ctrl_init_fail.788483911
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/135.otp_ctrl_parallel_lc_esc.2481209253
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/136.otp_ctrl_init_fail.2242804815
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/136.otp_ctrl_parallel_lc_esc.1713673942
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/137.otp_ctrl_init_fail.635786921
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/137.otp_ctrl_parallel_lc_esc.3757532776
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/138.otp_ctrl_init_fail.2648189975
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/138.otp_ctrl_parallel_lc_esc.270826380
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/139.otp_ctrl_init_fail.2770725536
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/139.otp_ctrl_parallel_lc_esc.2124583625
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_alert_test.2355285234
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_check_fail.2721230285
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_dai_errs.59558103
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_dai_lock.465220741
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_macro_errs.4119325344
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_parallel_lc_esc.2768550479
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_parallel_lc_req.4243983555
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_regwen.656546839
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_smoke.2813718170
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_stress_all.2995167673
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_test_access.1602640253
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/140.otp_ctrl_init_fail.3172991111
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/141.otp_ctrl_init_fail.1739765678
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/141.otp_ctrl_parallel_lc_esc.3591981369
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/142.otp_ctrl_init_fail.3833039309
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/142.otp_ctrl_parallel_lc_esc.4048876585
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/143.otp_ctrl_init_fail.3145610515
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/143.otp_ctrl_parallel_lc_esc.460930143
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/144.otp_ctrl_init_fail.2258683490
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/144.otp_ctrl_parallel_lc_esc.3262141277
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/145.otp_ctrl_init_fail.3899215108
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/145.otp_ctrl_parallel_lc_esc.1347259623
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/146.otp_ctrl_init_fail.2152076368
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/146.otp_ctrl_parallel_lc_esc.2669035613
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/147.otp_ctrl_init_fail.2055658280
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/147.otp_ctrl_parallel_lc_esc.4273176594
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/148.otp_ctrl_init_fail.3454012588
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/148.otp_ctrl_parallel_lc_esc.1236475797
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/149.otp_ctrl_init_fail.965408176
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/149.otp_ctrl_parallel_lc_esc.3315726540
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_alert_test.3213202543
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_check_fail.2337278711
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_dai_errs.30048169
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_init_fail.255930451
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_macro_errs.1963382860
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_parallel_key_req.801027283
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_parallel_lc_esc.3018196855
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_parallel_lc_req.303877795
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_regwen.509365408
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_smoke.2193963662
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_stress_all.965316008
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_test_access.3066758962
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/150.otp_ctrl_init_fail.1671213997
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/150.otp_ctrl_parallel_lc_esc.108203294
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/151.otp_ctrl_init_fail.1862744354
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/151.otp_ctrl_parallel_lc_esc.1523565126
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/152.otp_ctrl_init_fail.2449604050
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/152.otp_ctrl_parallel_lc_esc.2510961047
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/153.otp_ctrl_init_fail.1973861139
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/153.otp_ctrl_parallel_lc_esc.3339177020
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/154.otp_ctrl_init_fail.2505657948
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/154.otp_ctrl_parallel_lc_esc.85036963
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/155.otp_ctrl_init_fail.2282206447
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/155.otp_ctrl_parallel_lc_esc.384972001
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/156.otp_ctrl_init_fail.4109518833
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/156.otp_ctrl_parallel_lc_esc.2800047125
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/157.otp_ctrl_init_fail.1688457834
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/157.otp_ctrl_parallel_lc_esc.1387504299
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/158.otp_ctrl_init_fail.3191394504
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/158.otp_ctrl_parallel_lc_esc.475076707
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/159.otp_ctrl_init_fail.3279638349
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_alert_test.4015366106
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_check_fail.1445852735
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_dai_errs.218380957
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_dai_lock.2519615716
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_init_fail.3421549492
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_macro_errs.4294435014
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_parallel_key_req.329614615
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_parallel_lc_esc.382962453
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_parallel_lc_req.3850481282
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_regwen.3829268694
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_smoke.572725915
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_stress_all.1102454693
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_stress_all_with_rand_reset.1094894895
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_test_access.1464169380
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/160.otp_ctrl_init_fail.1954441121
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/161.otp_ctrl_init_fail.2417715998
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/161.otp_ctrl_parallel_lc_esc.1388432528
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/162.otp_ctrl_init_fail.3663269122
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/162.otp_ctrl_parallel_lc_esc.1729966711
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/163.otp_ctrl_init_fail.692668507
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/163.otp_ctrl_parallel_lc_esc.2037939693
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/164.otp_ctrl_init_fail.1022152802
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/164.otp_ctrl_parallel_lc_esc.2499051471
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/165.otp_ctrl_init_fail.1554330286
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/165.otp_ctrl_parallel_lc_esc.2717807207
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/166.otp_ctrl_init_fail.2174239522
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/166.otp_ctrl_parallel_lc_esc.4178962829
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/167.otp_ctrl_init_fail.1778944081
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/167.otp_ctrl_parallel_lc_esc.3324596835
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/168.otp_ctrl_parallel_lc_esc.1337138417
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/169.otp_ctrl_init_fail.1447209893
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/169.otp_ctrl_parallel_lc_esc.4071620776
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_alert_test.2174844202
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_check_fail.1298674879
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_dai_errs.594700809
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_dai_lock.1667176569
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_init_fail.1395840360
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_macro_errs.3305035893
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_parallel_key_req.3705457678
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_parallel_lc_esc.3257065059
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_parallel_lc_req.1267922206
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_regwen.1192997806
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_smoke.1221956054
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_stress_all.1213386095
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_test_access.2563572233
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/170.otp_ctrl_init_fail.3218507692
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/170.otp_ctrl_parallel_lc_esc.962991171
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/171.otp_ctrl_init_fail.518656546
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/171.otp_ctrl_parallel_lc_esc.1771580835
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/172.otp_ctrl_init_fail.543100295
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/172.otp_ctrl_parallel_lc_esc.4073017917
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/173.otp_ctrl_init_fail.912371270
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/173.otp_ctrl_parallel_lc_esc.2374542952
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/174.otp_ctrl_parallel_lc_esc.2275838
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/175.otp_ctrl_init_fail.2611682936
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/175.otp_ctrl_parallel_lc_esc.3755631831
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/176.otp_ctrl_init_fail.3890466863
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/176.otp_ctrl_parallel_lc_esc.2226080232
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/177.otp_ctrl_init_fail.840276092
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/177.otp_ctrl_parallel_lc_esc.2961638031
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/178.otp_ctrl_init_fail.790792171
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/178.otp_ctrl_parallel_lc_esc.939664198
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/179.otp_ctrl_init_fail.2628934712
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/179.otp_ctrl_parallel_lc_esc.1890952603
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_alert_test.180691161
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_check_fail.1726865960
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_dai_errs.2783007563
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_dai_lock.852582376
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_init_fail.1338185883
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_parallel_key_req.333041806
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_parallel_lc_esc.2991208822
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_parallel_lc_req.895256860
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_regwen.2037686518
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_smoke.600238028
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_stress_all.80700398
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_stress_all_with_rand_reset.115166616
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_test_access.3897050588
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/180.otp_ctrl_init_fail.1714856074
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/180.otp_ctrl_parallel_lc_esc.952055207
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/181.otp_ctrl_init_fail.3063797908
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/181.otp_ctrl_parallel_lc_esc.2032115838
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/182.otp_ctrl_init_fail.4154010617
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/182.otp_ctrl_parallel_lc_esc.2062862683
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/183.otp_ctrl_init_fail.413778309
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/183.otp_ctrl_parallel_lc_esc.3561246301
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/184.otp_ctrl_init_fail.4210512947
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/184.otp_ctrl_parallel_lc_esc.2902825211
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/185.otp_ctrl_init_fail.2444259863
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/185.otp_ctrl_parallel_lc_esc.3185615731
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/186.otp_ctrl_init_fail.443206241
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/186.otp_ctrl_parallel_lc_esc.2137583508
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/187.otp_ctrl_init_fail.3773281164
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/187.otp_ctrl_parallel_lc_esc.323087999
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/188.otp_ctrl_init_fail.3825104523
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/188.otp_ctrl_parallel_lc_esc.597988257
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/189.otp_ctrl_init_fail.2324174021
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/189.otp_ctrl_parallel_lc_esc.2858543371
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_alert_test.274485099
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_check_fail.2794654358
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_dai_errs.3915940305
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_dai_lock.1533000172
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_init_fail.325328360
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_macro_errs.2907901353
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_parallel_lc_esc.3520680244
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_parallel_lc_req.1610496986
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_regwen.3787943799
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_smoke.564546918
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_stress_all.4224262063
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_test_access.952052008
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/190.otp_ctrl_init_fail.2998267753
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/190.otp_ctrl_parallel_lc_esc.3778711176
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/191.otp_ctrl_init_fail.2089885019
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/191.otp_ctrl_parallel_lc_esc.2803962071
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/192.otp_ctrl_init_fail.1025594689
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/192.otp_ctrl_parallel_lc_esc.3089057130
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/193.otp_ctrl_init_fail.3766464199
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/193.otp_ctrl_parallel_lc_esc.2752595886
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/194.otp_ctrl_init_fail.2820235359
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/194.otp_ctrl_parallel_lc_esc.1892783596
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/195.otp_ctrl_init_fail.3528585965
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/195.otp_ctrl_parallel_lc_esc.1871496753
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/196.otp_ctrl_init_fail.4280281125
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/196.otp_ctrl_parallel_lc_esc.3844789908
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/197.otp_ctrl_init_fail.1256376556
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/197.otp_ctrl_parallel_lc_esc.504404459
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/198.otp_ctrl_init_fail.44906270
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/198.otp_ctrl_parallel_lc_esc.734005561
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/199.otp_ctrl_init_fail.3350279268
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_alert_test.3264538970
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_background_chks.1752493338
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_check_fail.2490872788
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_dai_errs.1927291578
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_dai_lock.3442723970
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_macro_errs.3795050350
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_parallel_lc_esc.142017482
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_parallel_lc_req.1133879877
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_regwen.2247778112
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_sec_cm.2912499751
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_smoke.2713655615
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_test_access.2764244140
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/20.otp_ctrl_alert_test.1692358665
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/20.otp_ctrl_check_fail.1080264265
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/20.otp_ctrl_dai_errs.1427886982
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/20.otp_ctrl_dai_lock.2432209973
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/20.otp_ctrl_init_fail.2660590463
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/20.otp_ctrl_macro_errs.3309432703
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/20.otp_ctrl_parallel_key_req.2943640589
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/20.otp_ctrl_parallel_lc_esc.1756450965
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/20.otp_ctrl_parallel_lc_req.2191040971
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/20.otp_ctrl_regwen.3018056128
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/20.otp_ctrl_smoke.493293164
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/20.otp_ctrl_stress_all.942169868
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/20.otp_ctrl_test_access.2892414154
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/200.otp_ctrl_init_fail.3635766027
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/201.otp_ctrl_init_fail.2759103215
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/202.otp_ctrl_init_fail.3888393297
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/203.otp_ctrl_init_fail.1648314706
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/204.otp_ctrl_init_fail.2140856392
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/205.otp_ctrl_init_fail.4102632608
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/206.otp_ctrl_init_fail.617596480
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/207.otp_ctrl_init_fail.4169070508
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/208.otp_ctrl_init_fail.3646540060
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/209.otp_ctrl_init_fail.1061190796
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/21.otp_ctrl_alert_test.819543647
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/21.otp_ctrl_check_fail.1140536523
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/21.otp_ctrl_dai_errs.2605831086
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/21.otp_ctrl_dai_lock.1461306669
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/21.otp_ctrl_init_fail.2687429962
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/21.otp_ctrl_macro_errs.1430469394
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/21.otp_ctrl_parallel_key_req.4130937271
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/21.otp_ctrl_parallel_lc_esc.4244607288
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/21.otp_ctrl_parallel_lc_req.3716931759
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/21.otp_ctrl_regwen.1907137598
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/21.otp_ctrl_smoke.2339519009
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/21.otp_ctrl_stress_all.2382535858
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/21.otp_ctrl_stress_all_with_rand_reset.1556192488
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/21.otp_ctrl_test_access.341605392
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/210.otp_ctrl_init_fail.339113039
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/211.otp_ctrl_init_fail.350246325
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/212.otp_ctrl_init_fail.126116850
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/213.otp_ctrl_init_fail.2526450121
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/214.otp_ctrl_init_fail.2596566536
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/215.otp_ctrl_init_fail.1003197718
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/216.otp_ctrl_init_fail.506573647
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/217.otp_ctrl_init_fail.560669775
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/218.otp_ctrl_init_fail.2057344881
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/219.otp_ctrl_init_fail.3949856982
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/22.otp_ctrl_alert_test.3804074818
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/22.otp_ctrl_dai_errs.3119226311
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/22.otp_ctrl_dai_lock.2908496199
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/22.otp_ctrl_init_fail.2437003045
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/22.otp_ctrl_macro_errs.4280088131
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/22.otp_ctrl_parallel_key_req.1595330678
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/22.otp_ctrl_parallel_lc_esc.236413982
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/22.otp_ctrl_parallel_lc_req.3205065959
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/22.otp_ctrl_regwen.2896794860
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/22.otp_ctrl_smoke.714472416
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/22.otp_ctrl_stress_all.375182831
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/22.otp_ctrl_stress_all_with_rand_reset.1755476398
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/22.otp_ctrl_test_access.1903110333
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/220.otp_ctrl_init_fail.674526075
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/221.otp_ctrl_init_fail.4194313789
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/222.otp_ctrl_init_fail.2924653534
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/223.otp_ctrl_init_fail.2761080831
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/224.otp_ctrl_init_fail.1504835225
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/225.otp_ctrl_init_fail.1661273174
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/226.otp_ctrl_init_fail.1223401001
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/228.otp_ctrl_init_fail.1170123034
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/23.otp_ctrl_alert_test.3073917017
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/23.otp_ctrl_check_fail.4183947143
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/23.otp_ctrl_dai_errs.4196547999
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/23.otp_ctrl_dai_lock.803865021
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/23.otp_ctrl_init_fail.3599503064
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/23.otp_ctrl_macro_errs.3082191844
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/23.otp_ctrl_parallel_key_req.86848664
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/23.otp_ctrl_parallel_lc_esc.953087125
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/23.otp_ctrl_regwen.3131287408
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/23.otp_ctrl_smoke.2937788248
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/23.otp_ctrl_stress_all.1164393685
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/23.otp_ctrl_test_access.1652091527
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/230.otp_ctrl_init_fail.913956439
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/231.otp_ctrl_init_fail.2076256817
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/232.otp_ctrl_init_fail.2221184177
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/233.otp_ctrl_init_fail.2117099755
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/234.otp_ctrl_init_fail.566981268
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/235.otp_ctrl_init_fail.2827391727
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/236.otp_ctrl_init_fail.4129299003
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/237.otp_ctrl_init_fail.1879032196
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/238.otp_ctrl_init_fail.3347903081
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/239.otp_ctrl_init_fail.3795575511
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/24.otp_ctrl_alert_test.236306999
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/24.otp_ctrl_dai_errs.2585378021
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/24.otp_ctrl_dai_lock.2134069277
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/24.otp_ctrl_init_fail.3609738152
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/24.otp_ctrl_macro_errs.2235681952
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/24.otp_ctrl_parallel_key_req.1867028860
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/24.otp_ctrl_parallel_lc_esc.1200992889
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/24.otp_ctrl_parallel_lc_req.1927816054
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/24.otp_ctrl_smoke.2383994389
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/24.otp_ctrl_stress_all.3007474473
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/24.otp_ctrl_test_access.3589795218
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/240.otp_ctrl_init_fail.4045036132
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/241.otp_ctrl_init_fail.908190460
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/242.otp_ctrl_init_fail.2057100577
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/243.otp_ctrl_init_fail.2480739711
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/244.otp_ctrl_init_fail.1862501082
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/245.otp_ctrl_init_fail.2340376552
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/246.otp_ctrl_init_fail.1006537234
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/247.otp_ctrl_init_fail.2701877389
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/248.otp_ctrl_init_fail.3090284087
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/249.otp_ctrl_init_fail.1683644202
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/25.otp_ctrl_alert_test.4151818831
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/25.otp_ctrl_check_fail.2928928793
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/25.otp_ctrl_dai_errs.3831727267
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/25.otp_ctrl_dai_lock.508260180
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/25.otp_ctrl_init_fail.1164825256
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/25.otp_ctrl_macro_errs.3582161420
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/25.otp_ctrl_parallel_key_req.2796529590
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/25.otp_ctrl_parallel_lc_esc.775755545
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/25.otp_ctrl_parallel_lc_req.3990246627
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/25.otp_ctrl_regwen.2600805960
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/25.otp_ctrl_smoke.1597170617
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/25.otp_ctrl_stress_all.2503741488
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/25.otp_ctrl_stress_all_with_rand_reset.1105470832
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/25.otp_ctrl_test_access.4199156475
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/251.otp_ctrl_init_fail.1971543958
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/252.otp_ctrl_init_fail.254976777
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/253.otp_ctrl_init_fail.784954045
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/254.otp_ctrl_init_fail.3947953257
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/255.otp_ctrl_init_fail.2777618547
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/257.otp_ctrl_init_fail.2568779395
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/258.otp_ctrl_init_fail.769406113
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/259.otp_ctrl_init_fail.625895621
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/26.otp_ctrl_alert_test.2559801760
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/26.otp_ctrl_check_fail.3407978873
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/26.otp_ctrl_dai_errs.4257547517
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/26.otp_ctrl_dai_lock.3244949680
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/26.otp_ctrl_init_fail.2182655078
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/26.otp_ctrl_macro_errs.1688332147
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/26.otp_ctrl_parallel_key_req.2922101896
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/26.otp_ctrl_parallel_lc_esc.777535688
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/26.otp_ctrl_parallel_lc_req.584435922
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/26.otp_ctrl_regwen.669950186
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/26.otp_ctrl_smoke.574558374
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/26.otp_ctrl_stress_all.3218309208
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/26.otp_ctrl_stress_all_with_rand_reset.1209132623
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/26.otp_ctrl_test_access.3911647447
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/260.otp_ctrl_init_fail.2335160361
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/261.otp_ctrl_init_fail.3881753503
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/262.otp_ctrl_init_fail.1137987207
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/263.otp_ctrl_init_fail.2937543465
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/264.otp_ctrl_init_fail.3154702348
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/265.otp_ctrl_init_fail.1373392066
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/266.otp_ctrl_init_fail.493259727
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/267.otp_ctrl_init_fail.3134908821
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/268.otp_ctrl_init_fail.793854653
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/27.otp_ctrl_alert_test.2294029747
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/27.otp_ctrl_check_fail.647869480
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/27.otp_ctrl_dai_errs.533416692
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/27.otp_ctrl_dai_lock.2475465919
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/27.otp_ctrl_init_fail.3238892420
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/27.otp_ctrl_macro_errs.316785198
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/27.otp_ctrl_parallel_key_req.1998367640
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/27.otp_ctrl_parallel_lc_esc.647908437
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/27.otp_ctrl_parallel_lc_req.4068039136
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/27.otp_ctrl_regwen.1279601863
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/27.otp_ctrl_smoke.3171599227
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/27.otp_ctrl_stress_all.1592829676
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/27.otp_ctrl_test_access.500987223
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/270.otp_ctrl_init_fail.2879142089
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/271.otp_ctrl_init_fail.1387515959
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/272.otp_ctrl_init_fail.1366871983
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/273.otp_ctrl_init_fail.2884073544
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/274.otp_ctrl_init_fail.396043103
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/275.otp_ctrl_init_fail.901025009
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/276.otp_ctrl_init_fail.2632459369
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/277.otp_ctrl_init_fail.2504847899
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/278.otp_ctrl_init_fail.2115168907
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/279.otp_ctrl_init_fail.1138216504
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/28.otp_ctrl_alert_test.1455833366
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/28.otp_ctrl_check_fail.3304677842
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/28.otp_ctrl_dai_errs.4081153001
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/28.otp_ctrl_dai_lock.292660231
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/28.otp_ctrl_macro_errs.2756328787
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/28.otp_ctrl_parallel_key_req.1430684639
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/28.otp_ctrl_parallel_lc_esc.2256253510
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/28.otp_ctrl_parallel_lc_req.736949341
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/28.otp_ctrl_regwen.1907861107
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/28.otp_ctrl_smoke.3316277637
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/28.otp_ctrl_stress_all.4014844220
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/28.otp_ctrl_test_access.3766103196
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/280.otp_ctrl_init_fail.808607004
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/281.otp_ctrl_init_fail.428002026
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/282.otp_ctrl_init_fail.1863436154
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/283.otp_ctrl_init_fail.2608227140
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/284.otp_ctrl_init_fail.1498739671
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/285.otp_ctrl_init_fail.567871031
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/286.otp_ctrl_init_fail.2835542388
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/287.otp_ctrl_init_fail.3416352951
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/288.otp_ctrl_init_fail.1470315870
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/289.otp_ctrl_init_fail.36608788
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/29.otp_ctrl_alert_test.1623041478
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/29.otp_ctrl_check_fail.55709941
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/29.otp_ctrl_dai_errs.1146718594
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/29.otp_ctrl_dai_lock.3636726380
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/29.otp_ctrl_init_fail.2112707165
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/29.otp_ctrl_macro_errs.1631927473
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/29.otp_ctrl_parallel_key_req.860361587
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/29.otp_ctrl_parallel_lc_esc.2653117592
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/29.otp_ctrl_parallel_lc_req.2571955046
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/29.otp_ctrl_regwen.1694905347
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/29.otp_ctrl_smoke.219389252
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/29.otp_ctrl_stress_all.1703550997
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/29.otp_ctrl_test_access.2911518103
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/290.otp_ctrl_init_fail.1373515876
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/291.otp_ctrl_init_fail.1877554875
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/292.otp_ctrl_init_fail.3378813966
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/293.otp_ctrl_init_fail.242862439
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/294.otp_ctrl_init_fail.3431742920
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/295.otp_ctrl_init_fail.351192487
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/296.otp_ctrl_init_fail.3865172756
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/297.otp_ctrl_init_fail.578370507
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/298.otp_ctrl_init_fail.314214846
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_alert_test.397339983
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_background_chks.4030211179
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_check_fail.2880248920
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_dai_errs.3261153265
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_dai_lock.1065616613
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_macro_errs.2199973865
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_parallel_key_req.1190768665
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_parallel_lc_esc.2221454561
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_regwen.1995502891
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_smoke.505523931
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_test_access.2122210248
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/30.otp_ctrl_alert_test.3450186492
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/30.otp_ctrl_dai_errs.866041478
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/30.otp_ctrl_dai_lock.2901689889
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/30.otp_ctrl_macro_errs.1746535375
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/30.otp_ctrl_parallel_key_req.986149876
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/30.otp_ctrl_parallel_lc_esc.3074125184
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/30.otp_ctrl_parallel_lc_req.1605264410
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/30.otp_ctrl_regwen.2239277151
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/30.otp_ctrl_smoke.972641506
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/30.otp_ctrl_stress_all.2587067909
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/30.otp_ctrl_stress_all_with_rand_reset.2859446020
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/30.otp_ctrl_test_access.4081644386
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/31.otp_ctrl_alert_test.423430873
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/31.otp_ctrl_check_fail.3980768008
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/31.otp_ctrl_dai_errs.349578365
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/31.otp_ctrl_dai_lock.1738419352
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/31.otp_ctrl_init_fail.981764003
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/31.otp_ctrl_macro_errs.1344243252
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/31.otp_ctrl_parallel_key_req.2280449815
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/31.otp_ctrl_parallel_lc_esc.1860489174
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/31.otp_ctrl_parallel_lc_req.3704564102
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/31.otp_ctrl_regwen.3733870988
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/31.otp_ctrl_smoke.2563123628
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/31.otp_ctrl_stress_all.3937408067
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/31.otp_ctrl_test_access.82940387
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/32.otp_ctrl_alert_test.898122551
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/32.otp_ctrl_dai_errs.1040749888
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/32.otp_ctrl_dai_lock.545326409
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/32.otp_ctrl_init_fail.3462335050
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/32.otp_ctrl_macro_errs.3699142411
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/32.otp_ctrl_parallel_key_req.2738367997
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/32.otp_ctrl_parallel_lc_esc.3598158089
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/32.otp_ctrl_parallel_lc_req.1411839646
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/32.otp_ctrl_regwen.4081986781
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/32.otp_ctrl_smoke.3976567663
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/32.otp_ctrl_stress_all.2958724651
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/32.otp_ctrl_stress_all_with_rand_reset.3604078808
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/32.otp_ctrl_test_access.1835886115
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/33.otp_ctrl_alert_test.849775932
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/33.otp_ctrl_check_fail.228025221
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/33.otp_ctrl_dai_errs.971371908
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/33.otp_ctrl_dai_lock.305096899
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/33.otp_ctrl_init_fail.2036013134
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/33.otp_ctrl_macro_errs.4180097909
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/33.otp_ctrl_parallel_key_req.3933096576
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/33.otp_ctrl_parallel_lc_esc.4061799675
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/33.otp_ctrl_parallel_lc_req.2123841933
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/33.otp_ctrl_regwen.2135240330
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/33.otp_ctrl_smoke.372193467
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/33.otp_ctrl_stress_all.4029454895
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/33.otp_ctrl_test_access.373431339
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/34.otp_ctrl_alert_test.3482281712
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/34.otp_ctrl_check_fail.3719521805
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/34.otp_ctrl_dai_errs.1422281789
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/34.otp_ctrl_dai_lock.311334509
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/34.otp_ctrl_init_fail.1011495164
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/34.otp_ctrl_macro_errs.2387822994
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/34.otp_ctrl_parallel_key_req.3530053268
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/34.otp_ctrl_parallel_lc_esc.3441775115
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/34.otp_ctrl_parallel_lc_req.3739468237
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/34.otp_ctrl_regwen.2602095815
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/34.otp_ctrl_smoke.1465184046
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/34.otp_ctrl_stress_all.781815612
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/34.otp_ctrl_stress_all_with_rand_reset.2279144073
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/34.otp_ctrl_test_access.169955365
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/35.otp_ctrl_alert_test.2253794264
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/35.otp_ctrl_dai_errs.2255896091
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/35.otp_ctrl_dai_lock.834204985
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/35.otp_ctrl_init_fail.826768582
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/35.otp_ctrl_macro_errs.2124922286
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/35.otp_ctrl_parallel_key_req.1815551258
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/35.otp_ctrl_parallel_lc_esc.1160136536
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/35.otp_ctrl_parallel_lc_req.3288985023
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/35.otp_ctrl_regwen.2685944492
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/35.otp_ctrl_smoke.3589741110
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/35.otp_ctrl_stress_all.652122851
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/35.otp_ctrl_stress_all_with_rand_reset.1709623451
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/35.otp_ctrl_test_access.69836
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/36.otp_ctrl_alert_test.1518188917
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/36.otp_ctrl_check_fail.1706673345
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/36.otp_ctrl_dai_errs.2449295570
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/36.otp_ctrl_dai_lock.2855012640
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/36.otp_ctrl_init_fail.3886529112
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/36.otp_ctrl_macro_errs.775003131
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/36.otp_ctrl_parallel_key_req.758125714
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/36.otp_ctrl_parallel_lc_esc.3160324702
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/36.otp_ctrl_parallel_lc_req.2908675892
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/36.otp_ctrl_regwen.3337472781
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/36.otp_ctrl_smoke.1294641511
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/36.otp_ctrl_stress_all.3313056197
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/36.otp_ctrl_test_access.989142882
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/37.otp_ctrl_alert_test.1222358164
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/37.otp_ctrl_check_fail.1202209558
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/37.otp_ctrl_dai_errs.525508808
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/37.otp_ctrl_dai_lock.1467932021
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/37.otp_ctrl_init_fail.1381148113
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/37.otp_ctrl_macro_errs.1987429488
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/37.otp_ctrl_parallel_key_req.3671656712
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/37.otp_ctrl_parallel_lc_esc.147083899
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/37.otp_ctrl_parallel_lc_req.2474418767
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/37.otp_ctrl_regwen.3478220315
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/37.otp_ctrl_smoke.787835978
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/37.otp_ctrl_stress_all.4034205855
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/37.otp_ctrl_test_access.247642704
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/38.otp_ctrl_alert_test.1416508925
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/38.otp_ctrl_check_fail.2928939914
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/38.otp_ctrl_dai_errs.876120859
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/38.otp_ctrl_dai_lock.2523028594
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/38.otp_ctrl_init_fail.3591012197
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/38.otp_ctrl_macro_errs.3305944590
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/38.otp_ctrl_parallel_key_req.1429987966
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/38.otp_ctrl_parallel_lc_esc.2497318215
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/38.otp_ctrl_parallel_lc_req.4074844882
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/38.otp_ctrl_regwen.4052628626
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/38.otp_ctrl_smoke.2214481764
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/38.otp_ctrl_stress_all.164211085
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/38.otp_ctrl_test_access.120466416
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/39.otp_ctrl_alert_test.1602607072
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/39.otp_ctrl_check_fail.4152422146
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/39.otp_ctrl_dai_errs.2127395865
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/39.otp_ctrl_dai_lock.1126438144
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/39.otp_ctrl_init_fail.2759435660
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/39.otp_ctrl_macro_errs.1579674104
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/39.otp_ctrl_parallel_key_req.2309423425
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/39.otp_ctrl_parallel_lc_esc.4057635299
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/39.otp_ctrl_parallel_lc_req.2859590187
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/39.otp_ctrl_regwen.1219896871
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/39.otp_ctrl_smoke.2522669728
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/39.otp_ctrl_test_access.3331488322
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_alert_test.517536387
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_background_chks.2469065154
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_dai_errs.2247532134
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_dai_lock.1666081045
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_init_fail.1934038466
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_macro_errs.280464080
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_parallel_key_req.2100437820
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_parallel_lc_req.2793302829
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_sec_cm.1409172369
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_smoke.2967373883
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_test_access.1469157781
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/40.otp_ctrl_alert_test.3663898857
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/40.otp_ctrl_check_fail.1478285100
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/40.otp_ctrl_dai_errs.360711198
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/40.otp_ctrl_dai_lock.3145769184
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/40.otp_ctrl_init_fail.3358100228
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/40.otp_ctrl_macro_errs.2003729330
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/40.otp_ctrl_parallel_key_req.1871056957
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/40.otp_ctrl_parallel_lc_esc.1522303752
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/40.otp_ctrl_parallel_lc_req.2509158999
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/40.otp_ctrl_regwen.2252398042
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/40.otp_ctrl_smoke.797550067
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/40.otp_ctrl_test_access.3134825290
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/41.otp_ctrl_alert_test.3615584492
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/41.otp_ctrl_check_fail.4186521611
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/41.otp_ctrl_dai_errs.274564439
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/41.otp_ctrl_dai_lock.3112495794
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/41.otp_ctrl_init_fail.4190073479
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/41.otp_ctrl_macro_errs.3798086933
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/41.otp_ctrl_parallel_key_req.883729629
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/41.otp_ctrl_parallel_lc_esc.1506994243
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/41.otp_ctrl_parallel_lc_req.1500909152
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/41.otp_ctrl_regwen.240750278
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/41.otp_ctrl_smoke.1958293733
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/41.otp_ctrl_stress_all.25582205
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/41.otp_ctrl_test_access.3458740781
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/42.otp_ctrl_alert_test.3608041831
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/42.otp_ctrl_check_fail.1461301830
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/42.otp_ctrl_dai_errs.2836160686
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/42.otp_ctrl_dai_lock.266108034
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/42.otp_ctrl_init_fail.3775377109
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/42.otp_ctrl_macro_errs.1538783460
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/42.otp_ctrl_parallel_key_req.1962912368
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/42.otp_ctrl_parallel_lc_esc.4279635464
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/42.otp_ctrl_parallel_lc_req.118419381
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/42.otp_ctrl_regwen.2365110106
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/42.otp_ctrl_smoke.2364781786
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/42.otp_ctrl_stress_all.1352068994
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/42.otp_ctrl_test_access.1922417809
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/43.otp_ctrl_alert_test.1684246332
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/43.otp_ctrl_check_fail.1907541398
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/43.otp_ctrl_dai_errs.3551340106
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/43.otp_ctrl_dai_lock.3240261699
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/43.otp_ctrl_init_fail.3805821483
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/43.otp_ctrl_macro_errs.3760737761
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/43.otp_ctrl_parallel_key_req.1992077243
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/43.otp_ctrl_parallel_lc_esc.721112006
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/43.otp_ctrl_parallel_lc_req.1421894750
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/43.otp_ctrl_regwen.3163826118
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/43.otp_ctrl_smoke.4129471142
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/43.otp_ctrl_stress_all.546616779
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/43.otp_ctrl_stress_all_with_rand_reset.3355598639
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/43.otp_ctrl_test_access.974728148
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/44.otp_ctrl_alert_test.865555420
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/44.otp_ctrl_check_fail.3251128788
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/44.otp_ctrl_dai_errs.3705113901
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/44.otp_ctrl_dai_lock.1665013810
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/44.otp_ctrl_init_fail.706549095
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/44.otp_ctrl_macro_errs.589440230
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/44.otp_ctrl_parallel_key_req.4251773039
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/44.otp_ctrl_parallel_lc_esc.1600697698
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/44.otp_ctrl_parallel_lc_req.1030675255
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/44.otp_ctrl_regwen.3918027543
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/44.otp_ctrl_smoke.1000080453
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/44.otp_ctrl_stress_all_with_rand_reset.2784709481
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/44.otp_ctrl_test_access.1132293924
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/45.otp_ctrl_alert_test.3925346900
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/45.otp_ctrl_check_fail.2351936532
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/45.otp_ctrl_dai_errs.213396530
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/45.otp_ctrl_dai_lock.3187779206
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/45.otp_ctrl_init_fail.2548302678
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/45.otp_ctrl_macro_errs.859213297
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/45.otp_ctrl_parallel_key_req.1165386659
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/45.otp_ctrl_parallel_lc_esc.2479287490
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/45.otp_ctrl_parallel_lc_req.562503916
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/45.otp_ctrl_regwen.2699827223
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/45.otp_ctrl_smoke.421239574
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/45.otp_ctrl_stress_all.3055282734
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/45.otp_ctrl_test_access.4147796626
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/46.otp_ctrl_alert_test.2733132059
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/46.otp_ctrl_check_fail.3673656194
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/46.otp_ctrl_dai_errs.3932726873
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/46.otp_ctrl_dai_lock.3303174937
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/46.otp_ctrl_init_fail.2906449883
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/46.otp_ctrl_macro_errs.135947106
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/46.otp_ctrl_parallel_key_req.3286255864
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/46.otp_ctrl_parallel_lc_esc.3185231427
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/46.otp_ctrl_parallel_lc_req.3577219823
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/46.otp_ctrl_smoke.1208052686
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/46.otp_ctrl_stress_all.1918194400
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/46.otp_ctrl_stress_all_with_rand_reset.1161222036
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/46.otp_ctrl_test_access.399950084
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/47.otp_ctrl_alert_test.3494967228
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/47.otp_ctrl_check_fail.3274382393
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/47.otp_ctrl_dai_errs.194378041
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/47.otp_ctrl_dai_lock.2404383833
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/47.otp_ctrl_macro_errs.824674989
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/47.otp_ctrl_parallel_key_req.303788014
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/47.otp_ctrl_parallel_lc_esc.4157391682
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/47.otp_ctrl_parallel_lc_req.1720184972
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/47.otp_ctrl_regwen.1760834926
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/47.otp_ctrl_smoke.3886607751
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/47.otp_ctrl_stress_all.2994465710
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/47.otp_ctrl_stress_all_with_rand_reset.2844033991
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/47.otp_ctrl_test_access.4056714637
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/48.otp_ctrl_alert_test.931041775
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/48.otp_ctrl_check_fail.552682147
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/48.otp_ctrl_dai_errs.4067843264
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/48.otp_ctrl_dai_lock.2353295172
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/48.otp_ctrl_init_fail.2088049134
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/48.otp_ctrl_macro_errs.3685590253
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/48.otp_ctrl_parallel_key_req.384685675
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/48.otp_ctrl_parallel_lc_esc.2368087249
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/48.otp_ctrl_parallel_lc_req.100328470
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/48.otp_ctrl_regwen.2798391989
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/48.otp_ctrl_smoke.3681167902
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/48.otp_ctrl_stress_all.3098882085
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/48.otp_ctrl_stress_all_with_rand_reset.4077377673
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/48.otp_ctrl_test_access.3681750638
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/49.otp_ctrl_alert_test.394783387
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/49.otp_ctrl_check_fail.925579551
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/49.otp_ctrl_dai_errs.1858998432
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/49.otp_ctrl_dai_lock.2176163309
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/49.otp_ctrl_init_fail.3940510840
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/49.otp_ctrl_macro_errs.1806613674
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/49.otp_ctrl_parallel_key_req.1100574995
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/49.otp_ctrl_parallel_lc_esc.118388265
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/49.otp_ctrl_parallel_lc_req.1300816357
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/49.otp_ctrl_regwen.2976710469
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/49.otp_ctrl_smoke.3988151721
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/49.otp_ctrl_stress_all.3134088854
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/49.otp_ctrl_stress_all_with_rand_reset.1140237016
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/49.otp_ctrl_test_access.4138871253
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_alert_test.3056075794
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_background_chks.2242812725
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_check_fail.2830997022
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_dai_errs.3463035717
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_dai_lock.1375923944
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_macro_errs.850610409
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_parallel_key_req.3776494474
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_parallel_lc_esc.4086957953
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_regwen.1026347967
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_smoke.4231606174
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_stress_all_with_rand_reset.531869162
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_test_access.4204241194
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/50.otp_ctrl_init_fail.2891430588
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/50.otp_ctrl_parallel_lc_esc.481814584
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/50.otp_ctrl_stress_all_with_rand_reset.2968814700
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/51.otp_ctrl_init_fail.3522342989
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/51.otp_ctrl_parallel_lc_esc.2253199160
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/51.otp_ctrl_stress_all_with_rand_reset.710944450
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/52.otp_ctrl_init_fail.959540080
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/52.otp_ctrl_parallel_lc_esc.3438526013
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/53.otp_ctrl_init_fail.2569085337
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/53.otp_ctrl_parallel_lc_esc.3631805513
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/53.otp_ctrl_stress_all_with_rand_reset.3160484944
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/54.otp_ctrl_init_fail.501821841
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/54.otp_ctrl_parallel_lc_esc.3051326190
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/55.otp_ctrl_init_fail.765200107
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/55.otp_ctrl_parallel_lc_esc.3164732629
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/56.otp_ctrl_init_fail.520386370
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/56.otp_ctrl_parallel_lc_esc.1176374729
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/56.otp_ctrl_stress_all_with_rand_reset.2347647907
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/57.otp_ctrl_parallel_lc_esc.2869141203
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/58.otp_ctrl_init_fail.2165503009
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/58.otp_ctrl_parallel_lc_esc.1038869191
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/58.otp_ctrl_stress_all_with_rand_reset.303069260
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/59.otp_ctrl_init_fail.2789192339
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/59.otp_ctrl_parallel_lc_esc.3293282904
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_alert_test.113585212
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_background_chks.3923069829
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_check_fail.3282377081
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_dai_errs.997864665
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_dai_lock.244926639
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_init_fail.3307581863
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_macro_errs.2332891019
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_parallel_key_req.3727247426
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_parallel_lc_esc.3204497932
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_smoke.2271766772
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_stress_all_with_rand_reset.3334779805
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_test_access.316796579
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/60.otp_ctrl_parallel_lc_esc.3177717674
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/61.otp_ctrl_init_fail.119323165
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/61.otp_ctrl_parallel_lc_esc.3574972480
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/61.otp_ctrl_stress_all_with_rand_reset.1368270508
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/62.otp_ctrl_init_fail.2309766664
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/62.otp_ctrl_parallel_lc_esc.3465939062
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/62.otp_ctrl_stress_all_with_rand_reset.1550488611
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/63.otp_ctrl_init_fail.998102470
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/63.otp_ctrl_parallel_lc_esc.270648346
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/64.otp_ctrl_init_fail.1453787922
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/64.otp_ctrl_parallel_lc_esc.3236123789
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/64.otp_ctrl_stress_all_with_rand_reset.2993031447
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/65.otp_ctrl_init_fail.499351234
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/65.otp_ctrl_parallel_lc_esc.2316017854
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/66.otp_ctrl_init_fail.1829123169
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/66.otp_ctrl_parallel_lc_esc.1649743192
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/66.otp_ctrl_stress_all_with_rand_reset.1603979433
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/67.otp_ctrl_init_fail.1143532514
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/67.otp_ctrl_stress_all_with_rand_reset.2327390333
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/68.otp_ctrl_init_fail.3847442526
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/68.otp_ctrl_parallel_lc_esc.3573027250
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/68.otp_ctrl_stress_all_with_rand_reset.1468602795
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/69.otp_ctrl_init_fail.2487649745
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/69.otp_ctrl_parallel_lc_esc.1234856739
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_alert_test.1638283577
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_background_chks.610449427
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_check_fail.552310981
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_dai_errs.894005506
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_dai_lock.2310041633
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_init_fail.865717291
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_parallel_key_req.2888743628
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_parallel_lc_esc.2723727318
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_parallel_lc_req.1367121749
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_regwen.593248331
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_smoke.2996482333
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_stress_all.2798167509
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_test_access.2683767992
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/70.otp_ctrl_init_fail.1921187365
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/70.otp_ctrl_parallel_lc_esc.2170419493
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/70.otp_ctrl_stress_all_with_rand_reset.96427195
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/71.otp_ctrl_init_fail.252040804
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/71.otp_ctrl_parallel_lc_esc.1226180500
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/71.otp_ctrl_stress_all_with_rand_reset.2130791208
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/72.otp_ctrl_init_fail.4238870609
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/72.otp_ctrl_parallel_lc_esc.302669749
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/73.otp_ctrl_init_fail.2348945942
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/73.otp_ctrl_parallel_lc_esc.1517134756
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/73.otp_ctrl_stress_all_with_rand_reset.4191077318
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/74.otp_ctrl_init_fail.3193744624
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/74.otp_ctrl_parallel_lc_esc.3607623268
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/74.otp_ctrl_stress_all_with_rand_reset.3378158409
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/75.otp_ctrl_init_fail.1935929141
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/75.otp_ctrl_parallel_lc_esc.3832250653
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/76.otp_ctrl_init_fail.4278941672
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/76.otp_ctrl_parallel_lc_esc.3850032485
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/76.otp_ctrl_stress_all_with_rand_reset.1851172124
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/77.otp_ctrl_init_fail.3666208964
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/77.otp_ctrl_parallel_lc_esc.104022816
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/78.otp_ctrl_init_fail.3332572983
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/78.otp_ctrl_parallel_lc_esc.3317550519
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/79.otp_ctrl_init_fail.2512486127
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/79.otp_ctrl_parallel_lc_esc.2225656471
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/79.otp_ctrl_stress_all_with_rand_reset.4130775722
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_alert_test.3869164013
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_background_chks.1257890277
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_check_fail.720680457
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_dai_errs.209922588
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_dai_lock.299191420
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_init_fail.169896735
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_macro_errs.2811607007
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_parallel_key_req.738205524
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_parallel_lc_esc.919791890
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_regwen.2166775431
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_smoke.697639045
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_stress_all_with_rand_reset.3938092870
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_test_access.1180921808
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/80.otp_ctrl_init_fail.692988405
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/80.otp_ctrl_parallel_lc_esc.2514635753
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/81.otp_ctrl_init_fail.1990927789
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/81.otp_ctrl_parallel_lc_esc.1541701617
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/81.otp_ctrl_stress_all_with_rand_reset.911327357
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/82.otp_ctrl_init_fail.2403764383
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/82.otp_ctrl_parallel_lc_esc.1740859243
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/83.otp_ctrl_init_fail.1657474690
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/83.otp_ctrl_parallel_lc_esc.3936616413
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/84.otp_ctrl_init_fail.400778276
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/84.otp_ctrl_parallel_lc_esc.2921043570
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/84.otp_ctrl_stress_all_with_rand_reset.1438413071
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/85.otp_ctrl_init_fail.905733711
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/85.otp_ctrl_parallel_lc_esc.787549546
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/85.otp_ctrl_stress_all_with_rand_reset.356553668
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/86.otp_ctrl_init_fail.2666017674
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/86.otp_ctrl_parallel_lc_esc.2765361933
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/86.otp_ctrl_stress_all_with_rand_reset.2124685695
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/87.otp_ctrl_init_fail.2892558912
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/87.otp_ctrl_parallel_lc_esc.1255544994
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/87.otp_ctrl_stress_all_with_rand_reset.2907512885
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/88.otp_ctrl_init_fail.4053857809
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/88.otp_ctrl_parallel_lc_esc.2823794991
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/89.otp_ctrl_init_fail.2322253834
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/89.otp_ctrl_parallel_lc_esc.2163386316
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_alert_test.411616420
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_background_chks.2528067789
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_check_fail.1233894338
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_dai_errs.234566746
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_dai_lock.2153608624
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_init_fail.1148832965
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_macro_errs.722538729
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_parallel_key_req.1545710698
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_parallel_lc_req.2851776108
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_smoke.2170291765
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_stress_all.1645264199
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_stress_all_with_rand_reset.3439877114
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_test_access.965626543
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/90.otp_ctrl_init_fail.1416063354
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/90.otp_ctrl_parallel_lc_esc.253974521
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/91.otp_ctrl_init_fail.2240933434
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/91.otp_ctrl_parallel_lc_esc.3662412927
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/92.otp_ctrl_init_fail.1639703800
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/92.otp_ctrl_parallel_lc_esc.2711242532
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/93.otp_ctrl_init_fail.634070239
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/93.otp_ctrl_parallel_lc_esc.3800472183
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/93.otp_ctrl_stress_all_with_rand_reset.2102146858
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/94.otp_ctrl_init_fail.977775949
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/94.otp_ctrl_parallel_lc_esc.2907465269
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/94.otp_ctrl_stress_all_with_rand_reset.3346284577
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/95.otp_ctrl_init_fail.4011579431
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/95.otp_ctrl_parallel_lc_esc.1222499759
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/95.otp_ctrl_stress_all_with_rand_reset.268651990
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/96.otp_ctrl_init_fail.18240063
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/96.otp_ctrl_parallel_lc_esc.3241292043
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/97.otp_ctrl_init_fail.3707640823
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/97.otp_ctrl_parallel_lc_esc.3971727663
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/98.otp_ctrl_init_fail.3518197634
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/98.otp_ctrl_parallel_lc_esc.533400547
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/99.otp_ctrl_init_fail.3279596595
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/99.otp_ctrl_parallel_lc_esc.3420422418




Total test records in report: 1299
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_wake_up.35516040 Sep 04 08:38:57 AM UTC 24 Sep 04 08:39:00 AM UTC 24 220594870 ps
T2 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_init_fail.3049338761 Sep 04 08:39:00 AM UTC 24 Sep 04 08:39:05 AM UTC 24 283835638 ps
T3 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_smoke.1784719370 Sep 04 08:38:57 AM UTC 24 Sep 04 08:39:08 AM UTC 24 297200955 ps
T4 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_parallel_lc_esc.4167123771 Sep 04 08:39:03 AM UTC 24 Sep 04 08:39:08 AM UTC 24 168011187 ps
T11 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_alert_test.3057533689 Sep 04 08:39:08 AM UTC 24 Sep 04 08:39:11 AM UTC 24 55877824 ps
T5 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_regwen.1443326779 Sep 04 08:39:07 AM UTC 24 Sep 04 08:39:12 AM UTC 24 110138089 ps
T10 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_parallel_lc_req.3603239003 Sep 04 08:39:08 AM UTC 24 Sep 04 08:39:12 AM UTC 24 202732706 ps
T12 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_low_freq_read.2595432250 Sep 04 08:38:59 AM UTC 24 Sep 04 08:39:14 AM UTC 24 5923428747 ps
T6 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_smoke.3131650380 Sep 04 08:39:08 AM UTC 24 Sep 04 08:39:14 AM UTC 24 225811084 ps
T13 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_alert_test.2505847 Sep 04 08:39:10 AM UTC 24 Sep 04 08:39:14 AM UTC 24 227181165 ps
T44 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_init_fail.50600014 Sep 04 08:39:08 AM UTC 24 Sep 04 08:39:14 AM UTC 24 266073451 ps
T31 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_init_fail.3852623513 Sep 04 08:39:10 AM UTC 24 Sep 04 08:39:15 AM UTC 24 172222829 ps
T24 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_smoke.2713655615 Sep 04 08:39:10 AM UTC 24 Sep 04 08:39:15 AM UTC 24 169016431 ps
T138 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_partition_walk.1989996372 Sep 04 08:38:58 AM UTC 24 Sep 04 08:39:19 AM UTC 24 1603104542 ps
T34 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_parallel_lc_esc.142017482 Sep 04 08:39:13 AM UTC 24 Sep 04 08:39:19 AM UTC 24 377697233 ps
T91 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_dai_lock.2100654518 Sep 04 08:39:03 AM UTC 24 Sep 04 08:39:20 AM UTC 24 724084626 ps
T134 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_dai_errs.3263328003 Sep 04 08:39:03 AM UTC 24 Sep 04 08:39:20 AM UTC 24 349603379 ps
T135 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_parallel_lc_req.1133879877 Sep 04 08:39:12 AM UTC 24 Sep 04 08:39:20 AM UTC 24 247512231 ps
T95 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_check_fail.1678700203 Sep 04 08:39:04 AM UTC 24 Sep 04 08:39:21 AM UTC 24 1722986065 ps
T136 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_regwen.1531157703 Sep 04 08:39:09 AM UTC 24 Sep 04 08:39:21 AM UTC 24 969904182 ps
T17 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_test_access.2083189361 Sep 04 08:39:07 AM UTC 24 Sep 04 08:39:22 AM UTC 24 2502427583 ps
T128 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_macro_errs.211219869 Sep 04 08:39:06 AM UTC 24 Sep 04 08:39:22 AM UTC 24 807759904 ps
T92 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_parallel_lc_req.3874207494 Sep 04 08:39:01 AM UTC 24 Sep 04 08:39:23 AM UTC 24 704517286 ps
T129 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_macro_errs.3795050350 Sep 04 08:39:15 AM UTC 24 Sep 04 08:39:24 AM UTC 24 405081610 ps
T130 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_regwen.2247778112 Sep 04 08:39:15 AM UTC 24 Sep 04 08:39:24 AM UTC 24 172512084 ps
T131 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_alert_test.3264538970 Sep 04 08:39:21 AM UTC 24 Sep 04 08:39:25 AM UTC 24 149533960 ps
T18 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_test_access.1815157539 Sep 04 08:39:09 AM UTC 24 Sep 04 08:39:25 AM UTC 24 636609916 ps
T78 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_check_fail.2490872788 Sep 04 08:39:15 AM UTC 24 Sep 04 08:39:25 AM UTC 24 303209519 ps
T19 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_test_access.2764244140 Sep 04 08:39:17 AM UTC 24 Sep 04 08:39:27 AM UTC 24 396849330 ps
T124 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_dai_lock.534467527 Sep 04 08:39:08 AM UTC 24 Sep 04 08:39:27 AM UTC 24 2093191830 ps
T99 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_background_chks.3080362778 Sep 04 08:39:08 AM UTC 24 Sep 04 08:39:27 AM UTC 24 1743357134 ps
T125 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_parallel_key_req.3096873692 Sep 04 08:39:06 AM UTC 24 Sep 04 08:39:27 AM UTC 24 9263143401 ps
T105 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_background_chks.708895143 Sep 04 08:39:01 AM UTC 24 Sep 04 08:39:28 AM UTC 24 12699022941 ps
T285 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_smoke.505523931 Sep 04 08:39:21 AM UTC 24 Sep 04 08:39:29 AM UTC 24 479501351 ps
T41 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_init_fail.4186103825 Sep 04 08:39:23 AM UTC 24 Sep 04 08:39:31 AM UTC 24 2799333673 ps
T154 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_macro_errs.1859685157 Sep 04 08:39:09 AM UTC 24 Sep 04 08:39:33 AM UTC 24 1378114993 ps
T137 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_regwen.1995502891 Sep 04 08:39:26 AM UTC 24 Sep 04 08:39:33 AM UTC 24 215984543 ps
T428 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_alert_test.397339983 Sep 04 08:39:30 AM UTC 24 Sep 04 08:39:34 AM UTC 24 663126688 ps
T132 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_parallel_key_req.3947495362 Sep 04 08:39:15 AM UTC 24 Sep 04 08:39:34 AM UTC 24 515953324 ps
T7 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_dai_errs.473929829 Sep 04 08:39:08 AM UTC 24 Sep 04 08:39:35 AM UTC 24 573916749 ps
T126 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_dai_lock.3442723970 Sep 04 08:39:13 AM UTC 24 Sep 04 08:39:36 AM UTC 24 1063380597 ps
T146 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_parallel_lc_req.1063737732 Sep 04 08:39:23 AM UTC 24 Sep 04 08:39:36 AM UTC 24 1049493465 ps
T101 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_init_fail.1934038466 Sep 04 08:39:30 AM UTC 24 Sep 04 08:39:37 AM UTC 24 142507856 ps
T232 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_smoke.2967373883 Sep 04 08:39:30 AM UTC 24 Sep 04 08:39:39 AM UTC 24 1042538004 ps
T140 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_dai_lock.1065616613 Sep 04 08:39:25 AM UTC 24 Sep 04 08:39:40 AM UTC 24 1448417754 ps
T104 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_check_fail.2880248920 Sep 04 08:39:26 AM UTC 24 Sep 04 08:39:42 AM UTC 24 944425364 ps
T100 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_background_chks.4030211179 Sep 04 08:39:23 AM UTC 24 Sep 04 08:39:44 AM UTC 24 1519366385 ps
T127 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_parallel_key_req.4226690504 Sep 04 08:39:09 AM UTC 24 Sep 04 08:39:44 AM UTC 24 1590166937 ps
T204 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_parallel_lc_esc.3826973368 Sep 04 08:39:08 AM UTC 24 Sep 04 08:39:45 AM UTC 24 3841366665 ps
T169 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_parallel_lc_esc.2674770728 Sep 04 08:39:34 AM UTC 24 Sep 04 08:39:45 AM UTC 24 1051708328 ps
T8 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_dai_errs.3261153265 Sep 04 08:39:25 AM UTC 24 Sep 04 08:39:45 AM UTC 24 1025014850 ps
T180 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_parallel_key_req.1190768665 Sep 04 08:39:26 AM UTC 24 Sep 04 08:39:48 AM UTC 24 5115533419 ps
T266 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_regwen.644762627 Sep 04 08:39:38 AM UTC 24 Sep 04 08:39:49 AM UTC 24 1131516277 ps
T493 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_alert_test.517536387 Sep 04 08:39:46 AM UTC 24 Sep 04 08:39:50 AM UTC 24 50975384 ps
T106 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_background_chks.2469065154 Sep 04 08:39:32 AM UTC 24 Sep 04 08:39:51 AM UTC 24 735240143 ps
T175 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_parallel_lc_esc.2221454561 Sep 04 08:39:24 AM UTC 24 Sep 04 08:39:52 AM UTC 24 2595713765 ps
T28 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_init_fail.3070503764 Sep 04 08:39:46 AM UTC 24 Sep 04 08:39:52 AM UTC 24 114239016 ps
T133 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_parallel_lc_req.2793302829 Sep 04 08:39:34 AM UTC 24 Sep 04 08:39:52 AM UTC 24 857920308 ps
T152 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_test_access.2122210248 Sep 04 08:39:28 AM UTC 24 Sep 04 08:39:53 AM UTC 24 1790030738 ps
T494 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_smoke.4231606174 Sep 04 08:39:46 AM UTC 24 Sep 04 08:39:54 AM UTC 24 3228059987 ps
T181 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_macro_errs.280464080 Sep 04 08:39:38 AM UTC 24 Sep 04 08:39:54 AM UTC 24 1957287822 ps
T182 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_macro_errs.2199973865 Sep 04 08:39:26 AM UTC 24 Sep 04 08:39:54 AM UTC 24 729118157 ps
T243 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_background_chks.1752493338 Sep 04 08:39:11 AM UTC 24 Sep 04 08:39:54 AM UTC 24 4278808730 ps
T164 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_parallel_lc_esc.4086957953 Sep 04 08:39:48 AM UTC 24 Sep 04 08:39:55 AM UTC 24 235024681 ps
T312 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_test_access.1469157781 Sep 04 08:39:39 AM UTC 24 Sep 04 08:39:56 AM UTC 24 446421158 ps
T313 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_alert_test.3056075794 Sep 04 08:39:55 AM UTC 24 Sep 04 08:39:59 AM UTC 24 171567777 ps
T423 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_regwen.1026347967 Sep 04 08:39:55 AM UTC 24 Sep 04 08:40:01 AM UTC 24 136089113 ps
T176 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_parallel_lc_esc.3204497932 Sep 04 08:39:57 AM UTC 24 Sep 04 08:40:01 AM UTC 24 128419613 ps
T183 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_dai_errs.1927291578 Sep 04 08:39:14 AM UTC 24 Sep 04 08:40:02 AM UTC 24 12920460087 ps
T442 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_dai_lock.1666081045 Sep 04 08:39:36 AM UTC 24 Sep 04 08:40:03 AM UTC 24 1840124609 ps
T9 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_stress_all_with_rand_reset.558967911 Sep 04 08:39:07 AM UTC 24 Sep 04 08:40:03 AM UTC 24 1697068975 ps
T42 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_init_fail.3307581863 Sep 04 08:39:57 AM UTC 24 Sep 04 08:40:05 AM UTC 24 146846274 ps
T148 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_check_fail.2830997022 Sep 04 08:39:51 AM UTC 24 Sep 04 08:40:06 AM UTC 24 449991250 ps
T244 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_dai_lock.1375923944 Sep 04 08:39:49 AM UTC 24 Sep 04 08:40:06 AM UTC 24 832547831 ps
T315 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_smoke.2271766772 Sep 04 08:39:57 AM UTC 24 Sep 04 08:40:08 AM UTC 24 2598323498 ps
T60 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_check_fail.3282377081 Sep 04 08:40:02 AM UTC 24 Sep 04 08:40:08 AM UTC 24 139907043 ps
T287 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_parallel_key_req.3776494474 Sep 04 08:39:55 AM UTC 24 Sep 04 08:40:08 AM UTC 24 314446534 ps
T184 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_macro_errs.850610409 Sep 04 08:39:52 AM UTC 24 Sep 04 08:40:09 AM UTC 24 1220330847 ps
T70 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_check_fail.1476015745 Sep 04 08:39:38 AM UTC 24 Sep 04 08:40:10 AM UTC 24 1625263185 ps
T233 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_alert_test.113585212 Sep 04 08:40:08 AM UTC 24 Sep 04 08:40:11 AM UTC 24 127237697 ps
T14 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_stress_all_with_rand_reset.847989051 Sep 04 08:39:21 AM UTC 24 Sep 04 08:40:11 AM UTC 24 2659835174 ps
T234 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_regwen.1481301422 Sep 04 08:40:05 AM UTC 24 Sep 04 08:40:14 AM UTC 24 181865149 ps
T205 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_parallel_lc_req.836579856 Sep 04 08:39:57 AM UTC 24 Sep 04 08:40:15 AM UTC 24 798643860 ps
T235 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_test_access.4204241194 Sep 04 08:39:55 AM UTC 24 Sep 04 08:40:15 AM UTC 24 1868390183 ps
T16 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_dai_errs.2247532134 Sep 04 08:39:36 AM UTC 24 Sep 04 08:40:15 AM UTC 24 6185906404 ps
T139 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_init_fail.865717291 Sep 04 08:40:09 AM UTC 24 Sep 04 08:40:16 AM UTC 24 198419197 ps
T236 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_dai_errs.3463035717 Sep 04 08:39:51 AM UTC 24 Sep 04 08:40:16 AM UTC 24 735100380 ps
T61 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_check_fail.1311592653 Sep 04 08:39:09 AM UTC 24 Sep 04 08:40:17 AM UTC 24 32081418480 ps
T237 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_parallel_lc_req.740431857 Sep 04 08:39:48 AM UTC 24 Sep 04 08:40:17 AM UTC 24 1546772493 ps
T238 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_parallel_key_req.2100437820 Sep 04 08:39:38 AM UTC 24 Sep 04 08:40:17 AM UTC 24 7849878136 ps
T193 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_macro_errs.2332891019 Sep 04 08:40:02 AM UTC 24 Sep 04 08:40:18 AM UTC 24 519201419 ps
T239 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_smoke.2996482333 Sep 04 08:40:08 AM UTC 24 Sep 04 08:40:20 AM UTC 24 431012212 ps
T240 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_background_chks.3923069829 Sep 04 08:39:57 AM UTC 24 Sep 04 08:40:20 AM UTC 24 10938070891 ps
T241 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_parallel_key_req.3727247426 Sep 04 08:40:05 AM UTC 24 Sep 04 08:40:21 AM UTC 24 1351158133 ps
T242 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_dai_errs.997864665 Sep 04 08:40:02 AM UTC 24 Sep 04 08:40:23 AM UTC 24 315604950 ps
T202 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_parallel_lc_esc.2723727318 Sep 04 08:40:11 AM UTC 24 Sep 04 08:40:23 AM UTC 24 2588891587 ps
T495 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_alert_test.1638283577 Sep 04 08:40:20 AM UTC 24 Sep 04 08:40:25 AM UTC 24 315378716 ps
T417 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_regwen.593248331 Sep 04 08:40:16 AM UTC 24 Sep 04 08:40:26 AM UTC 24 801143563 ps
T107 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_init_fail.169896735 Sep 04 08:40:20 AM UTC 24 Sep 04 08:40:26 AM UTC 24 286358295 ps
T207 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_parallel_lc_esc.919791890 Sep 04 08:40:23 AM UTC 24 Sep 04 08:40:26 AM UTC 24 689257928 ps
T208 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_test_access.2683767992 Sep 04 08:40:16 AM UTC 24 Sep 04 08:40:27 AM UTC 24 336709082 ps
T209 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_smoke.697639045 Sep 04 08:40:20 AM UTC 24 Sep 04 08:40:29 AM UTC 24 625859550 ps
T210 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_parallel_lc_req.1367121749 Sep 04 08:40:11 AM UTC 24 Sep 04 08:40:30 AM UTC 24 2051462341 ps
T211 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_parallel_lc_req.2548273605 Sep 04 08:40:20 AM UTC 24 Sep 04 08:40:30 AM UTC 24 3794534236 ps
T212 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_test_access.316796579 Sep 04 08:40:05 AM UTC 24 Sep 04 08:40:31 AM UTC 24 2913209257 ps
T213 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_parallel_key_req.2888743628 Sep 04 08:40:15 AM UTC 24 Sep 04 08:40:31 AM UTC 24 1407025888 ps
T214 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_dai_lock.299191420 Sep 04 08:40:23 AM UTC 24 Sep 04 08:40:31 AM UTC 24 281823763 ps
T215 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_alert_test.3869164013 Sep 04 08:40:27 AM UTC 24 Sep 04 08:40:32 AM UTC 24 95552483 ps
T149 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_check_fail.720680457 Sep 04 08:40:23 AM UTC 24 Sep 04 08:40:33 AM UTC 24 499884850 ps
T496 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_regwen.2166775431 Sep 04 08:40:26 AM UTC 24 Sep 04 08:40:33 AM UTC 24 148853040 ps
T76 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_init_fail.1148832965 Sep 04 08:40:29 AM UTC 24 Sep 04 08:40:35 AM UTC 24 200966164 ps
T391 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_dai_lock.244926639 Sep 04 08:40:00 AM UTC 24 Sep 04 08:40:36 AM UTC 24 3622120088 ps
T390 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_dai_errs.894005506 Sep 04 08:40:12 AM UTC 24 Sep 04 08:40:39 AM UTC 24 759150989 ps
T497 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_background_chks.2528067789 Sep 04 08:40:30 AM UTC 24 Sep 04 08:40:39 AM UTC 24 519859651 ps
T498 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_smoke.2170291765 Sep 04 08:40:27 AM UTC 24 Sep 04 08:40:41 AM UTC 24 4901598375 ps
T203 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_parallel_lc_esc.865801375 Sep 04 08:40:31 AM UTC 24 Sep 04 08:40:42 AM UTC 24 586085834 ps
T15 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_stress_all_with_rand_reset.531869162 Sep 04 08:39:55 AM UTC 24 Sep 04 08:40:43 AM UTC 24 1614989345 ps
T153 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_background_chks.1257890277 Sep 04 08:40:20 AM UTC 24 Sep 04 08:40:43 AM UTC 24 951061450 ps
T288 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_parallel_key_req.738205524 Sep 04 08:40:25 AM UTC 24 Sep 04 08:40:44 AM UTC 24 1782436778 ps
T418 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_regwen.1748250690 Sep 04 08:41:09 AM UTC 24 Sep 04 08:41:15 AM UTC 24 133548047 ps
T499 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_alert_test.411616420 Sep 04 08:40:40 AM UTC 24 Sep 04 08:40:44 AM UTC 24 99970231 ps
T291 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_dai_lock.2310041633 Sep 04 08:40:11 AM UTC 24 Sep 04 08:40:45 AM UTC 24 22437568326 ps
T199 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_macro_errs.722538729 Sep 04 08:40:33 AM UTC 24 Sep 04 08:40:45 AM UTC 24 879237928 ps
T316 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_test_access.1180921808 Sep 04 08:40:26 AM UTC 24 Sep 04 08:40:46 AM UTC 24 1283297009 ps
T317 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_test_access.965626543 Sep 04 08:40:34 AM UTC 24 Sep 04 08:40:46 AM UTC 24 1217865728 ps
T318 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_regwen.3360085405 Sep 04 08:40:34 AM UTC 24 Sep 04 08:40:47 AM UTC 24 292687112 ps
T267 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_parallel_lc_req.1488743786 Sep 04 08:40:43 AM UTC 24 Sep 04 08:41:14 AM UTC 24 3044286208 ps
T319 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_check_fail.1233894338 Sep 04 08:40:33 AM UTC 24 Sep 04 08:40:47 AM UTC 24 656856634 ps
T293 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_smoke.3906918378 Sep 04 08:40:40 AM UTC 24 Sep 04 08:40:48 AM UTC 24 1659999812 ps
T186 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_init_fail.3831932439 Sep 04 08:40:41 AM UTC 24 Sep 04 08:40:49 AM UTC 24 318416381 ps
T320 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_parallel_lc_esc.1004149187 Sep 04 08:40:43 AM UTC 24 Sep 04 08:40:50 AM UTC 24 308174764 ps
T142 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_background_chks.610449427 Sep 04 08:40:09 AM UTC 24 Sep 04 08:40:50 AM UTC 24 3079336924 ps
T321 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_macro_errs.2811607007 Sep 04 08:40:25 AM UTC 24 Sep 04 08:40:50 AM UTC 24 28164845364 ps
T399 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_dai_errs.209922588 Sep 04 08:40:23 AM UTC 24 Sep 04 08:40:50 AM UTC 24 2612992429 ps
T177 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_macro_errs.4125664220 Sep 04 08:40:14 AM UTC 24 Sep 04 08:40:51 AM UTC 24 3473631488 ps
T430 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_parallel_lc_req.2851776108 Sep 04 08:40:31 AM UTC 24 Sep 04 08:40:53 AM UTC 24 776539021 ps
T500 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_alert_test.3046244250 Sep 04 08:40:50 AM UTC 24 Sep 04 08:40:54 AM UTC 24 109626174 ps
T20 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_stress_all_with_rand_reset.1721073613 Sep 04 08:39:39 AM UTC 24 Sep 04 08:40:54 AM UTC 24 22845853891 ps
T466 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_parallel_key_req.1545710698 Sep 04 08:40:33 AM UTC 24 Sep 04 08:40:55 AM UTC 24 2819222736 ps
T501 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_macro_errs.1563256567 Sep 04 08:40:45 AM UTC 24 Sep 04 08:40:55 AM UTC 24 955379455 ps
T421 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_regwen.1798824432 Sep 04 08:40:48 AM UTC 24 Sep 04 08:40:56 AM UTC 24 370630034 ps
T53 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_init_fail.2700499081 Sep 04 08:40:50 AM UTC 24 Sep 04 08:40:58 AM UTC 24 2370474079 ps
T502 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_alert_test.828922748 Sep 04 08:40:56 AM UTC 24 Sep 04 08:41:00 AM UTC 24 109617746 ps
T431 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_background_chks.2242812725 Sep 04 08:39:46 AM UTC 24 Sep 04 08:41:02 AM UTC 24 7050133304 ps
T187 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_init_fail.3621012435 Sep 04 08:40:58 AM UTC 24 Sep 04 08:41:04 AM UTC 24 134071192 ps
T262 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_smoke.3241353970 Sep 04 08:40:50 AM UTC 24 Sep 04 08:41:04 AM UTC 24 379052626 ps
T397 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_dai_errs.792026234 Sep 04 08:40:45 AM UTC 24 Sep 04 08:41:04 AM UTC 24 10704090852 ps
T295 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_dai_lock.2153608624 Sep 04 08:40:31 AM UTC 24 Sep 04 08:41:04 AM UTC 24 14188067060 ps
T398 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_dai_errs.234566746 Sep 04 08:40:33 AM UTC 24 Sep 04 08:41:05 AM UTC 24 1490421771 ps
T93 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_stress_all_with_rand_reset.3938092870 Sep 04 08:40:26 AM UTC 24 Sep 04 08:41:06 AM UTC 24 1022914139 ps
T503 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_smoke.526779797 Sep 04 08:40:57 AM UTC 24 Sep 04 08:41:07 AM UTC 24 188954066 ps
T419 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_regwen.2934669070 Sep 04 08:40:54 AM UTC 24 Sep 04 08:41:07 AM UTC 24 283249457 ps
T79 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_check_fail.549168262 Sep 04 08:40:45 AM UTC 24 Sep 04 08:41:07 AM UTC 24 1318574626 ps
T395 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_parallel_lc_esc.2929336196 Sep 04 08:41:00 AM UTC 24 Sep 04 08:41:08 AM UTC 24 147420316 ps
T504 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_parallel_lc_req.2163327136 Sep 04 08:40:59 AM UTC 24 Sep 04 08:41:09 AM UTC 24 2153812323 ps
T268 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_check_fail.3512428133 Sep 04 08:40:52 AM UTC 24 Sep 04 08:41:09 AM UTC 24 4585996410 ps
T259 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_dai_errs.1678627025 Sep 04 08:40:52 AM UTC 24 Sep 04 08:41:09 AM UTC 24 1088514825 ps
T392 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_dai_lock.865139694 Sep 04 08:40:45 AM UTC 24 Sep 04 08:41:09 AM UTC 24 1085773930 ps
T436 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_parallel_key_req.3633215820 Sep 04 08:40:48 AM UTC 24 Sep 04 08:41:10 AM UTC 24 872830185 ps
T437 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_parallel_lc_req.3014314437 Sep 04 08:40:50 AM UTC 24 Sep 04 08:41:10 AM UTC 24 686056388 ps
T505 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_alert_test.2051771287 Sep 04 08:41:09 AM UTC 24 Sep 04 08:41:12 AM UTC 24 82162204 ps
T396 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_parallel_lc_esc.778594067 Sep 04 08:40:52 AM UTC 24 Sep 04 08:41:15 AM UTC 24 2716281763 ps
T506 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_parallel_key_req.726452613 Sep 04 08:41:06 AM UTC 24 Sep 04 08:41:15 AM UTC 24 2508155138 ps
T265 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_parallel_key_req.2275179954 Sep 04 08:40:53 AM UTC 24 Sep 04 08:41:17 AM UTC 24 2917325721 ps
T429 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_test_access.1383316537 Sep 04 08:40:48 AM UTC 24 Sep 04 08:41:18 AM UTC 24 9500863703 ps
T63 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_init_fail.2145008029 Sep 04 08:41:12 AM UTC 24 Sep 04 08:41:19 AM UTC 24 482996609 ps
T441 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_check_fail.3710517836 Sep 04 08:41:06 AM UTC 24 Sep 04 08:41:20 AM UTC 24 2293137007 ps
T194 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_macro_errs.1234243621 Sep 04 08:40:52 AM UTC 24 Sep 04 08:41:21 AM UTC 24 1783904463 ps
T507 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_parallel_lc_req.1398408429 Sep 04 08:41:12 AM UTC 24 Sep 04 08:41:21 AM UTC 24 222608948 ps
T263 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_smoke.2830729408 Sep 04 08:41:09 AM UTC 24 Sep 04 08:41:21 AM UTC 24 1424882822 ps
T307 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_stress_all.3086152950 Sep 04 08:39:40 AM UTC 24 Sep 04 08:41:21 AM UTC 24 30108026117 ps
T508 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_alert_test.2403303833 Sep 04 08:41:18 AM UTC 24 Sep 04 08:41:22 AM UTC 24 210607994 ps
T393 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_dai_lock.1225092621 Sep 04 08:40:52 AM UTC 24 Sep 04 08:41:23 AM UTC 24 1263871815 ps
T509 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_check_fail.552310981 Sep 04 08:40:12 AM UTC 24 Sep 04 08:41:23 AM UTC 24 15035422544 ps
T433 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_test_access.3072071420 Sep 04 08:40:56 AM UTC 24 Sep 04 08:41:24 AM UTC 24 1209364623 ps
T510 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_dai_lock.687361166 Sep 04 08:41:12 AM UTC 24 Sep 04 08:41:25 AM UTC 24 2107536947 ps
T191 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_init_fail.1941207346 Sep 04 08:41:19 AM UTC 24 Sep 04 08:41:25 AM UTC 24 210756011 ps
T511 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_dai_errs.3657990395 Sep 04 08:41:06 AM UTC 24 Sep 04 08:41:26 AM UTC 24 1233417956 ps
T264 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_smoke.2813718170 Sep 04 08:41:18 AM UTC 24 Sep 04 08:41:27 AM UTC 24 4013426066 ps
T178 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_macro_errs.994405631 Sep 04 08:41:06 AM UTC 24 Sep 04 08:41:28 AM UTC 24 1546539344 ps
T195 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_macro_errs.2373535329 Sep 04 08:41:12 AM UTC 24 Sep 04 08:41:29 AM UTC 24 1235493982 ps
T512 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_parallel_lc_req.4243983555 Sep 04 08:41:21 AM UTC 24 Sep 04 08:41:30 AM UTC 24 218528010 ps
T513 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_alert_test.2355285234 Sep 04 08:41:27 AM UTC 24 Sep 04 08:41:31 AM UTC 24 49613331 ps
T488 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_parallel_lc_esc.2768550479 Sep 04 08:41:21 AM UTC 24 Sep 04 08:41:31 AM UTC 24 533172038 ps
T420 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_regwen.665186835 Sep 04 08:41:17 AM UTC 24 Sep 04 08:41:32 AM UTC 24 4660956186 ps
T166 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_parallel_lc_esc.2550310349 Sep 04 08:41:12 AM UTC 24 Sep 04 08:41:32 AM UTC 24 2225293599 ps
T96 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_stress_all_with_rand_reset.3334779805 Sep 04 08:40:06 AM UTC 24 Sep 04 08:41:33 AM UTC 24 4300756183 ps
T424 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_regwen.656546839 Sep 04 08:41:24 AM UTC 24 Sep 04 08:41:33 AM UTC 24 158906569 ps
T192 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_init_fail.255930451 Sep 04 08:41:27 AM UTC 24 Sep 04 08:41:33 AM UTC 24 113953546 ps
T514 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_test_access.2048825635 Sep 04 08:41:17 AM UTC 24 Sep 04 08:41:33 AM UTC 24 1628314339 ps
T167 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_stress_all.3347629326 Sep 04 08:39:55 AM UTC 24 Sep 04 08:41:34 AM UTC 24 4360801495 ps
T294 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_parallel_lc_req.303877795 Sep 04 08:41:30 AM UTC 24 Sep 04 08:41:35 AM UTC 24 237123853 ps
T515 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_parallel_lc_esc.3018196855 Sep 04 08:41:30 AM UTC 24 Sep 04 08:41:35 AM UTC 24 320441310 ps
T516 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_stress_all.3320036917 Sep 04 08:40:48 AM UTC 24 Sep 04 08:41:36 AM UTC 24 8186725797 ps
T517 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_macro_errs.1963382860 Sep 04 08:41:32 AM UTC 24 Sep 04 08:41:38 AM UTC 24 2125785783 ps
T518 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_check_fail.2721230285 Sep 04 08:41:24 AM UTC 24 Sep 04 08:41:38 AM UTC 24 1506955618 ps
T292 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_dai_lock.241230651 Sep 04 08:41:04 AM UTC 24 Sep 04 08:41:39 AM UTC 24 1455340079 ps
T165 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_stress_all.1645264199 Sep 04 08:40:38 AM UTC 24 Sep 04 08:41:40 AM UTC 24 4771902614 ps
T519 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_smoke.2193963662 Sep 04 08:41:27 AM UTC 24 Sep 04 08:41:41 AM UTC 24 385911569 ps
T375 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_stress_all.2759967672 Sep 04 08:40:56 AM UTC 24 Sep 04 08:41:41 AM UTC 24 4772209967 ps
T381 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_dai_lock.465220741 Sep 04 08:41:24 AM UTC 24 Sep 04 08:41:41 AM UTC 24 6240753364 ps
T382 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_regwen.509365408 Sep 04 08:41:34 AM UTC 24 Sep 04 08:41:41 AM UTC 24 268979722 ps
T383 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_alert_test.3213202543 Sep 04 08:41:37 AM UTC 24 Sep 04 08:41:41 AM UTC 24 151020046 ps
T225 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_init_fail.3421549492 Sep 04 08:41:37 AM UTC 24 Sep 04 08:41:42 AM UTC 24 234995455 ps
T384 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_dai_errs.30048169 Sep 04 08:41:32 AM UTC 24 Sep 04 08:41:44 AM UTC 24 395509452 ps
T385 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_check_fail.2337278711 Sep 04 08:41:32 AM UTC 24 Sep 04 08:41:44 AM UTC 24 717054695 ps
T386 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_dai_errs.59558103 Sep 04 08:41:24 AM UTC 24 Sep 04 08:41:45 AM UTC 24 780113508 ps
T387 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_smoke.564546918 Sep 04 08:42:00 AM UTC 24 Sep 04 08:42:09 AM UTC 24 526226734 ps
T388 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_dai_errs.3376071608 Sep 04 08:41:12 AM UTC 24 Sep 04 08:41:46 AM UTC 24 859847297 ps
T520 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_alert_test.4015366106 Sep 04 08:41:43 AM UTC 24 Sep 04 08:41:48 AM UTC 24 274065528 ps
T521 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_parallel_key_req.329614615 Sep 04 08:41:43 AM UTC 24 Sep 04 08:41:48 AM UTC 24 147582559 ps
T522 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_smoke.572725915 Sep 04 08:41:37 AM UTC 24 Sep 04 08:41:49 AM UTC 24 620229918 ps
T439 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_test_access.2570173531 Sep 04 08:41:09 AM UTC 24 Sep 04 08:41:50 AM UTC 24 2911856950 ps
T523 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_test_access.1464169380 Sep 04 08:41:43 AM UTC 24 Sep 04 08:41:50 AM UTC 24 453059427 ps
T524 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_regwen.3829268694 Sep 04 08:41:43 AM UTC 24 Sep 04 08:41:51 AM UTC 24 1757597720 ps
T525 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_smoke.1221956054 Sep 04 08:41:44 AM UTC 24 Sep 04 08:41:51 AM UTC 24 570686460 ps
T145 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_stress_all.2329946092 Sep 04 08:39:07 AM UTC 24 Sep 04 08:41:51 AM UTC 24 47068023730 ps
T526 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_macro_errs.4294435014 Sep 04 08:41:43 AM UTC 24 Sep 04 08:41:52 AM UTC 24 511234409 ps
T188 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_init_fail.1395840360 Sep 04 08:41:46 AM UTC 24 Sep 04 08:41:52 AM UTC 24 288605304 ps
T432 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_test_access.1602640253 Sep 04 08:41:27 AM UTC 24 Sep 04 08:41:52 AM UTC 24 3861752873 ps
T527 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_parallel_key_req.3514332912 Sep 04 08:41:24 AM UTC 24 Sep 04 08:41:53 AM UTC 24 1805354448 ps
T440 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_parallel_key_req.1066164576 Sep 04 08:41:14 AM UTC 24 Sep 04 08:41:53 AM UTC 24 17619088062 ps
T528 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_parallel_lc_req.3850481282 Sep 04 08:41:37 AM UTC 24 Sep 04 08:41:54 AM UTC 24 6694604147 ps
T200 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_macro_errs.4119325344 Sep 04 08:41:24 AM UTC 24 Sep 04 08:41:54 AM UTC 24 920789402 ps
T448 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_parallel_lc_req.1267922206 Sep 04 08:41:46 AM UTC 24 Sep 04 08:41:55 AM UTC 24 195532401 ps
T529 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_check_fail.1298674879 Sep 04 08:41:49 AM UTC 24 Sep 04 08:41:55 AM UTC 24 2470080300 ps
T530 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_alert_test.2174844202 Sep 04 08:41:52 AM UTC 24 Sep 04 08:41:55 AM UTC 24 70783364 ps
T143 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_stress_all.3949979522 Sep 04 08:40:27 AM UTC 24 Sep 04 08:41:57 AM UTC 24 15104214449 ps
T531 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_dai_lock.2519615716 Sep 04 08:41:39 AM UTC 24 Sep 04 08:41:57 AM UTC 24 917631524 ps
T279 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_parallel_lc_esc.3257065059 Sep 04 08:41:48 AM UTC 24 Sep 04 08:41:58 AM UTC 24 629091508 ps
T50 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_check_fail.1445852735 Sep 04 08:41:43 AM UTC 24 Sep 04 08:41:59 AM UTC 24 1065061255 ps
T438 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_parallel_key_req.801027283 Sep 04 08:41:33 AM UTC 24 Sep 04 08:42:00 AM UTC 24 2348639731 ps
T479 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_dai_lock.882105630 Sep 04 08:41:30 AM UTC 24 Sep 04 08:42:01 AM UTC 24 1329117544 ps
T532 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_regwen.1192997806 Sep 04 08:41:51 AM UTC 24 Sep 04 08:42:02 AM UTC 24 285531848 ps
T533 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_alert_test.180691161 Sep 04 08:42:00 AM UTC 24 Sep 04 08:42:03 AM UTC 24 42601031 ps
T449 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_parallel_key_req.3705457678 Sep 04 08:41:49 AM UTC 24 Sep 04 08:42:03 AM UTC 24 415980690 ps
T489 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_parallel_key_req.333041806 Sep 04 08:41:59 AM UTC 24 Sep 04 08:42:06 AM UTC 24 380621566 ps
T534 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_test_access.3066758962 Sep 04 08:41:37 AM UTC 24 Sep 04 08:42:06 AM UTC 24 2098133146 ps
T64 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_init_fail.1338185883 Sep 04 08:41:59 AM UTC 24 Sep 04 08:42:06 AM UTC 24 283664726 ps
T535 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_smoke.600238028 Sep 04 08:41:59 AM UTC 24 Sep 04 08:42:07 AM UTC 24 137724505 ps
T189 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_init_fail.325328360 Sep 04 08:42:02 AM UTC 24 Sep 04 08:42:08 AM UTC 24 498149140 ps
T536 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_regwen.2037686518 Sep 04 08:41:59 AM UTC 24 Sep 04 08:42:08 AM UTC 24 146270930 ps
T537 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_macro_errs.3305035893 Sep 04 08:41:49 AM UTC 24 Sep 04 08:42:09 AM UTC 24 1020872415 ps
T434 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_dai_lock.1667176569 Sep 04 08:41:48 AM UTC 24 Sep 04 08:42:09 AM UTC 24 2423979973 ps
T487 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_parallel_lc_esc.382962453 Sep 04 08:41:39 AM UTC 24 Sep 04 08:42:09 AM UTC 24 4516992645 ps
T538 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_parallel_lc_req.895256860 Sep 04 08:41:59 AM UTC 24 Sep 04 08:42:09 AM UTC 24 3897291370 ps
T21 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_stress_all_with_rand_reset.3227263753 Sep 04 08:41:17 AM UTC 24 Sep 04 08:42:12 AM UTC 24 7247288310 ps
T394 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_parallel_lc_esc.3520680244 Sep 04 08:42:02 AM UTC 24 Sep 04 08:42:13 AM UTC 24 290609432 ps
T539 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_test_access.2563572233 Sep 04 08:41:51 AM UTC 24 Sep 04 08:42:13 AM UTC 24 537115501 ps
T540 /workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_parallel_lc_req.1610496986 Sep 04 08:42:02 AM UTC 24 Sep 04 08:42:14 AM UTC 24 4605568441 ps
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