dashboard | hierarchy | modlist | groups | tests | asserts

Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 13612 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 13612 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 9702 1 T1 1 T2 3 T3 1
true 15907 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 10633 1 T1 1 T2 3 T3 1
true 15959 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 76 1 T130 2 T125 2 T132 2
others[1] 86 1 T96 2 T201 2 T251 2
others[2] 98 1 T102 4 T121 2 T122 2
others[3] 70 1 T124 2 T131 2 T97 2
others[4] 92 1 T20 2 T97 2 T261 2
others[5] 62 1 T129 2 T119 2 T121 2
others[6] 78 1 T121 2 T181 2 T295 2
others[7] 132 1 T102 2 T130 2 T319 2
false 13612 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 68 1 T124 2 T131 2 T233 2
others[1] 94 1 T92 2 T132 2 T87 2
others[2] 106 1 T124 2 T96 2 T87 2
others[3] 66 1 T92 2 T87 2 T431 2
others[4] 84 1 T132 2 T228 2 T149 2
others[5] 96 1 T36 2 T102 2 T97 2
others[6] 78 1 T122 2 T130 2 T392 2
others[7] 94 1 T121 4 T124 2 T201 2
false 13612 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 80 1 T87 2 T227 2 T235 2
others[1] 116 1 T125 4 T228 2 T252 2
others[2] 78 1 T129 2 T130 2 T96 2
others[3] 50 1 T124 2 T228 2 T289 2
others[4] 92 1 T92 2 T102 2 T122 4
others[5] 68 1 T143 2 T125 2 T432 2
others[6] 92 1 T21 2 T121 2 T123 2
others[7] 98 1 T20 2 T89 2 T119 2
false 13612 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 46 1 T102 2 T125 2 T235 2
others[1] 54 1 T132 2 T228 2 T392 2
others[2] 60 1 T102 2 T181 2 T433 2
others[3] 64 1 T228 2 T431 2 T49 2
others[4] 52 1 T235 2 T388 2 T209 2
others[5] 64 1 T18 2 T123 2 T132 2
others[6] 50 1 T123 2 T392 2 T434 2
others[7] 64 1 T95 2 T125 2 T286 2
false 13612 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 90 1 T20 2 T18 2 T87 2
others[1] 72 1 T124 2 T181 2 T97 2
others[2] 104 1 T125 2 T254 2 T435 2
others[3] 82 1 T89 2 T96 2 T253 2
others[4] 74 1 T99 2 T123 2 T201 2
others[5] 86 1 T227 2 T251 2 T244 2
others[6] 106 1 T130 2 T181 2 T97 2
others[7] 86 1 T121 2 T124 2 T96 2
false 13612 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 28 1 T128 2 T233 2 T219 2
others[1] 30 1 T122 4 T252 2 T330 2
others[2] 30 1 T130 2 T252 2 T394 2
others[3] 36 1 T251 2 T252 2 T261 4
others[4] 46 1 T254 2 T435 2 T330 2
others[5] 40 1 T435 2 T261 2 T396 2
others[6] 44 1 T319 2 T435 4 T436 2
others[7] 50 1 T124 2 T96 4 T253 2
false 13612 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 84 1 T89 2 T21 2 T96 2
others[1] 96 1 T39 2 T437 2 T434 2
others[2] 92 1 T93 2 T121 4 T123 4
others[3] 88 1 T122 2 T124 2 T228 2
others[4] 96 1 T121 2 T122 2 T228 2
others[5] 70 1 T122 4 T295 2 T254 2
others[6] 90 1 T18 2 T37 2 T233 2
others[7] 94 1 T123 2 T125 2 T37 2
false 13612 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 94 1 T119 2 T18 2 T125 2
others[1] 76 1 T18 2 T121 2 T235 2
others[2] 84 1 T201 2 T295 2 T39 2
others[3] 76 1 T92 2 T21 2 T233 2
others[4] 96 1 T92 2 T96 2 T37 4
others[5] 88 1 T92 2 T121 2 T130 2
others[6] 126 1 T99 2 T123 2 T130 2
others[7] 107 1 T89 2 T102 2 T121 2
false 13612 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 98 1 T92 2 T89 2 T438 2
others[1] 82 1 T122 2 T143 2 T124 2
others[2] 90 1 T129 2 T96 2 T49 2
others[3] 72 1 T36 2 T121 2 T235 2
others[4] 104 1 T36 2 T201 2 T235 2
others[5] 102 1 T119 2 T96 2 T132 2
others[6] 102 1 T121 2 T227 2 T252 2
others[7] 110 1 T95 2 T36 2 T21 2
false 13612 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 74 1 T93 2 T121 2 T123 2
others[1] 74 1 T130 2 T132 2 T233 2
others[2] 104 1 T20 2 T102 2 T121 2
others[3] 94 1 T92 2 T36 2 T87 2
others[4] 100 1 T92 2 T36 2 T99 2
others[5] 98 1 T123 2 T132 2 T235 2
others[6] 70 1 T62 2 T261 2 T329 4
others[7] 106 1 T92 2 T21 2 T122 4
false 13612 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 78 1 T96 2 T318 2 T394 2
others[1] 92 1 T119 2 T99 2 T102 2
others[2] 88 1 T201 4 T254 2 T392 2
others[3] 64 1 T102 2 T124 2 T254 2
others[4] 74 1 T21 2 T124 2 T394 2
others[5] 90 1 T97 4 T49 2 T390 2
others[6] 100 1 T102 2 T121 2 T125 2
others[7] 98 1 T102 2 T97 2 T149 2
false 13612 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 16 1 T147 2 T23 1 T322 1
others[1] 15 1 T17 1 T25 1 T386 2
others[2] 14 1 T25 1 T439 1 T440 2
others[3] 21 1 T123 2 T438 2 T242 2
others[4] 15 1 T441 2 T322 1 T280 2
others[5] 17 1 T124 2 T442 2 T144 2
others[6] 9 1 T25 1 T23 1 T443 1
others[7] 18 1 T17 1 T443 1 T281 1
false 13612 1 T1 1 T2 4 T3 4
true 1997 1 T4 1 T95 2 T129 2


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 24 1 T123 2 T242 2 T147 2
others[1] 12 1 T124 2 T441 2 T322 1
others[2] 11 1 T17 1 T25 2 T444 2
others[3] 13 1 T442 2 T23 1 T440 2
others[4] 12 1 T280 1 T445 2 T100 2
others[5] 10 1 T147 2 T280 1 T440 1
others[6] 18 1 T144 2 T25 1 T322 1
others[7] 25 1 T438 2 T23 1 T386 2
false 11105 1 T1 1 T2 3 T3 1
true 17972 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 92 1 T132 2 T252 2 T253 2
others[1] 86 1 T119 2 T121 2 T433 2
others[2] 74 1 T102 2 T130 2 T201 2
others[3] 72 1 T124 2 T395 2 T328 2
others[4] 88 1 T121 2 T122 2 T130 2
others[5] 78 1 T129 2 T102 2 T122 2
others[6] 102 1 T20 2 T121 2 T125 2
others[7] 102 1 T102 2 T96 2 T97 2
false 7625 1 T1 1 T2 3 T3 1
true 16015 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 84 1 T102 2 T122 2 T96 2
others[1] 64 1 T92 2 T36 2 T130 2
others[2] 62 1 T124 2 T228 2 T263 2
others[3] 118 1 T132 2 T97 2 T227 2
others[4] 84 1 T124 2 T235 2 T433 2
others[5] 94 1 T121 2 T124 2 T87 2
others[6] 98 1 T132 2 T87 2 T289 2
others[7] 82 1 T92 2 T121 2 T131 2
false 6700 1 T1 1 T2 3 T3 1
true 15784 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 94 1 T21 2 T122 2 T96 2
others[1] 96 1 T143 2 T125 4 T96 2
others[2] 62 1 T129 2 T123 2 T228 2
others[3] 92 1 T252 2 T388 2 T286 2
others[4] 74 1 T122 2 T125 2 T87 2
others[5] 98 1 T89 2 T119 2 T228 4
others[6] 66 1 T92 2 T20 2 T122 2
others[7] 92 1 T102 2 T121 2 T122 2
false 7057 1 T1 1 T2 3 T3 1
true 15804 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 12 1 T441 2 T171 2 T446 1
others[1] 14 1 T122 2 T15 1 T280 3
others[2] 17 1 T123 2 T91 3 T441 2
others[3] 16 1 T102 2 T94 1 T447 2
others[4] 15 1 T439 1 T448 2 T163 2
others[5] 18 1 T394 2 T449 2 T321 1
others[6] 19 1 T322 2 T138 2 T443 1
others[7] 15 1 T25 1 T322 1 T450 2
false 11033 1 T1 1 T2 3 T3 1
true 17916 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 72 1 T228 2 T433 2 T392 2
others[1] 60 1 T18 2 T102 2 T132 2
others[2] 56 1 T125 2 T132 2 T228 4
others[3] 50 1 T431 2 T209 2 T147 2
others[4] 52 1 T123 2 T181 2 T227 2
others[5] 58 1 T102 2 T123 2 T181 2
others[6] 48 1 T388 2 T141 2 T243 2
others[7] 58 1 T95 2 T125 2 T390 2
false 8668 1 T1 1 T2 3 T3 1
true 15997 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 6 1 T336 2 T440 1 T451 2
others[1] 20 1 T204 2 T105 2 T147 2
others[2] 12 1 T452 2 T322 1 T453 2
others[3] 15 1 T147 2 T25 1 T94 1
others[4] 16 1 T454 2 T321 1 T322 1
others[5] 11 1 T290 2 T258 2 T284 1
others[6] 12 1 T205 2 T91 1 T23 1
others[7] 18 1 T125 2 T434 2 T242 2
false 10982 1 T1 1 T2 3 T3 1
true 17871 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 100 1 T20 2 T124 2 T149 2
others[1] 80 1 T123 2 T130 2 T125 2
others[2] 82 1 T89 2 T99 2 T96 2
others[3] 106 1 T18 2 T181 2 T97 2
others[4] 100 1 T121 2 T124 2 T97 2
others[5] 78 1 T227 2 T251 2 T286 2
others[6] 62 1 T96 2 T181 2 T235 2
others[7] 92 1 T132 2 T251 2 T319 2
false 7545 1 T1 1 T2 3 T3 1
true 15930 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 11 1 T257 2 T94 1 T280 1
others[1] 8 1 T321 1 T280 1 T440 1
others[2] 19 1 T252 2 T455 2 T147 2
others[3] 21 1 T144 2 T147 2 T17 1
others[4] 12 1 T166 2 T172 2 T322 1
others[5] 21 1 T452 2 T243 2 T17 1
others[6] 12 1 T322 2 T456 2 T156 1
others[7] 10 1 T457 2 T25 1 T441 2
false 10942 1 T1 1 T2 3 T3 1
true 17853 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 44 1 T258 2 T441 2 T458 2
others[1] 38 1 T394 2 T435 2 T219 2
others[2] 28 1 T128 2 T122 2 T253 2
others[3] 24 1 T122 2 T233 2 T252 4
others[4] 52 1 T124 2 T251 2 T261 2
others[5] 30 1 T261 2 T330 2 T258 2
others[6] 44 1 T130 2 T96 4 T319 2
others[7] 44 1 T252 2 T254 2 T435 4
false 9583 1 T1 1 T2 3 T3 1
true 15988 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 86 1 T89 2 T121 2 T123 2
others[1] 88 1 T442 2 T459 2 T434 2
others[2] 74 1 T121 2 T123 2 T438 2
others[3] 74 1 T21 2 T123 2 T438 2
others[4] 86 1 T122 2 T227 2 T394 2
others[5] 92 1 T96 2 T233 2 T252 2
others[6] 92 1 T18 2 T122 2 T124 2
others[7] 118 1 T93 2 T121 2 T122 4
false 6730 1 T1 1 T2 1 T3 1
true 15786 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 112 1 T92 2 T89 2 T18 2
others[1] 106 1 T149 2 T318 2 T252 2
others[2] 82 1 T121 2 T289 2 T395 2
others[3] 98 1 T92 2 T99 2 T121 2
others[4] 86 1 T21 2 T18 2 T201 2
others[5] 90 1 T102 2 T96 2 T235 2
others[6] 94 1 T119 2 T125 2 T49 2
others[7] 79 1 T92 2 T121 2 T130 2
false 6730 1 T1 1 T2 1 T3 1
true 15786 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 98 1 T21 2 T96 2 T97 2
others[1] 94 1 T36 2 T201 2 T251 2
others[2] 90 1 T36 2 T121 2 T124 2
others[3] 106 1 T95 2 T92 2 T36 2
others[4] 80 1 T96 2 T392 2 T261 2
others[5] 82 1 T119 2 T18 2 T438 4
others[6] 92 1 T129 2 T121 2 T227 2
others[7] 118 1 T89 2 T122 2 T143 2
false 6053 1 T1 1 T2 1 T3 1
true 15778 1 T1 1 T2 4 T3 4

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%