| T1063 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/206.otp_ctrl_init_fail.3448463311 |
|
|
Sep 11 01:06:38 PM UTC 24 |
Sep 11 01:06:43 PM UTC 24 |
409658222 ps |
| T1064 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/209.otp_ctrl_init_fail.1209700820 |
|
|
Sep 11 01:06:38 PM UTC 24 |
Sep 11 01:06:43 PM UTC 24 |
305616426 ps |
| T1065 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/213.otp_ctrl_init_fail.978829501 |
|
|
Sep 11 01:06:38 PM UTC 24 |
Sep 11 01:06:44 PM UTC 24 |
188629951 ps |
| T1066 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/207.otp_ctrl_init_fail.3423966658 |
|
|
Sep 11 01:06:38 PM UTC 24 |
Sep 11 01:06:44 PM UTC 24 |
141899627 ps |
| T1067 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/194.otp_ctrl_parallel_lc_esc.4171177958 |
|
|
Sep 11 01:06:37 PM UTC 24 |
Sep 11 01:06:44 PM UTC 24 |
710937909 ps |
| T1068 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/194.otp_ctrl_init_fail.1311212247 |
|
|
Sep 11 01:06:37 PM UTC 24 |
Sep 11 01:06:44 PM UTC 24 |
627378740 ps |
| T1069 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/210.otp_ctrl_init_fail.3130228821 |
|
|
Sep 11 01:06:38 PM UTC 24 |
Sep 11 01:06:44 PM UTC 24 |
334179298 ps |
| T1070 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/192.otp_ctrl_parallel_lc_esc.2870299375 |
|
|
Sep 11 01:06:37 PM UTC 24 |
Sep 11 01:06:44 PM UTC 24 |
220160487 ps |
| T1071 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/201.otp_ctrl_init_fail.1623225652 |
|
|
Sep 11 01:06:38 PM UTC 24 |
Sep 11 01:06:44 PM UTC 24 |
1505702362 ps |
| T1072 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/205.otp_ctrl_init_fail.2745644111 |
|
|
Sep 11 01:06:38 PM UTC 24 |
Sep 11 01:06:44 PM UTC 24 |
2014995286 ps |
| T1073 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/212.otp_ctrl_init_fail.1281839993 |
|
|
Sep 11 01:06:38 PM UTC 24 |
Sep 11 01:06:44 PM UTC 24 |
286906897 ps |
| T1074 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/196.otp_ctrl_init_fail.3284202306 |
|
|
Sep 11 01:06:37 PM UTC 24 |
Sep 11 01:06:44 PM UTC 24 |
2692752973 ps |
| T1075 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/208.otp_ctrl_init_fail.3479879787 |
|
|
Sep 11 01:06:38 PM UTC 24 |
Sep 11 01:06:45 PM UTC 24 |
2566768866 ps |
| T1076 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/199.otp_ctrl_parallel_lc_esc.2537372124 |
|
|
Sep 11 01:06:38 PM UTC 24 |
Sep 11 01:06:45 PM UTC 24 |
471397599 ps |
| T1077 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/199.otp_ctrl_init_fail.3999151613 |
|
|
Sep 11 01:06:38 PM UTC 24 |
Sep 11 01:06:45 PM UTC 24 |
368647601 ps |
| T1078 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/211.otp_ctrl_init_fail.504837096 |
|
|
Sep 11 01:06:38 PM UTC 24 |
Sep 11 01:06:45 PM UTC 24 |
1795235343 ps |
| T1079 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/193.otp_ctrl_init_fail.142857742 |
|
|
Sep 11 01:06:37 PM UTC 24 |
Sep 11 01:06:45 PM UTC 24 |
2242585498 ps |
| T1080 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/285.otp_ctrl_init_fail.3093041750 |
|
|
Sep 11 01:06:58 PM UTC 24 |
Sep 11 01:07:04 PM UTC 24 |
112505591 ps |
| T1081 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/197.otp_ctrl_parallel_lc_esc.716368865 |
|
|
Sep 11 01:06:38 PM UTC 24 |
Sep 11 01:06:46 PM UTC 24 |
361105473 ps |
| T1082 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/193.otp_ctrl_parallel_lc_esc.1041496666 |
|
|
Sep 11 01:06:37 PM UTC 24 |
Sep 11 01:06:46 PM UTC 24 |
277423599 ps |
| T1083 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/189.otp_ctrl_parallel_lc_esc.946950974 |
|
|
Sep 11 01:06:30 PM UTC 24 |
Sep 11 01:06:46 PM UTC 24 |
1321374654 ps |
| T1084 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/292.otp_ctrl_init_fail.745132362 |
|
|
Sep 11 01:06:58 PM UTC 24 |
Sep 11 01:07:04 PM UTC 24 |
588431136 ps |
| T1085 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/81.otp_ctrl_stress_all_with_rand_reset.1985998222 |
|
|
Sep 11 01:04:52 PM UTC 24 |
Sep 11 01:06:48 PM UTC 24 |
7483505667 ps |
| T1086 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/198.otp_ctrl_parallel_lc_esc.4015649834 |
|
|
Sep 11 01:06:38 PM UTC 24 |
Sep 11 01:06:48 PM UTC 24 |
553266415 ps |
| T1087 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/170.otp_ctrl_parallel_lc_esc.3767258998 |
|
|
Sep 11 01:06:26 PM UTC 24 |
Sep 11 01:06:48 PM UTC 24 |
9531835903 ps |
| T1088 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/218.otp_ctrl_init_fail.2345436775 |
|
|
Sep 11 01:06:46 PM UTC 24 |
Sep 11 01:06:51 PM UTC 24 |
152491555 ps |
| T1089 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/216.otp_ctrl_init_fail.1953305564 |
|
|
Sep 11 01:06:46 PM UTC 24 |
Sep 11 01:06:51 PM UTC 24 |
162879241 ps |
| T1090 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/227.otp_ctrl_init_fail.2575254292 |
|
|
Sep 11 01:06:46 PM UTC 24 |
Sep 11 01:06:51 PM UTC 24 |
302302489 ps |
| T1091 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/220.otp_ctrl_init_fail.898868638 |
|
|
Sep 11 01:06:46 PM UTC 24 |
Sep 11 01:06:51 PM UTC 24 |
184548853 ps |
| T1092 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/225.otp_ctrl_init_fail.2674186500 |
|
|
Sep 11 01:06:46 PM UTC 24 |
Sep 11 01:06:51 PM UTC 24 |
533917124 ps |
| T148 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/234.otp_ctrl_init_fail.3682753035 |
|
|
Sep 11 01:06:46 PM UTC 24 |
Sep 11 01:06:51 PM UTC 24 |
216691164 ps |
| T1093 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/228.otp_ctrl_init_fail.37574670 |
|
|
Sep 11 01:06:46 PM UTC 24 |
Sep 11 01:06:51 PM UTC 24 |
132964341 ps |
| T1094 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/219.otp_ctrl_init_fail.2145378217 |
|
|
Sep 11 01:06:46 PM UTC 24 |
Sep 11 01:06:51 PM UTC 24 |
2264648590 ps |
| T1095 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/232.otp_ctrl_init_fail.752841353 |
|
|
Sep 11 01:06:46 PM UTC 24 |
Sep 11 01:06:51 PM UTC 24 |
97731269 ps |
| T1096 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/238.otp_ctrl_init_fail.3397874142 |
|
|
Sep 11 01:06:47 PM UTC 24 |
Sep 11 01:06:51 PM UTC 24 |
124071978 ps |
| T1097 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/235.otp_ctrl_init_fail.3026014983 |
|
|
Sep 11 01:06:46 PM UTC 24 |
Sep 11 01:06:51 PM UTC 24 |
341334615 ps |
| T1098 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/247.otp_ctrl_init_fail.4237174550 |
|
|
Sep 11 01:06:47 PM UTC 24 |
Sep 11 01:06:51 PM UTC 24 |
184386964 ps |
| T56 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/231.otp_ctrl_init_fail.202702567 |
|
|
Sep 11 01:06:46 PM UTC 24 |
Sep 11 01:06:51 PM UTC 24 |
121568625 ps |
| T1099 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/217.otp_ctrl_init_fail.3509389843 |
|
|
Sep 11 01:06:46 PM UTC 24 |
Sep 11 01:06:51 PM UTC 24 |
172300624 ps |
| T1100 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/236.otp_ctrl_init_fail.3918950581 |
|
|
Sep 11 01:06:47 PM UTC 24 |
Sep 11 01:06:51 PM UTC 24 |
144010098 ps |
| T1101 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/229.otp_ctrl_init_fail.950265368 |
|
|
Sep 11 01:06:46 PM UTC 24 |
Sep 11 01:06:51 PM UTC 24 |
508253221 ps |
| T1102 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/237.otp_ctrl_init_fail.3751699619 |
|
|
Sep 11 01:06:47 PM UTC 24 |
Sep 11 01:06:51 PM UTC 24 |
293890408 ps |
| T1103 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/226.otp_ctrl_init_fail.132828752 |
|
|
Sep 11 01:06:46 PM UTC 24 |
Sep 11 01:06:52 PM UTC 24 |
168752865 ps |
| T149 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/233.otp_ctrl_init_fail.1257154360 |
|
|
Sep 11 01:06:46 PM UTC 24 |
Sep 11 01:06:52 PM UTC 24 |
2100381838 ps |
| T177 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/244.otp_ctrl_init_fail.292914142 |
|
|
Sep 11 01:06:47 PM UTC 24 |
Sep 11 01:06:52 PM UTC 24 |
194795838 ps |
| T178 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/245.otp_ctrl_init_fail.2715311092 |
|
|
Sep 11 01:06:47 PM UTC 24 |
Sep 11 01:06:52 PM UTC 24 |
1552038663 ps |
| T179 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/222.otp_ctrl_init_fail.3797483595 |
|
|
Sep 11 01:06:46 PM UTC 24 |
Sep 11 01:06:52 PM UTC 24 |
172165310 ps |
| T180 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/240.otp_ctrl_init_fail.3176161040 |
|
|
Sep 11 01:06:47 PM UTC 24 |
Sep 11 01:06:52 PM UTC 24 |
192375076 ps |
| T181 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/246.otp_ctrl_init_fail.3624072534 |
|
|
Sep 11 01:06:47 PM UTC 24 |
Sep 11 01:06:52 PM UTC 24 |
159121005 ps |
| T182 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/224.otp_ctrl_init_fail.969516314 |
|
|
Sep 11 01:06:46 PM UTC 24 |
Sep 11 01:06:52 PM UTC 24 |
289304234 ps |
| T183 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/239.otp_ctrl_init_fail.3983354409 |
|
|
Sep 11 01:06:47 PM UTC 24 |
Sep 11 01:06:52 PM UTC 24 |
1987842189 ps |
| T184 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/215.otp_ctrl_init_fail.2196358044 |
|
|
Sep 11 01:06:46 PM UTC 24 |
Sep 11 01:06:52 PM UTC 24 |
2006979127 ps |
| T185 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/243.otp_ctrl_init_fail.512894155 |
|
|
Sep 11 01:06:47 PM UTC 24 |
Sep 11 01:06:52 PM UTC 24 |
192151830 ps |
| T1104 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/242.otp_ctrl_init_fail.3677290351 |
|
|
Sep 11 01:06:47 PM UTC 24 |
Sep 11 01:06:52 PM UTC 24 |
645141275 ps |
| T1105 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/230.otp_ctrl_init_fail.1530617632 |
|
|
Sep 11 01:06:46 PM UTC 24 |
Sep 11 01:06:53 PM UTC 24 |
1885353656 ps |
| T1106 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/78.otp_ctrl_stress_all_with_rand_reset.4024931584 |
|
|
Sep 11 01:04:46 PM UTC 24 |
Sep 11 01:06:53 PM UTC 24 |
50535268463 ps |
| T57 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/223.otp_ctrl_init_fail.3267977191 |
|
|
Sep 11 01:06:46 PM UTC 24 |
Sep 11 01:06:53 PM UTC 24 |
2244751813 ps |
| T1107 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/214.otp_ctrl_init_fail.633069044 |
|
|
Sep 11 01:06:46 PM UTC 24 |
Sep 11 01:06:53 PM UTC 24 |
2239867087 ps |
| T1108 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/221.otp_ctrl_init_fail.388960015 |
|
|
Sep 11 01:06:46 PM UTC 24 |
Sep 11 01:06:53 PM UTC 24 |
1841661759 ps |
| T1109 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/248.otp_ctrl_init_fail.3722039794 |
|
|
Sep 11 01:06:47 PM UTC 24 |
Sep 11 01:06:53 PM UTC 24 |
133721654 ps |
| T1110 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/241.otp_ctrl_init_fail.2237984857 |
|
|
Sep 11 01:06:47 PM UTC 24 |
Sep 11 01:06:54 PM UTC 24 |
2218576394 ps |
| T133 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/68.otp_ctrl_stress_all_with_rand_reset.1093713398 |
|
|
Sep 11 01:04:39 PM UTC 24 |
Sep 11 01:06:54 PM UTC 24 |
19645751957 ps |
| T1111 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/174.otp_ctrl_parallel_lc_esc.3758576309 |
|
|
Sep 11 01:06:26 PM UTC 24 |
Sep 11 01:06:56 PM UTC 24 |
2125830666 ps |
| T106 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/249.otp_ctrl_init_fail.746708410 |
|
|
Sep 11 01:06:57 PM UTC 24 |
Sep 11 01:07:01 PM UTC 24 |
93288417 ps |
| T1112 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/255.otp_ctrl_init_fail.3894727891 |
|
|
Sep 11 01:06:57 PM UTC 24 |
Sep 11 01:07:01 PM UTC 24 |
229328207 ps |
| T1113 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/258.otp_ctrl_init_fail.1131462639 |
|
|
Sep 11 01:06:57 PM UTC 24 |
Sep 11 01:07:01 PM UTC 24 |
220819012 ps |
| T1114 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/254.otp_ctrl_init_fail.2695408329 |
|
|
Sep 11 01:06:57 PM UTC 24 |
Sep 11 01:07:01 PM UTC 24 |
393453703 ps |
| T1115 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/252.otp_ctrl_init_fail.32608826 |
|
|
Sep 11 01:06:57 PM UTC 24 |
Sep 11 01:07:02 PM UTC 24 |
359653057 ps |
| T1116 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/257.otp_ctrl_init_fail.2598876419 |
|
|
Sep 11 01:06:57 PM UTC 24 |
Sep 11 01:07:02 PM UTC 24 |
184668545 ps |
| T1117 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/261.otp_ctrl_init_fail.3884499645 |
|
|
Sep 11 01:06:57 PM UTC 24 |
Sep 11 01:07:02 PM UTC 24 |
119291439 ps |
| T1118 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/251.otp_ctrl_init_fail.4135589944 |
|
|
Sep 11 01:06:57 PM UTC 24 |
Sep 11 01:07:02 PM UTC 24 |
285459711 ps |
| T1119 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/250.otp_ctrl_init_fail.2178233724 |
|
|
Sep 11 01:06:57 PM UTC 24 |
Sep 11 01:07:02 PM UTC 24 |
154145509 ps |
| T1120 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/263.otp_ctrl_init_fail.3076873390 |
|
|
Sep 11 01:06:57 PM UTC 24 |
Sep 11 01:07:02 PM UTC 24 |
181927330 ps |
| T1121 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/291.otp_ctrl_init_fail.2219109171 |
|
|
Sep 11 01:06:58 PM UTC 24 |
Sep 11 01:07:02 PM UTC 24 |
264675531 ps |
| T1122 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/253.otp_ctrl_init_fail.3682333635 |
|
|
Sep 11 01:06:57 PM UTC 24 |
Sep 11 01:07:02 PM UTC 24 |
293735148 ps |
| T1123 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/264.otp_ctrl_init_fail.2597134333 |
|
|
Sep 11 01:06:57 PM UTC 24 |
Sep 11 01:07:02 PM UTC 24 |
132239672 ps |
| T1124 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/287.otp_ctrl_init_fail.2696048752 |
|
|
Sep 11 01:06:58 PM UTC 24 |
Sep 11 01:07:02 PM UTC 24 |
427540309 ps |
| T1125 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/267.otp_ctrl_init_fail.1945462423 |
|
|
Sep 11 01:06:57 PM UTC 24 |
Sep 11 01:07:02 PM UTC 24 |
117514664 ps |
| T1126 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/270.otp_ctrl_init_fail.4022961810 |
|
|
Sep 11 01:06:57 PM UTC 24 |
Sep 11 01:07:03 PM UTC 24 |
144453718 ps |
| T1127 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/275.otp_ctrl_init_fail.967014562 |
|
|
Sep 11 01:06:57 PM UTC 24 |
Sep 11 01:07:03 PM UTC 24 |
475618458 ps |
| T1128 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/284.otp_ctrl_init_fail.1810813145 |
|
|
Sep 11 01:06:58 PM UTC 24 |
Sep 11 01:07:03 PM UTC 24 |
233830155 ps |
| T1129 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/277.otp_ctrl_init_fail.2698439906 |
|
|
Sep 11 01:06:58 PM UTC 24 |
Sep 11 01:07:03 PM UTC 24 |
155503434 ps |
| T1130 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/256.otp_ctrl_init_fail.4095916442 |
|
|
Sep 11 01:06:57 PM UTC 24 |
Sep 11 01:07:03 PM UTC 24 |
155879538 ps |
| T1131 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/271.otp_ctrl_init_fail.3341833156 |
|
|
Sep 11 01:06:57 PM UTC 24 |
Sep 11 01:07:03 PM UTC 24 |
233632808 ps |
| T1132 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/259.otp_ctrl_init_fail.1427861441 |
|
|
Sep 11 01:06:57 PM UTC 24 |
Sep 11 01:07:03 PM UTC 24 |
168356542 ps |
| T1133 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/268.otp_ctrl_init_fail.2759673101 |
|
|
Sep 11 01:06:57 PM UTC 24 |
Sep 11 01:07:03 PM UTC 24 |
147413846 ps |
| T1134 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/269.otp_ctrl_init_fail.623330812 |
|
|
Sep 11 01:06:57 PM UTC 24 |
Sep 11 01:07:03 PM UTC 24 |
382874877 ps |
| T1135 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/272.otp_ctrl_init_fail.3805048870 |
|
|
Sep 11 01:06:57 PM UTC 24 |
Sep 11 01:07:03 PM UTC 24 |
1797122216 ps |
| T1136 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/276.otp_ctrl_init_fail.2348107265 |
|
|
Sep 11 01:06:57 PM UTC 24 |
Sep 11 01:07:03 PM UTC 24 |
239200923 ps |
| T1137 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/262.otp_ctrl_init_fail.678092046 |
|
|
Sep 11 01:06:57 PM UTC 24 |
Sep 11 01:07:03 PM UTC 24 |
528482014 ps |
| T1138 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/286.otp_ctrl_init_fail.4193589331 |
|
|
Sep 11 01:06:58 PM UTC 24 |
Sep 11 01:07:03 PM UTC 24 |
401051644 ps |
| T1139 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/260.otp_ctrl_init_fail.1516331964 |
|
|
Sep 11 01:06:57 PM UTC 24 |
Sep 11 01:07:03 PM UTC 24 |
590240161 ps |
| T104 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/265.otp_ctrl_init_fail.2733638500 |
|
|
Sep 11 01:06:57 PM UTC 24 |
Sep 11 01:07:03 PM UTC 24 |
209325734 ps |
| T1140 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/282.otp_ctrl_init_fail.4202531536 |
|
|
Sep 11 01:06:58 PM UTC 24 |
Sep 11 01:07:03 PM UTC 24 |
1858445877 ps |
| T1141 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/280.otp_ctrl_init_fail.2509966371 |
|
|
Sep 11 01:06:58 PM UTC 24 |
Sep 11 01:07:03 PM UTC 24 |
282036974 ps |
| T1142 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/281.otp_ctrl_init_fail.2635014170 |
|
|
Sep 11 01:06:58 PM UTC 24 |
Sep 11 01:07:03 PM UTC 24 |
124758147 ps |
| T1143 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/274.otp_ctrl_init_fail.1289703695 |
|
|
Sep 11 01:06:57 PM UTC 24 |
Sep 11 01:07:03 PM UTC 24 |
1751684871 ps |
| T1144 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/289.otp_ctrl_init_fail.3448930069 |
|
|
Sep 11 01:06:58 PM UTC 24 |
Sep 11 01:07:03 PM UTC 24 |
203306856 ps |
| T1145 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/283.otp_ctrl_init_fail.3989806622 |
|
|
Sep 11 01:06:58 PM UTC 24 |
Sep 11 01:07:03 PM UTC 24 |
95267460 ps |
| T1146 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/295.otp_ctrl_init_fail.116919226 |
|
|
Sep 11 01:06:58 PM UTC 24 |
Sep 11 01:07:04 PM UTC 24 |
243705364 ps |
| T107 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/279.otp_ctrl_init_fail.4052833621 |
|
|
Sep 11 01:06:58 PM UTC 24 |
Sep 11 01:07:04 PM UTC 24 |
208808886 ps |
| T1147 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/297.otp_ctrl_init_fail.1214790513 |
|
|
Sep 11 01:06:58 PM UTC 24 |
Sep 11 01:07:04 PM UTC 24 |
147629493 ps |
| T1148 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/294.otp_ctrl_init_fail.333052313 |
|
|
Sep 11 01:06:58 PM UTC 24 |
Sep 11 01:07:04 PM UTC 24 |
1852731416 ps |
| T1149 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/266.otp_ctrl_init_fail.753101022 |
|
|
Sep 11 01:06:57 PM UTC 24 |
Sep 11 01:07:04 PM UTC 24 |
676038356 ps |
| T1150 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/290.otp_ctrl_init_fail.1347022847 |
|
|
Sep 11 01:06:58 PM UTC 24 |
Sep 11 01:07:04 PM UTC 24 |
215201340 ps |
| T1151 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/273.otp_ctrl_init_fail.2411074412 |
|
|
Sep 11 01:06:57 PM UTC 24 |
Sep 11 01:07:04 PM UTC 24 |
2174353170 ps |
| T1152 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/288.otp_ctrl_init_fail.185554392 |
|
|
Sep 11 01:06:58 PM UTC 24 |
Sep 11 01:07:04 PM UTC 24 |
2155228209 ps |
| T1153 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/278.otp_ctrl_init_fail.56352755 |
|
|
Sep 11 01:06:58 PM UTC 24 |
Sep 11 01:07:05 PM UTC 24 |
2241604900 ps |
| T1154 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/296.otp_ctrl_init_fail.3536402878 |
|
|
Sep 11 01:06:58 PM UTC 24 |
Sep 11 01:07:05 PM UTC 24 |
302559167 ps |
| T1155 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/52.otp_ctrl_stress_all_with_rand_reset.2986113218 |
|
|
Sep 11 01:04:13 PM UTC 24 |
Sep 11 01:07:06 PM UTC 24 |
54732594711 ps |
| T1156 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/298.otp_ctrl_init_fail.3402621825 |
|
|
Sep 11 01:07:09 PM UTC 24 |
Sep 11 01:07:14 PM UTC 24 |
216741840 ps |
| T1157 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/299.otp_ctrl_init_fail.2419669301 |
|
|
Sep 11 01:07:09 PM UTC 24 |
Sep 11 01:07:14 PM UTC 24 |
179442829 ps |
| T231 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/72.otp_ctrl_stress_all_with_rand_reset.708942853 |
|
|
Sep 11 01:04:39 PM UTC 24 |
Sep 11 01:07:25 PM UTC 24 |
9418440050 ps |
| T1158 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/41.otp_ctrl_stress_all.86638476 |
|
|
Sep 11 01:03:08 PM UTC 24 |
Sep 11 01:07:45 PM UTC 24 |
23755693126 ps |
| T1159 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/90.otp_ctrl_stress_all_with_rand_reset.2532234490 |
|
|
Sep 11 01:05:10 PM UTC 24 |
Sep 11 01:08:22 PM UTC 24 |
11452602348 ps |
| T1160 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/default/37.otp_ctrl_stress_all.1026608676 |
|
|
Sep 11 01:02:34 PM UTC 24 |
Sep 11 01:08:32 PM UTC 24 |
37231172073 ps |
| T1161 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_mem_partial_access.1610350180 |
|
|
Sep 11 12:56:19 PM UTC 24 |
Sep 11 12:56:22 PM UTC 24 |
55586206 ps |
| T1162 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_intr_test.973949420 |
|
|
Sep 11 12:56:19 PM UTC 24 |
Sep 11 12:56:22 PM UTC 24 |
134047265 ps |
| T1163 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_mem_walk.1473587339 |
|
|
Sep 11 12:56:19 PM UTC 24 |
Sep 11 12:56:22 PM UTC 24 |
557131516 ps |
| T1164 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_tl_errors.3171311447 |
|
|
Sep 11 12:56:17 PM UTC 24 |
Sep 11 12:56:24 PM UTC 24 |
128872354 ps |
| T306 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_rw.2947481215 |
|
|
Sep 11 12:56:21 PM UTC 24 |
Sep 11 12:56:25 PM UTC 24 |
134410731 ps |
| T1165 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_intr_test.3598737158 |
|
|
Sep 11 12:56:23 PM UTC 24 |
Sep 11 12:56:26 PM UTC 24 |
517523088 ps |
| T303 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_same_csr_outstanding.3820955093 |
|
|
Sep 11 12:56:21 PM UTC 24 |
Sep 11 12:56:27 PM UTC 24 |
102769136 ps |
| T1166 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_mem_walk.4165896575 |
|
|
Sep 11 12:56:24 PM UTC 24 |
Sep 11 12:56:27 PM UTC 24 |
40854005 ps |
| T300 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_hw_reset.479130845 |
|
|
Sep 11 12:56:19 PM UTC 24 |
Sep 11 12:56:28 PM UTC 24 |
1595283101 ps |
| T301 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_aliasing.3610061304 |
|
|
Sep 11 12:56:21 PM UTC 24 |
Sep 11 12:56:28 PM UTC 24 |
99553708 ps |
| T1167 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_mem_partial_access.4258920086 |
|
|
Sep 11 12:56:25 PM UTC 24 |
Sep 11 12:56:28 PM UTC 24 |
37724588 ps |
| T1168 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_tl_errors.764837763 |
|
|
Sep 11 12:56:23 PM UTC 24 |
Sep 11 12:56:28 PM UTC 24 |
82177689 ps |
| T396 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_mem_rw_with_rand_reset.1291001818 |
|
|
Sep 11 12:56:23 PM UTC 24 |
Sep 11 12:56:28 PM UTC 24 |
168449773 ps |
| T302 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_bit_bash.3216108170 |
|
|
Sep 11 12:56:21 PM UTC 24 |
Sep 11 12:56:29 PM UTC 24 |
129506300 ps |
| T318 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_hw_reset.38279376 |
|
|
Sep 11 12:56:25 PM UTC 24 |
Sep 11 12:56:30 PM UTC 24 |
196881725 ps |
| T319 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_rw.2432181198 |
|
|
Sep 11 12:56:27 PM UTC 24 |
Sep 11 12:56:30 PM UTC 24 |
39119305 ps |
| T1169 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_mem_partial_access.4082565276 |
|
|
Sep 11 12:56:29 PM UTC 24 |
Sep 11 12:56:31 PM UTC 24 |
35971693 ps |
| T1170 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_intr_test.4076391543 |
|
|
Sep 11 12:56:29 PM UTC 24 |
Sep 11 12:56:31 PM UTC 24 |
39178728 ps |
| T1171 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_mem_walk.1281992802 |
|
|
Sep 11 12:56:29 PM UTC 24 |
Sep 11 12:56:32 PM UTC 24 |
134716345 ps |
| T331 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_same_csr_outstanding.206016608 |
|
|
Sep 11 12:56:27 PM UTC 24 |
Sep 11 12:56:32 PM UTC 24 |
75984911 ps |
| T332 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_aliasing.1066596270 |
|
|
Sep 11 12:56:27 PM UTC 24 |
Sep 11 12:56:32 PM UTC 24 |
843883837 ps |
| T320 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_rw.3193003495 |
|
|
Sep 11 12:56:29 PM UTC 24 |
Sep 11 12:56:32 PM UTC 24 |
72995258 ps |
| T321 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_hw_reset.1216928486 |
|
|
Sep 11 12:56:29 PM UTC 24 |
Sep 11 12:56:33 PM UTC 24 |
70378038 ps |
| T341 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_same_csr_outstanding.4096905396 |
|
|
Sep 11 12:56:30 PM UTC 24 |
Sep 11 12:56:33 PM UTC 24 |
108133216 ps |
| T297 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_tl_intg_err.1997158888 |
|
|
Sep 11 12:56:19 PM UTC 24 |
Sep 11 12:56:34 PM UTC 24 |
954409348 ps |
| T298 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_tl_intg_err.3200855130 |
|
|
Sep 11 12:56:23 PM UTC 24 |
Sep 11 12:56:35 PM UTC 24 |
1179442468 ps |
| T1172 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_mem_partial_access.2969295168 |
|
|
Sep 11 12:56:33 PM UTC 24 |
Sep 11 12:56:35 PM UTC 24 |
515049546 ps |
| T1173 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_mem_rw_with_rand_reset.1724032489 |
|
|
Sep 11 12:56:31 PM UTC 24 |
Sep 11 12:56:36 PM UTC 24 |
71904126 ps |
| T1174 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_mem_walk.3054550248 |
|
|
Sep 11 12:56:33 PM UTC 24 |
Sep 11 12:56:36 PM UTC 24 |
71401601 ps |
| T1175 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_intr_test.1394979881 |
|
|
Sep 11 12:56:33 PM UTC 24 |
Sep 11 12:56:36 PM UTC 24 |
51946299 ps |
| T1176 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_tl_errors.2290012673 |
|
|
Sep 11 12:56:29 PM UTC 24 |
Sep 11 12:56:36 PM UTC 24 |
95192349 ps |
| T1177 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_mem_rw_with_rand_reset.2442695508 |
|
|
Sep 11 12:56:29 PM UTC 24 |
Sep 11 12:56:37 PM UTC 24 |
338818928 ps |
| T344 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_bit_bash.570263596 |
|
|
Sep 11 12:56:27 PM UTC 24 |
Sep 11 12:56:37 PM UTC 24 |
838022079 ps |
| T322 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_rw.13485591 |
|
|
Sep 11 12:56:34 PM UTC 24 |
Sep 11 12:56:37 PM UTC 24 |
40166456 ps |
| T323 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_hw_reset.2627768472 |
|
|
Sep 11 12:56:33 PM UTC 24 |
Sep 11 12:56:37 PM UTC 24 |
95089109 ps |
| T342 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_same_csr_outstanding.3291839093 |
|
|
Sep 11 12:56:36 PM UTC 24 |
Sep 11 12:56:39 PM UTC 24 |
166846192 ps |
| T324 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_aliasing.3222538538 |
|
|
Sep 11 12:56:30 PM UTC 24 |
Sep 11 12:56:39 PM UTC 24 |
377924768 ps |
| T1178 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_mem_walk.835535724 |
|
|
Sep 11 12:56:37 PM UTC 24 |
Sep 11 12:56:40 PM UTC 24 |
68995297 ps |
| T1179 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_tl_errors.1539579698 |
|
|
Sep 11 12:56:33 PM UTC 24 |
Sep 11 12:56:40 PM UTC 24 |
169335327 ps |
| T1180 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_intr_test.466846814 |
|
|
Sep 11 12:56:37 PM UTC 24 |
Sep 11 12:56:40 PM UTC 24 |
127860078 ps |
| T1181 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_mem_partial_access.1275719578 |
|
|
Sep 11 12:56:37 PM UTC 24 |
Sep 11 12:56:40 PM UTC 24 |
71794570 ps |
| T1182 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_mem_rw_with_rand_reset.2535734194 |
|
|
Sep 11 12:56:36 PM UTC 24 |
Sep 11 12:56:41 PM UTC 24 |
109387628 ps |
| T1183 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_csr_hw_reset.1757540034 |
|
|
Sep 11 12:56:37 PM UTC 24 |
Sep 11 12:56:41 PM UTC 24 |
271569119 ps |
| T325 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_csr_rw.4112643424 |
|
|
Sep 11 12:56:38 PM UTC 24 |
Sep 11 12:56:42 PM UTC 24 |
72717867 ps |
| T1184 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_csr_mem_rw_with_rand_reset.3184291320 |
|
|
Sep 11 12:56:38 PM UTC 24 |
Sep 11 12:56:42 PM UTC 24 |
144101521 ps |
| T326 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_aliasing.4256072387 |
|
|
Sep 11 12:56:34 PM UTC 24 |
Sep 11 12:56:42 PM UTC 24 |
390533609 ps |
| T1185 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_intr_test.3519080881 |
|
|
Sep 11 12:56:40 PM UTC 24 |
Sep 11 12:56:43 PM UTC 24 |
78881127 ps |
| T1186 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_csr_aliasing.2479626590 |
|
|
Sep 11 12:56:38 PM UTC 24 |
Sep 11 12:56:43 PM UTC 24 |
94081925 ps |
| T343 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_same_csr_outstanding.466613424 |
|
|
Sep 11 12:56:38 PM UTC 24 |
Sep 11 12:56:44 PM UTC 24 |
147436420 ps |
| T1187 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_bit_bash.2511222803 |
|
|
Sep 11 12:56:34 PM UTC 24 |
Sep 11 12:56:44 PM UTC 24 |
341673036 ps |
| T333 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_csr_rw.2975697064 |
|
|
Sep 11 12:56:42 PM UTC 24 |
Sep 11 12:56:45 PM UTC 24 |
164797148 ps |
| T1188 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_tl_errors.2713057839 |
|
|
Sep 11 12:56:38 PM UTC 24 |
Sep 11 12:56:45 PM UTC 24 |
432701865 ps |
| T1189 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_bit_bash.2468457924 |
|
|
Sep 11 12:56:30 PM UTC 24 |
Sep 11 12:56:46 PM UTC 24 |
5615312127 ps |
| T1190 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_intr_test.3123843013 |
|
|
Sep 11 12:56:48 PM UTC 24 |
Sep 11 12:56:51 PM UTC 24 |
573523353 ps |
| T1191 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_tl_errors.541080463 |
|
|
Sep 11 12:56:36 PM UTC 24 |
Sep 11 12:56:46 PM UTC 24 |
172664303 ps |
| T1192 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_same_csr_outstanding.3036893643 |
|
|
Sep 11 12:56:42 PM UTC 24 |
Sep 11 12:56:47 PM UTC 24 |
948616831 ps |
| T1193 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_csr_mem_rw_with_rand_reset.3885915245 |
|
|
Sep 11 12:56:42 PM UTC 24 |
Sep 11 12:56:47 PM UTC 24 |
384965772 ps |
| T1194 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_intr_test.3071194445 |
|
|
Sep 11 12:56:43 PM UTC 24 |
Sep 11 12:56:47 PM UTC 24 |
81050303 ps |
| T299 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_tl_intg_err.1575736499 |
|
|
Sep 11 12:56:37 PM UTC 24 |
Sep 11 12:56:48 PM UTC 24 |
1216599749 ps |
| T334 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_csr_rw.945447158 |
|
|
Sep 11 12:56:44 PM UTC 24 |
Sep 11 12:56:48 PM UTC 24 |
40495563 ps |
| T1195 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_tl_errors.2914675360 |
|
|
Sep 11 12:56:42 PM UTC 24 |
Sep 11 12:56:48 PM UTC 24 |
237996649 ps |
| T1196 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_csr_mem_rw_with_rand_reset.1436000901 |
|
|
Sep 11 12:56:44 PM UTC 24 |
Sep 11 12:56:48 PM UTC 24 |
279714161 ps |
| T1197 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_same_csr_outstanding.459619555 |
|
|
Sep 11 12:56:44 PM UTC 24 |
Sep 11 12:56:48 PM UTC 24 |
150021797 ps |
| T1198 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_csr_bit_bash.2931499894 |
|
|
Sep 11 12:56:38 PM UTC 24 |
Sep 11 12:56:49 PM UTC 24 |
1061847344 ps |
| T1199 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_intr_test.3181492519 |
|
|
Sep 11 12:56:46 PM UTC 24 |
Sep 11 12:56:50 PM UTC 24 |
46377831 ps |
| T338 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_csr_rw.103395722 |
|
|
Sep 11 12:56:46 PM UTC 24 |
Sep 11 12:56:50 PM UTC 24 |
665876494 ps |
| T1200 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_tl_errors.768344511 |
|
|
Sep 11 12:56:44 PM UTC 24 |
Sep 11 12:56:50 PM UTC 24 |
2193111586 ps |
| T1201 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_same_csr_outstanding.3952364935 |
|
|
Sep 11 12:56:46 PM UTC 24 |
Sep 11 12:56:51 PM UTC 24 |
130151211 ps |
| T1202 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_csr_rw.974324077 |
|
|
Sep 11 12:56:48 PM UTC 24 |
Sep 11 12:56:52 PM UTC 24 |
85410049 ps |
| T1203 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_csr_mem_rw_with_rand_reset.961258447 |
|
|
Sep 11 12:56:48 PM UTC 24 |
Sep 11 12:56:52 PM UTC 24 |
138989419 ps |
| T305 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_tl_intg_err.4256142030 |
|
|
Sep 11 12:56:29 PM UTC 24 |
Sep 11 12:56:52 PM UTC 24 |
3132883639 ps |
| T1204 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_csr_mem_rw_with_rand_reset.603879753 |
|
|
Sep 11 12:56:46 PM UTC 24 |
Sep 11 12:56:52 PM UTC 24 |
103257371 ps |
| T1205 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_same_csr_outstanding.921907097 |
|
|
Sep 11 12:56:48 PM UTC 24 |
Sep 11 12:56:53 PM UTC 24 |
124007991 ps |
| T309 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_tl_intg_err.3840710367 |
|
|
Sep 11 12:56:40 PM UTC 24 |
Sep 11 12:56:53 PM UTC 24 |
1233463587 ps |
| T1206 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_intr_test.3424023464 |
|
|
Sep 11 12:56:51 PM UTC 24 |
Sep 11 12:56:54 PM UTC 24 |
122253976 ps |
| T1207 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_csr_rw.1210098656 |
|
|
Sep 11 12:56:51 PM UTC 24 |
Sep 11 12:56:54 PM UTC 24 |
43215871 ps |
| T1208 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_intr_test.2946851449 |
|
|
Sep 11 12:56:51 PM UTC 24 |
Sep 11 12:56:55 PM UTC 24 |
562688760 ps |
| T1209 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_csr_rw.4143675159 |
|
|
Sep 11 12:56:51 PM UTC 24 |
Sep 11 12:56:55 PM UTC 24 |
604404919 ps |
| T1210 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_same_csr_outstanding.150739102 |
|
|
Sep 11 12:56:51 PM UTC 24 |
Sep 11 12:56:55 PM UTC 24 |
265087218 ps |
| T1211 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_tl_errors.271485026 |
|
|
Sep 11 12:56:48 PM UTC 24 |
Sep 11 12:56:56 PM UTC 24 |
2767688523 ps |
| T339 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_csr_rw.4018851531 |
|
|
Sep 11 12:56:53 PM UTC 24 |
Sep 11 12:56:56 PM UTC 24 |
545106998 ps |
| T1212 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_intr_test.1274970963 |
|
|
Sep 11 12:56:53 PM UTC 24 |
Sep 11 12:56:57 PM UTC 24 |
79218869 ps |
| T1213 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_csr_mem_rw_with_rand_reset.584369350 |
|
|
Sep 11 12:56:53 PM UTC 24 |
Sep 11 12:56:57 PM UTC 24 |
1054443110 ps |
| T1214 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_tl_errors.59568768 |
|
|
Sep 11 12:56:51 PM UTC 24 |
Sep 11 12:56:57 PM UTC 24 |
76617960 ps |
| T1215 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_same_csr_outstanding.3015891173 |
|
|
Sep 11 12:56:53 PM UTC 24 |
Sep 11 12:56:57 PM UTC 24 |
44757507 ps |
| T307 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_tl_intg_err.4084396461 |
|
|
Sep 11 12:56:43 PM UTC 24 |
Sep 11 12:56:58 PM UTC 24 |
666179888 ps |
| T1216 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_same_csr_outstanding.4177005912 |
|
|
Sep 11 12:56:53 PM UTC 24 |
Sep 11 12:56:58 PM UTC 24 |
148947566 ps |
| T1217 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_csr_mem_rw_with_rand_reset.603066595 |
|
|
Sep 11 12:56:51 PM UTC 24 |
Sep 11 12:56:58 PM UTC 24 |
1718775512 ps |
| T1218 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_tl_errors.405433641 |
|
|
Sep 11 12:56:51 PM UTC 24 |
Sep 11 12:56:58 PM UTC 24 |
252779771 ps |
| T335 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_csr_rw.1642661358 |
|
|
Sep 11 12:56:56 PM UTC 24 |
Sep 11 12:56:59 PM UTC 24 |
126330979 ps |
| T1219 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_intr_test.204455600 |
|
|
Sep 11 12:56:56 PM UTC 24 |
Sep 11 12:56:59 PM UTC 24 |
66312242 ps |
| T1220 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_csr_mem_rw_with_rand_reset.3295289813 |
|
|
Sep 11 12:56:55 PM UTC 24 |
Sep 11 12:57:00 PM UTC 24 |
99914043 ps |
| T1221 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_tl_errors.2111114344 |
|
|
Sep 11 12:56:53 PM UTC 24 |
Sep 11 12:57:00 PM UTC 24 |
432868578 ps |
| T379 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_tl_intg_err.2912384076 |
|
|
Sep 11 12:56:33 PM UTC 24 |
Sep 11 12:57:00 PM UTC 24 |
1411704443 ps |
| T381 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_tl_intg_err.2445469439 |
|
|
Sep 11 12:56:48 PM UTC 24 |
Sep 11 12:57:01 PM UTC 24 |
2567867473 ps |
| T1222 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_tl_errors.2055412785 |
|
|
Sep 11 12:56:55 PM UTC 24 |
Sep 11 12:57:02 PM UTC 24 |
79178588 ps |
| T1223 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_csr_mem_rw_with_rand_reset.1085175845 |
|
|
Sep 11 12:56:58 PM UTC 24 |
Sep 11 12:57:02 PM UTC 24 |
203276003 ps |
| T1224 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_same_csr_outstanding.2650351947 |
|
|
Sep 11 12:56:58 PM UTC 24 |
Sep 11 12:57:02 PM UTC 24 |
70695058 ps |
| T1225 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_csr_rw.575935179 |
|
|
Sep 11 12:56:59 PM UTC 24 |
Sep 11 12:57:02 PM UTC 24 |
50104384 ps |
| T1226 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_intr_test.3995300292 |
|
|
Sep 11 12:56:59 PM UTC 24 |
Sep 11 12:57:02 PM UTC 24 |
576409378 ps |
| T1227 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_intr_test.3386121610 |
|
|
Sep 11 12:56:59 PM UTC 24 |
Sep 11 12:57:03 PM UTC 24 |
70019690 ps |
| T1228 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/38.otp_ctrl_intr_test.4119424828 |
|
|
Sep 11 12:57:16 PM UTC 24 |
Sep 11 12:57:18 PM UTC 24 |
146685067 ps |
| T380 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_tl_intg_err.1817178988 |
|
|
Sep 11 12:56:51 PM UTC 24 |
Sep 11 12:57:03 PM UTC 24 |
2849742431 ps |
| T1229 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_csr_mem_rw_with_rand_reset.3275253313 |
|
|
Sep 11 12:56:59 PM UTC 24 |
Sep 11 12:57:04 PM UTC 24 |
1801908013 ps |
| T1230 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_same_csr_outstanding.1597118422 |
|
|
Sep 11 12:57:01 PM UTC 24 |
Sep 11 12:57:05 PM UTC 24 |
88614197 ps |
| T340 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_csr_rw.1135739983 |
|
|
Sep 11 12:57:01 PM UTC 24 |
Sep 11 12:57:05 PM UTC 24 |
81763278 ps |
| T1231 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_intr_test.2151584334 |
|
|
Sep 11 12:57:03 PM UTC 24 |
Sep 11 12:57:06 PM UTC 24 |
141119288 ps |
| T1232 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_csr_rw.3086515008 |
|
|
Sep 11 12:57:03 PM UTC 24 |
Sep 11 12:57:06 PM UTC 24 |
37686007 ps |
| T1233 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_tl_errors.2871286208 |
|
|
Sep 11 12:56:59 PM UTC 24 |
Sep 11 12:57:06 PM UTC 24 |
119105186 ps |
| T1234 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_tl_errors.2521503034 |
|
|
Sep 11 12:57:01 PM UTC 24 |
Sep 11 12:57:06 PM UTC 24 |
992047875 ps |
| T1235 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_csr_mem_rw_with_rand_reset.3167863547 |
|
|
Sep 11 12:57:01 PM UTC 24 |
Sep 11 12:57:06 PM UTC 24 |
1026981206 ps |
| T1236 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_csr_mem_rw_with_rand_reset.3528866692 |
|
|
Sep 11 12:57:03 PM UTC 24 |
Sep 11 12:57:07 PM UTC 24 |
157468362 ps |
| T1237 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_intr_test.2198851094 |
|
|
Sep 11 12:57:04 PM UTC 24 |
Sep 11 12:57:07 PM UTC 24 |
38626167 ps |
| T1238 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_same_csr_outstanding.2887389359 |
|
|
Sep 11 12:56:59 PM UTC 24 |
Sep 11 12:57:07 PM UTC 24 |
1907877859 ps |
| T383 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_tl_intg_err.1671410851 |
|
|
Sep 11 12:56:56 PM UTC 24 |
Sep 11 12:57:07 PM UTC 24 |
709146434 ps |
| T336 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_csr_rw.3640867408 |
|
|
Sep 11 12:57:04 PM UTC 24 |
Sep 11 12:57:07 PM UTC 24 |
46585839 ps |
| T1239 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_same_csr_outstanding.2889954271 |
|
|
Sep 11 12:57:03 PM UTC 24 |
Sep 11 12:57:08 PM UTC 24 |
98410616 ps |
| T1240 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_tl_errors.374509759 |
|
|
Sep 11 12:56:58 PM UTC 24 |
Sep 11 12:57:08 PM UTC 24 |
179667960 ps |
| T1241 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_same_csr_outstanding.2285105158 |
|
|
Sep 11 12:57:04 PM UTC 24 |
Sep 11 12:57:08 PM UTC 24 |
98789673 ps |
| T1242 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_tl_errors.3619375929 |
|
|
Sep 11 12:57:04 PM UTC 24 |
Sep 11 12:57:09 PM UTC 24 |
109755788 ps |
| T384 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_tl_intg_err.3468025884 |
|
|
Sep 11 12:56:53 PM UTC 24 |
Sep 11 12:57:09 PM UTC 24 |
2628397941 ps |
| T1243 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_intr_test.2556693985 |
|
|
Sep 11 12:57:06 PM UTC 24 |
Sep 11 12:57:09 PM UTC 24 |
47085764 ps |
| T1244 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_csr_rw.2398693102 |
|
|
Sep 11 12:57:06 PM UTC 24 |
Sep 11 12:57:10 PM UTC 24 |
146942735 ps |
| T1245 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_csr_mem_rw_with_rand_reset.3396720712 |
|
|
Sep 11 12:57:05 PM UTC 24 |
Sep 11 12:57:10 PM UTC 24 |
104158739 ps |
| T1246 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_intr_test.624334836 |
|
|
Sep 11 12:57:08 PM UTC 24 |
Sep 11 12:57:11 PM UTC 24 |
149758912 ps |
| T1247 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_same_csr_outstanding.1433299381 |
|
|
Sep 11 12:57:06 PM UTC 24 |
Sep 11 12:57:11 PM UTC 24 |
73200587 ps |
| T337 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_csr_rw.3320504693 |
|
|
Sep 11 12:57:08 PM UTC 24 |
Sep 11 12:57:11 PM UTC 24 |
40155969 ps |
| T1248 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_csr_mem_rw_with_rand_reset.1127971942 |
|
|
Sep 11 12:57:07 PM UTC 24 |
Sep 11 12:57:12 PM UTC 24 |
215519016 ps |
| T1249 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_tl_errors.1972834258 |
|
|
Sep 11 12:57:06 PM UTC 24 |
Sep 11 12:57:13 PM UTC 24 |
77985664 ps |
| T1250 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_tl_intg_err.4240878752 |
|
|
Sep 11 12:57:02 PM UTC 24 |
Sep 11 12:57:13 PM UTC 24 |
644944202 ps |
| T1251 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/19.otp_ctrl_intr_test.929639955 |
|
|
Sep 11 12:57:10 PM UTC 24 |
Sep 11 12:57:13 PM UTC 24 |
158358101 ps |
| T1252 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/19.otp_ctrl_csr_rw.1305162952 |
|
|
Sep 11 12:57:10 PM UTC 24 |
Sep 11 12:57:13 PM UTC 24 |
59906437 ps |
| T304 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_tl_intg_err.1276972183 |
|
|
Sep 11 12:56:44 PM UTC 24 |
Sep 11 12:57:13 PM UTC 24 |
19850668542 ps |
| T1253 |
/workspaces/repo/scratch/os_regression_2024_09_10/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_same_csr_outstanding.3670483892 |
|
|
Sep 11 12:57:09 PM UTC 24 |
Sep 11 12:57:13 PM UTC 24 |
248473627 ps |