Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	4309139	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

2375940

1

T1

6

T2

638

T3

161

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	5636263	1			T1	4		T2	1724		T3	680
values[0x0]	494219	1			T1	7		T2	90		T3	90
values[0x1]	554597	1			T1	8		T2	81		T3	89

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	3173389	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

3511690

1

T1

9

T2

977

T3

380

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	37609	1			T4	15		T9	3		T5	9
valid_sources[0x01]	33045	1			T4	10		T9	6		T5	11
valid_sources[0x02]	20821	1			T4	6		T9	9		T5	5
valid_sources[0x03]	21061	1			T4	8		T9	8		T5	8
valid_sources[0x04]	21366	1			T4	11		T9	17		T5	11
valid_sources[0x05]	21139	1			T2	82		T4	6		T9	14
valid_sources[0x06]	30783	1			T4	19		T9	9		T5	8
valid_sources[0x07]	23693	1			T4	21		T9	13		T5	7
valid_sources[0x08]	29621	1			T4	7		T9	11		T5	12
valid_sources[0x09]	36297	1			T4	8		T9	5		T5	9
valid_sources[0x0a]	22108	1			T4	14		T9	6		T5	12
valid_sources[0x0b]	23737	1			T4	6		T9	11		T5	6
valid_sources[0x0c]	20573	1			T4	17		T9	15		T5	11
valid_sources[0x0d]	30207	1			T4	13		T5	7		T10	56
valid_sources[0x0e]	20097	1			T4	14		T9	7		T5	6
valid_sources[0x0f]	20880	1			T4	9		T9	5		T5	15
valid_sources[0x10]	21741	1			T4	14		T9	1		T5	7
valid_sources[0x11]	32511	1			T4	6		T9	10		T5	12
valid_sources[0x12]	24987	1			T4	6		T9	12		T5	9
valid_sources[0x13]	28753	1			T4	9		T9	7		T5	8
valid_sources[0x14]	21857	1			T4	13		T9	9		T5	1
valid_sources[0x15]	21006	1			T4	4		T9	15		T5	6
valid_sources[0x16]	23527	1			T4	18		T9	6		T5	10
valid_sources[0x17]	22763	1			T4	3		T9	6		T5	11
valid_sources[0x18]	23484	1			T4	10		T5	11		T10	12
valid_sources[0x19]	23547	1			T4	9		T9	3		T5	11
valid_sources[0x1a]	31812	1			T4	29		T9	8		T5	2
valid_sources[0x1b]	20660	1			T4	18		T9	15		T5	12
valid_sources[0x1c]	30200	1			T4	4		T9	5		T5	5
valid_sources[0x1d]	22571	1			T4	3		T9	17		T5	5
valid_sources[0x1e]	20753	1			T4	10		T9	20		T5	11
valid_sources[0x1f]	77453	1			T4	7		T9	17		T5	10
valid_sources[0x20]	21722	1			T4	11		T9	11		T5	16
valid_sources[0x21]	20625	1			T4	6		T9	8		T5	9
valid_sources[0x22]	21011	1			T4	7		T9	18		T5	6
valid_sources[0x23]	20177	1			T4	18		T9	9		T5	9
valid_sources[0x24]	22217	1			T4	18		T9	13		T5	15
valid_sources[0x25]	22551	1			T4	6		T9	5		T5	9
valid_sources[0x26]	28156	1			T4	7		T9	9		T5	8
valid_sources[0x27]	27388	1			T4	22		T9	7		T5	7
valid_sources[0x28]	25151	1			T4	10		T9	3		T5	7
valid_sources[0x29]	20664	1			T4	22		T9	2		T5	13
valid_sources[0x2a]	21584	1			T4	13		T9	15		T5	9
valid_sources[0x2b]	22811	1			T4	12		T9	9		T5	5
valid_sources[0x2c]	22676	1			T4	25		T9	12		T5	8
valid_sources[0x2d]	20090	1			T2	34		T4	12		T9	8
valid_sources[0x2e]	28329	1			T4	16		T9	10		T5	4
valid_sources[0x2f]	20704	1			T4	15		T9	8		T5	8
valid_sources[0x30]	125385	1			T4	20		T9	9		T5	8
valid_sources[0x31]	31058	1			T4	10		T9	11		T5	5
valid_sources[0x32]	20472	1			T4	4		T9	1		T5	6
valid_sources[0x33]	21368	1			T4	28		T9	13		T5	3
valid_sources[0x34]	36352	1			T4	11		T9	13		T5	8
valid_sources[0x35]	28099	1			T4	16		T9	12		T5	13
valid_sources[0x36]	20388	1			T4	11		T9	10		T5	15
valid_sources[0x37]	30859	1			T4	13		T9	16		T5	9
valid_sources[0x38]	21998	1			T4	27		T9	10		T5	7
valid_sources[0x39]	24024	1			T4	6		T9	20		T5	6
valid_sources[0x3a]	20797	1			T4	7		T9	5		T5	12
valid_sources[0x3b]	23881	1			T4	13		T9	9		T5	11
valid_sources[0x3c]	37053	1			T2	18		T4	20		T9	3
valid_sources[0x3d]	31372	1			T4	3		T9	10		T5	4
valid_sources[0x3e]	21869	1			T4	8		T9	7		T5	8
valid_sources[0x3f]	34520	1			T4	12		T9	11		T5	4
valid_sources[0x40]	23259	1			T4	10		T9	8		T5	3
valid_sources[0x41]	29902	1			T4	8		T9	8		T5	8
valid_sources[0x42]	20248	1			T4	11		T9	4		T5	10
valid_sources[0x43]	108979	1			T4	18		T9	9		T5	9
valid_sources[0x44]	33465	1			T4	11		T9	9		T5	3
valid_sources[0x45]	20405	1			T2	3		T4	10		T9	6
valid_sources[0x46]	33038	1			T4	12		T9	4		T5	7
valid_sources[0x47]	21061	1			T4	6		T9	7		T5	15
valid_sources[0x48]	36912	1			T4	3		T9	12		T5	13
valid_sources[0x49]	22171	1			T4	3		T9	11		T5	5
valid_sources[0x4a]	21549	1			T4	21		T9	2		T5	11
valid_sources[0x4b]	24971	1			T4	9		T9	6		T5	7
valid_sources[0x4c]	26249	1			T4	23		T9	10		T5	10
valid_sources[0x4d]	23813	1			T4	6		T9	9		T5	9
valid_sources[0x4e]	23472	1			T4	6		T9	1		T5	5
valid_sources[0x4f]	27239	1			T4	6		T9	1		T5	10
valid_sources[0x50]	20238	1			T2	14		T4	11		T9	7
valid_sources[0x51]	22244	1			T4	20		T9	4		T5	2
valid_sources[0x52]	41358	1			T4	10		T9	10		T5	12
valid_sources[0x53]	21284	1			T4	18		T9	6		T5	8
valid_sources[0x54]	20592	1			T2	206		T4	15		T9	13
valid_sources[0x55]	19601	1			T2	12		T4	20		T9	3
valid_sources[0x56]	23440	1			T4	14		T9	8		T5	10
valid_sources[0x57]	20817	1			T4	6		T9	14		T5	9
valid_sources[0x58]	32623	1			T4	10		T9	8		T5	9
valid_sources[0x59]	29307	1			T4	10		T9	10		T5	8
valid_sources[0x5a]	26869	1			T4	17		T9	4		T5	8
valid_sources[0x5b]	40380	1			T4	7		T9	12		T5	3
valid_sources[0x5c]	28341	1			T4	14		T9	13		T5	10
valid_sources[0x5d]	20165	1			T4	21		T9	13		T5	7
valid_sources[0x5e]	22446	1			T4	7		T9	15		T5	8
valid_sources[0x5f]	22516	1			T4	23		T9	7		T5	9
valid_sources[0x60]	21409	1			T4	16		T9	7		T5	9
valid_sources[0x61]	33488	1			T4	5		T9	11		T5	11
valid_sources[0x62]	20253	1			T4	10		T9	7		T5	8
valid_sources[0x63]	25223	1			T2	203		T4	20		T9	9
valid_sources[0x64]	21123	1			T4	7		T9	2		T5	10
valid_sources[0x65]	20714	1			T4	3		T9	10		T5	8
valid_sources[0x66]	20566	1			T4	8		T9	8		T5	5
valid_sources[0x67]	31794	1			T4	10		T9	18		T5	8
valid_sources[0x68]	23566	1			T4	6		T9	18		T5	6
valid_sources[0x69]	20355	1			T4	8		T9	7		T5	7
valid_sources[0x6a]	24013	1			T4	14		T9	2		T5	3
valid_sources[0x6b]	21541	1			T4	11		T9	10		T5	17
valid_sources[0x6c]	24981	1			T4	10		T9	1		T5	3
valid_sources[0x6d]	39787	1			T4	14		T9	14		T5	8
valid_sources[0x6e]	29625	1			T2	102		T4	12		T9	8
valid_sources[0x6f]	21198	1			T2	35		T4	18		T9	10
valid_sources[0x70]	20685	1			T4	10		T9	16		T5	8
valid_sources[0x71]	24069	1			T4	11		T9	11		T5	10
valid_sources[0x72]	24547	1			T4	4		T9	11		T5	6
valid_sources[0x73]	20108	1			T4	17		T9	20		T5	5
valid_sources[0x74]	92976	1			T4	2		T9	5		T5	6
valid_sources[0x75]	26886	1			T4	11		T9	8		T5	11
valid_sources[0x76]	21945	1			T4	13		T9	6		T5	6
valid_sources[0x77]	22387	1			T2	139		T4	10		T9	12
valid_sources[0x78]	21008	1			T3	859		T4	7		T9	5
valid_sources[0x79]	20041	1			T4	13		T9	5		T5	8
valid_sources[0x7a]	29193	1			T4	8		T9	8		T5	3
valid_sources[0x7b]	20224	1			T2	29		T4	14		T9	8
valid_sources[0x7c]	26648	1			T4	9		T9	12		T5	11
valid_sources[0x7d]	22497	1			T2	184		T4	13		T9	8
valid_sources[0x7e]	20344	1			T4	7		T9	15		T5	7
valid_sources[0x7f]	20218	1			T4	17		T9	1		T5	6
valid_sources[0x80]	20915	1			T4	11		T9	6		T5	5

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

1882877

1

T1

1

T2

547

T3

72

values[0x0]

all_enables

biggest_size

276198

1

T1

3

T2

51

T3

47

values[0x1]

all_enables

biggest_size

216865

1

T1

2

T2

40

T3

42

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	24384	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

486678

1

T2

20

T4

120

T9

120

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	164780	1			T2	10		T4	60		T9	60
values[0x0]	169318	1			T2	3		T4	27		T9	32
values[0x1]	176964	1			T2	7		T4	33		T9	28

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	13429	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

497633

1

T2

20

T4

120

T9

120

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	1925	1			T104	1		T19	1		T150	1
valid_sources[0x01]	1954	1			T141	1		T473	1		T384	4
valid_sources[0x02]	1962	1			T98	1		T407	3		T159	1
valid_sources[0x03]	2094	1			T5	1		T95	4		T126	1
valid_sources[0x04]	1790	1			T4	1		T5	2		T35	2
valid_sources[0x05]	1839	1			T9	1		T150	2		T20	1
valid_sources[0x06]	1943	1			T9	2		T95	1		T134	2
valid_sources[0x07]	2077	1			T4	1		T9	1		T35	1
valid_sources[0x08]	1769	1			T4	2		T9	1		T35	1
valid_sources[0x09]	1907	1			T4	1		T126	1		T173	1
valid_sources[0x0a]	1791	1			T4	1		T94	1		T100	1
valid_sources[0x0b]	1934	1			T2	2		T4	1		T9	3
valid_sources[0x0c]	1809	1			T51	6		T100	1		T150	2
valid_sources[0x0d]	2409	1			T35	1		T94	2		T95	4
valid_sources[0x0e]	1852	1			T2	1		T55	1		T123	1
valid_sources[0x0f]	1760	1			T5	1		T51	8		T95	1
valid_sources[0x10]	1989	1			T123	2		T100	5		T150	4
valid_sources[0x11]	2049	1			T95	1		T98	3		T150	2
valid_sources[0x12]	1928	1			T104	1		T159	1		T180	1
valid_sources[0x13]	1844	1			T97	15		T473	2		T159	1
valid_sources[0x14]	1887	1			T94	1		T95	1		T150	2
valid_sources[0x15]	2111	1			T51	3		T95	1		T100	2
valid_sources[0x16]	1947	1			T2	1		T35	1		T134	1
valid_sources[0x17]	1983	1			T2	1		T4	1		T94	9
valid_sources[0x18]	1796	1			T9	1		T95	1		T130	5
valid_sources[0x19]	1722	1			T95	1		T100	4		T150	2
valid_sources[0x1a]	2781	1			T4	1		T9	1		T98	2
valid_sources[0x1b]	2128	1			T4	1		T97	1		T55	1
valid_sources[0x1c]	1759	1			T123	1		T100	1		T150	1
valid_sources[0x1d]	1886	1			T94	1		T150	1		T235	1
valid_sources[0x1e]	2141	1			T4	1		T94	1		T100	1
valid_sources[0x1f]	2139	1			T55	1		T173	2		T135	2
valid_sources[0x20]	2034	1			T35	1		T98	3		T100	1
valid_sources[0x21]	1872	1			T9	2		T35	1		T94	3
valid_sources[0x22]	1794	1			T2	1		T35	1		T123	2
valid_sources[0x23]	2407	1			T9	8		T35	1		T150	1
valid_sources[0x24]	3011	1			T9	3		T35	1		T100	1
valid_sources[0x25]	1881	1			T35	1		T55	2		T98	2
valid_sources[0x26]	1922	1			T4	2		T104	1		T100	3
valid_sources[0x27]	1963	1			T134	2		T126	1		T106	49
valid_sources[0x28]	2035	1			T5	1		T123	2		T150	1
valid_sources[0x29]	2301	1			T4	1		T150	1		T235	1
valid_sources[0x2a]	1699	1			T100	1		T282	1		T135	1
valid_sources[0x2b]	1820	1			T4	1		T35	2		T55	1
valid_sources[0x2c]	1744	1			T150	1		T407	1		T262	2
valid_sources[0x2d]	1943	1			T4	1		T100	1		T19	1
valid_sources[0x2e]	2082	1			T97	5		T95	4		T141	1
valid_sources[0x2f]	1798	1			T97	2		T235	3		T52	1
valid_sources[0x30]	1865	1			T95	4		T100	2		T150	1
valid_sources[0x31]	2588	1			T95	1		T173	3		T159	1
valid_sources[0x32]	1724	1			T150	1		T173	1		T382	5
valid_sources[0x33]	1735	1			T9	5		T104	2		T141	1
valid_sources[0x34]	1709	1			T95	2		T123	1		T134	1
valid_sources[0x35]	1915	1			T12	20		T55	1		T19	2
valid_sources[0x36]	1832	1			T100	1		T141	1		T134	2
valid_sources[0x37]	2194	1			T35	1		T55	2		T235	2
valid_sources[0x38]	1906	1			T4	1		T55	1		T98	7
valid_sources[0x39]	1701	1			T95	1		T19	1		T126	1
valid_sources[0x3a]	1903	1			T9	2		T94	1		T100	3
valid_sources[0x3b]	2366	1			T35	1		T55	2		T94	3
valid_sources[0x3c]	1925	1			T35	2		T55	1		T104	1
valid_sources[0x3d]	2122	1			T55	2		T104	1		T126	1
valid_sources[0x3e]	1896	1			T9	4		T95	3		T100	1
valid_sources[0x3f]	1834	1			T55	1		T19	1		T150	1
valid_sources[0x40]	1625	1			T55	1		T95	1		T123	1
valid_sources[0x41]	2504	1			T94	2		T123	1		T100	1
valid_sources[0x42]	1815	1			T134	1		T126	1		T281	1
valid_sources[0x43]	1864	1			T126	1		T235	1		T21	2
valid_sources[0x44]	2030	1			T123	2		T100	2		T150	1
valid_sources[0x45]	1774	1			T9	4		T94	5		T100	1
valid_sources[0x46]	1825	1			T4	1		T95	1		T100	1
valid_sources[0x47]	2358	1			T4	1		T24	20		T95	1
valid_sources[0x48]	1935	1			T4	1		T130	1		T104	1
valid_sources[0x49]	1800	1			T35	1		T130	1		T100	2
valid_sources[0x4a]	1790	1			T4	6		T141	1		T150	1
valid_sources[0x4b]	1791	1			T4	1		T35	1		T131	15
valid_sources[0x4c]	1689	1			T35	3		T19	4		T126	2
valid_sources[0x4d]	1735	1			T4	3		T35	1		T94	2
valid_sources[0x4e]	1823	1			T4	1		T95	4		T130	5
valid_sources[0x4f]	2130	1			T5	2		T141	1		T134	1
valid_sources[0x50]	2222	1			T4	1		T55	1		T134	1
valid_sources[0x51]	1681	1			T4	1		T124	1		T19	4
valid_sources[0x52]	2014	1			T9	2		T97	1		T94	1
valid_sources[0x53]	2456	1			T4	1		T55	2		T173	4
valid_sources[0x54]	2074	1			T4	1		T9	6		T55	1
valid_sources[0x55]	1707	1			T5	1		T104	1		T19	1
valid_sources[0x56]	2152	1			T5	1		T124	7		T134	2
valid_sources[0x57]	1958	1			T104	2		T100	4		T141	1
valid_sources[0x58]	1882	1			T35	1		T94	1		T95	1
valid_sources[0x59]	1593	1			T130	2		T100	3		T126	1
valid_sources[0x5a]	2109	1			T55	1		T95	1		T123	2
valid_sources[0x5b]	1786	1			T35	1		T55	1		T126	1
valid_sources[0x5c]	1624	1			T35	2		T55	1		T126	1
valid_sources[0x5d]	2011	1			T4	1		T5	1		T55	1
valid_sources[0x5e]	1719	1			T94	1		T95	1		T98	2
valid_sources[0x5f]	1976	1			T55	1		T134	1		T173	2
valid_sources[0x60]	2213	1			T100	1		T173	2		T473	2
valid_sources[0x61]	2583	1			T4	1		T35	1		T95	2
valid_sources[0x62]	1916	1			T94	2		T123	2		T235	1
valid_sources[0x63]	1901	1			T95	2		T123	2		T100	1
valid_sources[0x64]	1796	1			T123	1		T100	1		T141	1
valid_sources[0x65]	2491	1			T35	1		T95	3		T124	3
valid_sources[0x66]	2111	1			T4	1		T100	3		T150	2
valid_sources[0x67]	2166	1			T104	1		T126	1		T7	1
valid_sources[0x68]	2023	1			T2	1		T4	1		T9	1
valid_sources[0x69]	2299	1			T130	2		T123	2		T180	1
valid_sources[0x6a]	2294	1			T4	1		T9	1		T173	1
valid_sources[0x6b]	1808	1			T94	2		T104	1		T19	1
valid_sources[0x6c]	2047	1			T55	1		T124	1		T100	2
valid_sources[0x6d]	1927	1			T124	11		T104	1		T126	1
valid_sources[0x6e]	2021	1			T2	1		T4	1		T5	1
valid_sources[0x6f]	1862	1			T100	1		T134	1		T281	1
valid_sources[0x70]	1847	1			T2	1		T9	1		T98	3
valid_sources[0x71]	1734	1			T4	1		T159	1		T7	1
valid_sources[0x72]	1782	1			T95	1		T100	1		T141	1
valid_sources[0x73]	1871	1			T4	1		T94	1		T124	3
valid_sources[0x74]	2298	1			T9	2		T100	2		T150	1
valid_sources[0x75]	2364	1			T19	1		T134	1		T126	1
valid_sources[0x76]	2041	1			T2	1		T9	10		T94	1
valid_sources[0x77]	2059	1			T55	1		T98	5		T100	1
valid_sources[0x78]	1973	1			T9	2		T5	1		T55	3
valid_sources[0x79]	1798	1			T134	1		T150	2		T180	1
valid_sources[0x7a]	1866	1			T55	1		T94	1		T100	1
valid_sources[0x7b]	2009	1			T19	3		T150	1		T126	2
valid_sources[0x7c]	1770	1			T55	2		T98	8		T123	2
valid_sources[0x7d]	2022	1			T123	1		T100	4		T19	4
valid_sources[0x7e]	2042	1			T104	1		T100	4		T159	1
valid_sources[0x7f]	1925	1			T130	3		T150	1		T126	1
valid_sources[0x80]	2071	1			T55	1		T123	1		T124	18

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

152265

1

T2

10

T4

60

T9

60

values[0x0]

all_enables

biggest_size

167918

1

T2

3

T4

27

T9

32

values[0x1]

all_enables

biggest_size

166495

1

T2

7

T4

33

T9

28