PRIM_ALERT Simulation Results

Sunday January 07 2024 20:02:41 UTC

GitHub Revision: `042415198f`

Branch: os_regression

Simulator: VCS

Build randomization enabled with --build-seed 94802583296605211241780338187580260959003534163885373932116464911642413280689

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	prim_alert_request_test	prim_async_alert	0.420s	11.176us	17	20	85.00
		prim_async_fatal_alert	0.430s	30.059us	15	20	75.00
		prim_sync_alert	0.380s	9.443us	14	20	70.00
		prim_sync_fatal_alert	0.440s	27.716us	14	20	70.00
V1	prim_alert_test	prim_async_alert	0.420s	11.176us	17	20	85.00
		prim_async_fatal_alert	0.430s	30.059us	15	20	75.00
		prim_sync_alert	0.380s	9.443us	14	20	70.00
		prim_sync_fatal_alert	0.440s	27.716us	14	20	70.00
V1	prim_alert_ping_request_test	prim_async_alert	0.420s	11.176us	17	20	85.00
		prim_async_fatal_alert	0.430s	30.059us	15	20	75.00
		prim_sync_alert	0.380s	9.443us	14	20	70.00
		prim_sync_fatal_alert	0.440s	27.716us	14	20	70.00
V1	prim_alert_integrity_errors_test	prim_async_alert	0.420s	11.176us	17	20	85.00
		prim_async_fatal_alert	0.430s	30.059us	15	20	75.00
		prim_sync_alert	0.380s	9.443us	14	20	70.00
		prim_sync_fatal_alert	0.440s	27.716us	14	20	70.00
V1		TOTAL			60	80	75.00
V2	prim_alert_init_trigger_test	prim_async_alert	0.420s	11.176us	17	20	85.00
		prim_async_fatal_alert	0.430s	30.059us	15	20	75.00
		prim_sync_alert	0.380s	9.443us	14	20	70.00
		prim_sync_fatal_alert	0.440s	27.716us	14	20	70.00
V2		TOTAL			0	0	--
V2S		TOTAL			0	0	--
V3	prim_alert_gate_sender_clk_rst_test	prim_alert_gate_sender_clk_rst_test			0	0	--
V3		TOTAL			0	0	--
		TOTAL			60	80	75.00

Testplan Progress

Items	Total	Written	Passing	Progress
V1	4	4	0	0.00
V3	1	0	0	0.00

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
95.19	100.00	100.00	100.00	89.29	95.83	86.05

Failure Buckets

Exit reason: Error: User command failed Job returned non-zero exit code has 16 failures:

Test prim_sync_fatal_alert has 6 failures.

1.prim_sync_fatal_alert.41404016862604087482872313463212829966429692417804096212787119040848992657995
Log /container/opentitan-public/scratch/os_regression/prim_alert-sim-vcs/1.prim_sync_fatal_alert/latest/run.log

  [make]: simulate
  cd /workspace/1.prim_sync_fatal_alert/latest && /workspace/sync_fatal_alert/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3001279051 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ= +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/sync_fatal_alert.vdb -cm_log /dev/null -cm_name 1.prim_sync_fatal_alert.3001279051
  Chronologic VCS simulator copyright 1991-2022
  Contains Synopsys proprietary information.
  Compiler version T-2022.06-SP2_Full64; Runtime version T-2022.06-SP2_Full64;  Jan  7 12:34 2024
  Cannot find license file.
  Make sure that you have a license file and that your
  LM_LICENSE_FILE is pointing to the right location.
  
  make: *** [/workspace/mnt/repo_top/hw/dv/tools/dvsim/sim.mk:175: simulate] Error 255

6.prim_sync_fatal_alert.70382195302937310789655562384515009204050104662086628563286890741892850095123
Log /container/opentitan-public/scratch/os_regression/prim_alert-sim-vcs/6.prim_sync_fatal_alert/latest/run.log

  [make]: simulate
  cd /workspace/6.prim_sync_fatal_alert/latest && /workspace/sync_fatal_alert/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1031509011 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ= +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/sync_fatal_alert.vdb -cm_log /dev/null -cm_name 6.prim_sync_fatal_alert.1031509011
  Chronologic VCS simulator copyright 1991-2022
  Contains Synopsys proprietary information.
  Compiler version T-2022.06-SP2_Full64; Runtime version T-2022.06-SP2_Full64;  Jan  7 12:34 2024
  Cannot find license file.
  Make sure that you have a license file and that your
  LM_LICENSE_FILE is pointing to the right location.
  
  make: *** [/workspace/mnt/repo_top/hw/dv/tools/dvsim/sim.mk:175: simulate] Error 255

... and 4 more failures.

Test prim_sync_alert has 5 failures.

2.prim_sync_alert.94656732275273039177264868628903212387793791606757609420323986830613859798237
Log /container/opentitan-public/scratch/os_regression/prim_alert-sim-vcs/2.prim_sync_alert/latest/run.log

  [make]: simulate
  cd /workspace/2.prim_sync_alert/latest && /workspace/sync_alert/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4215540957 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ= +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/sync_alert.vdb -cm_log /dev/null -cm_name 2.prim_sync_alert.4215540957
  Chronologic VCS simulator copyright 1991-2022
  Contains Synopsys proprietary information.
  Compiler version T-2022.06-SP2_Full64; Runtime version T-2022.06-SP2_Full64;  Jan  7 12:34 2024
  Cannot find license file.
  Make sure that you have a license file and that your
  LM_LICENSE_FILE is pointing to the right location.
  
  make: *** [/workspace/mnt/repo_top/hw/dv/tools/dvsim/sim.mk:175: simulate] Error 255

3.prim_sync_alert.76218788422720735514708349237324681458688026601652169773561498564837880802448
Log /container/opentitan-public/scratch/os_regression/prim_alert-sim-vcs/3.prim_sync_alert/latest/run.log

  [make]: simulate
  cd /workspace/3.prim_sync_alert/latest && /workspace/sync_alert/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2410065040 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ= +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/sync_alert.vdb -cm_log /dev/null -cm_name 3.prim_sync_alert.2410065040
  Chronologic VCS simulator copyright 1991-2022
  Contains Synopsys proprietary information.
  Compiler version T-2022.06-SP2_Full64; Runtime version T-2022.06-SP2_Full64;  Jan  7 12:34 2024
  Cannot find license file.
  Make sure that you have a license file and that your
  LM_LICENSE_FILE is pointing to the right location.
  
  make: *** [/workspace/mnt/repo_top/hw/dv/tools/dvsim/sim.mk:175: simulate] Error 255

... and 3 more failures.

Test prim_async_fatal_alert has 4 failures.

4.prim_async_fatal_alert.86487500785797688443142236305387541402731679247832108850013745797119260899133
Log /container/opentitan-public/scratch/os_regression/prim_alert-sim-vcs/4.prim_async_fatal_alert/latest/run.log

  [make]: simulate
  cd /workspace/4.prim_async_fatal_alert/latest && /workspace/fatal_alert/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2875340605 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ= +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/fatal_alert.vdb -cm_log /dev/null -cm_name 4.prim_async_fatal_alert.2875340605
  Chronologic VCS simulator copyright 1991-2022
  Contains Synopsys proprietary information.
  Compiler version T-2022.06-SP2_Full64; Runtime version T-2022.06-SP2_Full64;  Jan  7 12:34 2024
  Cannot find license file.
  Make sure that you have a license file and that your
  LM_LICENSE_FILE is pointing to the right location.
  
  make: *** [/workspace/mnt/repo_top/hw/dv/tools/dvsim/sim.mk:175: simulate] Error 255

9.prim_async_fatal_alert.92195035083896106908765950411061616937399376448395907822895765022077133023666
Log /container/opentitan-public/scratch/os_regression/prim_alert-sim-vcs/9.prim_async_fatal_alert/latest/run.log

  [make]: simulate
  cd /workspace/9.prim_async_fatal_alert/latest && /workspace/fatal_alert/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=271870386 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ= +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/fatal_alert.vdb -cm_log /dev/null -cm_name 9.prim_async_fatal_alert.271870386
  Chronologic VCS simulator copyright 1991-2022
  Contains Synopsys proprietary information.
  Compiler version T-2022.06-SP2_Full64; Runtime version T-2022.06-SP2_Full64;  Jan  7 12:33 2024
  Cannot find license file.
  Make sure that you have a license file and that your
  LM_LICENSE_FILE is pointing to the right location.
  
  make: *** [/workspace/mnt/repo_top/hw/dv/tools/dvsim/sim.mk:175: simulate] Error 255

... and 2 more failures.

Test prim_async_alert has 1 failures.

5.prim_async_alert.101863232666300107192207527816483126680359088401449385933696590755169354178163
Log /container/opentitan-public/scratch/os_regression/prim_alert-sim-vcs/5.prim_async_alert/latest/run.log

  [make]: simulate
  cd /workspace/5.prim_async_alert/latest && /workspace/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=278191731 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ= +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 5.prim_async_alert.278191731
  Chronologic VCS simulator copyright 1991-2022
  Contains Synopsys proprietary information.
  Compiler version T-2022.06-SP2_Full64; Runtime version T-2022.06-SP2_Full64;  Jan  7 12:33 2024
  Cannot find license file.
  Make sure that you have a license file and that your
  LM_LICENSE_FILE is pointing to the right location.
  
  make: *** [/workspace/mnt/repo_top/hw/dv/tools/dvsim/sim.mk:175: simulate] Error 255

Job prim_alert-sim-vcs_run_sync_alert killed due to: Exit reason: User job exceeded runlimit: User job timed out has 1 failures:
- Test prim_sync_alert has 1 failures.
  - 1.prim_sync_alert.9888399399223081432856035408231425526364853207693249491970162427568216431854
    Log /container/opentitan-public/scratch/os_regression/prim_alert-sim-vcs/1.prim_sync_alert/latest/run.log
```
  Job ID: smart:dd417188-a3a3-4800-8034-f64b2f2206ce
```

Offending '$rose(alert_tx_o.alert_p)' has 1 failures:

Test prim_async_alert has 1 failures.

8.prim_async_alert.76794890360175051004013127874337970371619775128518618206265280921751622408487
Line 260, in log /container/opentitan-public/scratch/os_regression/prim_alert-sim-vcs/8.prim_async_alert/latest/run.log

      Offending '$rose(alert_tx_o.alert_p)'
  UVM_ERROR ../src/lowrisc_prim_alert_0/rtl/prim_alert_sender.sv(328) @ 6160000: reporter [ASSERT FAILED] PingHs_A
  [prim_alert_seq] Ping request sequence[0] finished!
  [prim_alert_seq] Ping request sequence[1] finished!
  [prim_alert_seq] Ping request sequence[2] finished!

Job prim_alert-sim-vcs_run_default killed due to: Exit reason: User job exceeded runlimit: User job timed out has 1 failures:
- Test prim_async_alert has 1 failures.
  - 16.prim_async_alert.56049924392050079012180673398433385261137335286127563764670633857057736761694
    Log /container/opentitan-public/scratch/os_regression/prim_alert-sim-vcs/16.prim_async_alert/latest/run.log
```
  Job ID: smart:3e69a56c-3f0e-43ae-bdac-6a92d557319a
```
Job prim_alert-sim-vcs_run_fatal_alert killed due to: Exit reason: User job exceeded runlimit: User job timed out has 1 failures:
- Test prim_async_fatal_alert has 1 failures.
  - 16.prim_async_fatal_alert.25492750862748351025286307787237178417316741244713947234701912536626687376998
    Log /container/opentitan-public/scratch/os_regression/prim_alert-sim-vcs/16.prim_async_fatal_alert/latest/run.log
```
  Job ID: smart:5668cd1d-5b31-4f1e-b847-c5804719ba7c
```