| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
| 92.29 | 95.41 | 87.80 | 100.00 | 96.43 | 88.89 | 85.19 |
| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | ||||||||
| TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | NAME |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 87.33 | 87.33 | 92.66 | 92.66 | 85.37 | 85.37 | 100.00 | 100.00 | 78.57 | 78.57 | 82.22 | 82.22 | 85.19 | 85.19 | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/5.prim_esc_test.4195192007 |
| 89.45 | 2.12 | 93.58 | 0.92 | 87.80 | 2.44 | 100.00 | 0.00 | 85.71 | 7.14 | 84.44 | 2.22 | 85.19 | 0.00 | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/4.prim_esc_test.4044676116 |
| 91.17 | 1.71 | 94.50 | 0.92 | 87.80 | 0.00 | 100.00 | 0.00 | 92.86 | 7.14 | 86.67 | 2.22 | 85.19 | 0.00 | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/0.prim_esc_test.45895792 |
| 92.29 | 1.12 | 95.41 | 0.92 | 87.80 | 0.00 | 100.00 | 0.00 | 96.43 | 3.57 | 88.89 | 2.22 | 85.19 | 0.00 | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/10.prim_esc_test.1798881147 |
| Name |
|---|
| /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/1.prim_esc_test.2400351870 |
| /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/11.prim_esc_test.761919545 |
| /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/12.prim_esc_test.2487378335 |
| /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/13.prim_esc_test.3828166177 |
| /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/14.prim_esc_test.3464054463 |
| /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/15.prim_esc_test.2426773281 |
| /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/16.prim_esc_test.2931868197 |
| /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/17.prim_esc_test.3737361816 |
| /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/18.prim_esc_test.1959644820 |
| /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/19.prim_esc_test.3901906321 |
| /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/2.prim_esc_test.3297195198 |
| /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/3.prim_esc_test.1801518888 |
| /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/6.prim_esc_test.1558394274 |
| /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/7.prim_esc_test.3485908566 |
| /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/8.prim_esc_test.3913667267 |
| /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/9.prim_esc_test.3795153757 |
| TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
|---|---|---|---|---|---|---|
| T1 | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/0.prim_esc_test.45895792 | Aug 21 01:52:19 AM UTC 24 | Aug 21 01:52:21 AM UTC 24 | 4303800 ps | ||
| T2 | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/1.prim_esc_test.2400351870 | Aug 21 01:52:20 AM UTC 24 | Aug 21 01:52:22 AM UTC 24 | 4972725 ps | ||
| T3 | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/2.prim_esc_test.3297195198 | Aug 21 01:52:21 AM UTC 24 | Aug 21 01:52:23 AM UTC 24 | 4883738 ps | ||
| T6 | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/3.prim_esc_test.1801518888 | Aug 21 01:52:23 AM UTC 24 | Aug 21 01:52:24 AM UTC 24 | 5044545 ps | ||
| T10 | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/4.prim_esc_test.4044676116 | Aug 21 01:52:24 AM UTC 24 | Aug 21 01:52:25 AM UTC 24 | 5266708 ps | ||
| T7 | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/5.prim_esc_test.4195192007 | Aug 21 01:52:24 AM UTC 24 | Aug 21 01:52:25 AM UTC 24 | 5517383 ps | ||
| T8 | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/6.prim_esc_test.1558394274 | Aug 21 01:52:25 AM UTC 24 | Aug 21 01:52:26 AM UTC 24 | 5289499 ps | ||
| T15 | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/7.prim_esc_test.3485908566 | Aug 21 01:52:25 AM UTC 24 | Aug 21 01:52:27 AM UTC 24 | 4735282 ps | ||
| T11 | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/9.prim_esc_test.3795153757 | Aug 21 01:52:26 AM UTC 24 | Aug 21 01:52:27 AM UTC 24 | 4482345 ps | ||
| T9 | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/8.prim_esc_test.3913667267 | Aug 21 01:52:26 AM UTC 24 | Aug 21 01:52:28 AM UTC 24 | 4403133 ps | ||
| T4 | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/10.prim_esc_test.1798881147 | Aug 21 01:52:26 AM UTC 24 | Aug 21 01:52:28 AM UTC 24 | 4590965 ps | ||
| T13 | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/11.prim_esc_test.761919545 | Aug 21 01:52:27 AM UTC 24 | Aug 21 01:52:29 AM UTC 24 | 4601240 ps | ||
| T16 | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/13.prim_esc_test.3828166177 | Aug 21 01:52:27 AM UTC 24 | Aug 21 01:52:29 AM UTC 24 | 4876054 ps | ||
| T17 | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/12.prim_esc_test.2487378335 | Aug 21 01:52:27 AM UTC 24 | Aug 21 01:52:29 AM UTC 24 | 5109011 ps | ||
| T14 | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/14.prim_esc_test.3464054463 | Aug 21 01:52:28 AM UTC 24 | Aug 21 01:52:30 AM UTC 24 | 4729051 ps | ||
| T18 | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/15.prim_esc_test.2426773281 | Aug 21 01:52:28 AM UTC 24 | Aug 21 01:52:30 AM UTC 24 | 5099326 ps | ||
| T5 | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/16.prim_esc_test.2931868197 | Aug 21 01:52:28 AM UTC 24 | Aug 21 01:52:31 AM UTC 24 | 5040259 ps | ||
| T19 | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/18.prim_esc_test.1959644820 | Aug 21 01:52:28 AM UTC 24 | Aug 21 01:52:31 AM UTC 24 | 5069101 ps | ||
| T12 | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/17.prim_esc_test.3737361816 | Aug 21 01:52:28 AM UTC 24 | Aug 21 01:52:31 AM UTC 24 | 4956755 ps | ||
| T20 | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/19.prim_esc_test.3901906321 | Aug 21 01:52:29 AM UTC 24 | Aug 21 01:52:32 AM UTC 24 | 5381459 ps |
| Test location | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/5.prim_esc_test.4195192007 |
| Short name | T7 |
| Test name | |
| Test status | |
| Simulation time | 5517383 ps |
| CPU time | 0.42 seconds |
| Started | Aug 21 01:52:24 AM UTC 24 |
| Finished | Aug 21 01:52:25 AM UTC 24 |
| Peak memory | 156080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM _VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/lowrisc/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=4195192007 -assert nopostproc +UVM_TESTN AME= +UVM_TEST_SEQ= +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim _esc-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.prim_esc_test.4195192007 |
| Directory | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/5.prim_esc_test/latest |
| Test location | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/4.prim_esc_test.4044676116 |
| Short name | T10 |
| Test name | |
| Test status | |
| Simulation time | 5266708 ps |
| CPU time | 0.41 seconds |
| Started | Aug 21 01:52:24 AM UTC 24 |
| Finished | Aug 21 01:52:25 AM UTC 24 |
| Peak memory | 156080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM _VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/lowrisc/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=4044676116 -assert nopostproc +UVM_TESTN AME= +UVM_TEST_SEQ= +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim _esc-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.prim_esc_test.4044676116 |
| Directory | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/4.prim_esc_test/latest |
| Test location | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/0.prim_esc_test.45895792 |
| Short name | T1 |
| Test name | |
| Test status | |
| Simulation time | 4303800 ps |
| CPU time | 0.47 seconds |
| Started | Aug 21 01:52:19 AM UTC 24 |
| Finished | Aug 21 01:52:21 AM UTC 24 |
| Peak memory | 156148 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM _VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/lowrisc/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=45895792 -assert nopostproc +UVM_TESTNAM E= +UVM_TEST_SEQ= +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_e sc-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.prim_esc_test.45895792 |
| Directory | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/0.prim_esc_test/latest |
| Test location | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/10.prim_esc_test.1798881147 |
| Short name | T4 |
| Test name | |
| Test status | |
| Simulation time | 4590965 ps |
| CPU time | 0.47 seconds |
| Started | Aug 21 01:52:26 AM UTC 24 |
| Finished | Aug 21 01:52:28 AM UTC 24 |
| Peak memory | 156080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM _VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/lowrisc/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1798881147 -assert nopostproc +UVM_TESTN AME= +UVM_TEST_SEQ= +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim _esc-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.prim_esc_test.1798881147 |
| Directory | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/10.prim_esc_test/latest |
| Test location | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/1.prim_esc_test.2400351870 |
| Short name | T2 |
| Test name | |
| Test status | |
| Simulation time | 4972725 ps |
| CPU time | 0.4 seconds |
| Started | Aug 21 01:52:20 AM UTC 24 |
| Finished | Aug 21 01:52:22 AM UTC 24 |
| Peak memory | 156080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM _VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/lowrisc/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2400351870 -assert nopostproc +UVM_TESTN AME= +UVM_TEST_SEQ= +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim _esc-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.prim_esc_test.2400351870 |
| Directory | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/1.prim_esc_test/latest |
| Test location | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/11.prim_esc_test.761919545 |
| Short name | T13 |
| Test name | |
| Test status | |
| Simulation time | 4601240 ps |
| CPU time | 0.46 seconds |
| Started | Aug 21 01:52:27 AM UTC 24 |
| Finished | Aug 21 01:52:29 AM UTC 24 |
| Peak memory | 156084 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM _VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/lowrisc/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=761919545 -assert nopostproc +UVM_TESTNA ME= +UVM_TEST_SEQ= +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_ esc-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.prim_esc_test.761919545 |
| Directory | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/11.prim_esc_test/latest |
| Test location | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/12.prim_esc_test.2487378335 |
| Short name | T17 |
| Test name | |
| Test status | |
| Simulation time | 5109011 ps |
| CPU time | 0.49 seconds |
| Started | Aug 21 01:52:27 AM UTC 24 |
| Finished | Aug 21 01:52:29 AM UTC 24 |
| Peak memory | 156080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM _VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/lowrisc/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2487378335 -assert nopostproc +UVM_TESTN AME= +UVM_TEST_SEQ= +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim _esc-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.prim_esc_test.2487378335 |
| Directory | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/12.prim_esc_test/latest |
| Test location | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/13.prim_esc_test.3828166177 |
| Short name | T16 |
| Test name | |
| Test status | |
| Simulation time | 4876054 ps |
| CPU time | 0.46 seconds |
| Started | Aug 21 01:52:27 AM UTC 24 |
| Finished | Aug 21 01:52:29 AM UTC 24 |
| Peak memory | 156080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM _VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/lowrisc/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3828166177 -assert nopostproc +UVM_TESTN AME= +UVM_TEST_SEQ= +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim _esc-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.prim_esc_test.3828166177 |
| Directory | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/13.prim_esc_test/latest |
| Test location | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/14.prim_esc_test.3464054463 |
| Short name | T14 |
| Test name | |
| Test status | |
| Simulation time | 4729051 ps |
| CPU time | 0.42 seconds |
| Started | Aug 21 01:52:28 AM UTC 24 |
| Finished | Aug 21 01:52:30 AM UTC 24 |
| Peak memory | 156088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM _VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/lowrisc/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3464054463 -assert nopostproc +UVM_TESTN AME= +UVM_TEST_SEQ= +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim _esc-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.prim_esc_test.3464054463 |
| Directory | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/14.prim_esc_test/latest |
| Test location | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/15.prim_esc_test.2426773281 |
| Short name | T18 |
| Test name | |
| Test status | |
| Simulation time | 5099326 ps |
| CPU time | 0.43 seconds |
| Started | Aug 21 01:52:28 AM UTC 24 |
| Finished | Aug 21 01:52:30 AM UTC 24 |
| Peak memory | 156080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM _VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/lowrisc/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2426773281 -assert nopostproc +UVM_TESTN AME= +UVM_TEST_SEQ= +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim _esc-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.prim_esc_test.2426773281 |
| Directory | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/15.prim_esc_test/latest |
| Test location | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/16.prim_esc_test.2931868197 |
| Short name | T5 |
| Test name | |
| Test status | |
| Simulation time | 5040259 ps |
| CPU time | 0.39 seconds |
| Started | Aug 21 01:52:28 AM UTC 24 |
| Finished | Aug 21 01:52:31 AM UTC 24 |
| Peak memory | 156080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM _VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/lowrisc/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=2931868197 -assert nopostproc +UVM_TESTN AME= +UVM_TEST_SEQ= +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim _esc-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.prim_esc_test.2931868197 |
| Directory | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/16.prim_esc_test/latest |
| Test location | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/17.prim_esc_test.3737361816 |
| Short name | T12 |
| Test name | |
| Test status | |
| Simulation time | 4956755 ps |
| CPU time | 0.49 seconds |
| Started | Aug 21 01:52:28 AM UTC 24 |
| Finished | Aug 21 01:52:31 AM UTC 24 |
| Peak memory | 156080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM _VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/lowrisc/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3737361816 -assert nopostproc +UVM_TESTN AME= +UVM_TEST_SEQ= +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim _esc-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.prim_esc_test.3737361816 |
| Directory | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/17.prim_esc_test/latest |
| Test location | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/18.prim_esc_test.1959644820 |
| Short name | T19 |
| Test name | |
| Test status | |
| Simulation time | 5069101 ps |
| CPU time | 0.43 seconds |
| Started | Aug 21 01:52:28 AM UTC 24 |
| Finished | Aug 21 01:52:31 AM UTC 24 |
| Peak memory | 156084 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM _VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/lowrisc/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1959644820 -assert nopostproc +UVM_TESTN AME= +UVM_TEST_SEQ= +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim _esc-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.prim_esc_test.1959644820 |
| Directory | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/18.prim_esc_test/latest |
| Test location | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/19.prim_esc_test.3901906321 |
| Short name | T20 |
| Test name | |
| Test status | |
| Simulation time | 5381459 ps |
| CPU time | 0.46 seconds |
| Started | Aug 21 01:52:29 AM UTC 24 |
| Finished | Aug 21 01:52:32 AM UTC 24 |
| Peak memory | 156088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM _VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/lowrisc/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3901906321 -assert nopostproc +UVM_TESTN AME= +UVM_TEST_SEQ= +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim _esc-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.prim_esc_test.3901906321 |
| Directory | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/19.prim_esc_test/latest |
| Test location | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/2.prim_esc_test.3297195198 |
| Short name | T3 |
| Test name | |
| Test status | |
| Simulation time | 4883738 ps |
| CPU time | 0.45 seconds |
| Started | Aug 21 01:52:21 AM UTC 24 |
| Finished | Aug 21 01:52:23 AM UTC 24 |
| Peak memory | 156080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM _VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/lowrisc/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3297195198 -assert nopostproc +UVM_TESTN AME= +UVM_TEST_SEQ= +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim _esc-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.prim_esc_test.3297195198 |
| Directory | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/2.prim_esc_test/latest |
| Test location | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/3.prim_esc_test.1801518888 |
| Short name | T6 |
| Test name | |
| Test status | |
| Simulation time | 5044545 ps |
| CPU time | 0.46 seconds |
| Started | Aug 21 01:52:23 AM UTC 24 |
| Finished | Aug 21 01:52:24 AM UTC 24 |
| Peak memory | 156076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM _VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/lowrisc/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1801518888 -assert nopostproc +UVM_TESTN AME= +UVM_TEST_SEQ= +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim _esc-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.prim_esc_test.1801518888 |
| Directory | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/3.prim_esc_test/latest |
| Test location | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/6.prim_esc_test.1558394274 |
| Short name | T8 |
| Test name | |
| Test status | |
| Simulation time | 5289499 ps |
| CPU time | 0.43 seconds |
| Started | Aug 21 01:52:25 AM UTC 24 |
| Finished | Aug 21 01:52:26 AM UTC 24 |
| Peak memory | 156080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM _VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/lowrisc/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=1558394274 -assert nopostproc +UVM_TESTN AME= +UVM_TEST_SEQ= +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim _esc-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.prim_esc_test.1558394274 |
| Directory | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/6.prim_esc_test/latest |
| Test location | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/7.prim_esc_test.3485908566 |
| Short name | T15 |
| Test name | |
| Test status | |
| Simulation time | 4735282 ps |
| CPU time | 0.45 seconds |
| Started | Aug 21 01:52:25 AM UTC 24 |
| Finished | Aug 21 01:52:27 AM UTC 24 |
| Peak memory | 156080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM _VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/lowrisc/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3485908566 -assert nopostproc +UVM_TESTN AME= +UVM_TEST_SEQ= +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim _esc-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.prim_esc_test.3485908566 |
| Directory | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/7.prim_esc_test/latest |
| Test location | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/8.prim_esc_test.3913667267 |
| Short name | T9 |
| Test name | |
| Test status | |
| Simulation time | 4403133 ps |
| CPU time | 0.48 seconds |
| Started | Aug 21 01:52:26 AM UTC 24 |
| Finished | Aug 21 01:52:28 AM UTC 24 |
| Peak memory | 156080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM _VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/lowrisc/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3913667267 -assert nopostproc +UVM_TESTN AME= +UVM_TEST_SEQ= +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim _esc-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.prim_esc_test.3913667267 |
| Directory | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/8.prim_esc_test/latest |
| Test location | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/coverage/default/9.prim_esc_test.3795153757 |
| Short name | T11 |
| Test name | |
| Test status | |
| Simulation time | 4482345 ps |
| CPU time | 0.48 seconds |
| Started | Aug 21 01:52:26 AM UTC 24 |
| Finished | Aug 21 01:52:27 AM UTC 24 |
| Peak memory | 156080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM _VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/lowrisc/opentitan/hw/dv/tools/sim.tcl +ntb_random_seed=3795153757 -assert nopostproc +UVM_TESTN AME= +UVM_TEST_SEQ= +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim _esc-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.prim_esc_test.3795153757 |
| Directory | /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/prim_esc-sim-vcs/9.prim_esc_test/latest |
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |