Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERT
98.31 100.00 96.55 100.00 100.00 95.00


Total tests in report: 200
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
87.31 87.31 100.00 100.00 96.55 96.55 100.00 100.00 100.00 100.00 40.00 40.00 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/0.prim_lfsr_gal_smoke.1369234515
95.31 8.00 100.00 0.00 96.55 0.00 100.00 0.00 100.00 0.00 80.00 40.00 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/0.prim_lfsr_gal_test.601449694
96.81 1.50 100.00 0.00 96.55 0.00 100.00 0.00 100.00 0.00 87.50 7.50 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/0.prim_lfsr_fib_test.3831260964
98.31 1.50 100.00 0.00 96.55 0.00 100.00 0.00 100.00 0.00 95.00 7.50 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/0.prim_lfsr_fib_smoke.2138039423

Tests that do not contribute to grading

Name
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/1.prim_lfsr_fib_test.4217325130
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/10.prim_lfsr_fib_test.699137544
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/11.prim_lfsr_fib_test.2959171260
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/12.prim_lfsr_fib_test.4072273165
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/13.prim_lfsr_fib_test.448932440
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/14.prim_lfsr_fib_test.1161023524
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/15.prim_lfsr_fib_test.2969272793
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/16.prim_lfsr_fib_test.1381288480
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/17.prim_lfsr_fib_test.4151138503
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/18.prim_lfsr_fib_test.3996585562
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/19.prim_lfsr_fib_test.2114233796
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/2.prim_lfsr_fib_test.2536964676
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/20.prim_lfsr_fib_test.876434121
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/21.prim_lfsr_fib_test.2802352256
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/22.prim_lfsr_fib_test.1499948959
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/23.prim_lfsr_fib_test.3899203226
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/24.prim_lfsr_fib_test.2693593597
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/25.prim_lfsr_fib_test.1356383821
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/26.prim_lfsr_fib_test.4090493511
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/27.prim_lfsr_fib_test.38068917
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/28.prim_lfsr_fib_test.521138392
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/29.prim_lfsr_fib_test.512112383
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/3.prim_lfsr_fib_test.902421633
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/30.prim_lfsr_fib_test.1750655566
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/31.prim_lfsr_fib_test.3971939734
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/32.prim_lfsr_fib_test.1727633964
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/33.prim_lfsr_fib_test.1680026636
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/34.prim_lfsr_fib_test.1449698089
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/35.prim_lfsr_fib_test.2386463987
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/36.prim_lfsr_fib_test.1666407162
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/37.prim_lfsr_fib_test.4053547417
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/38.prim_lfsr_fib_test.798893955
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/39.prim_lfsr_fib_test.586068524
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/4.prim_lfsr_fib_test.103936925
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/40.prim_lfsr_fib_test.2657480302
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/41.prim_lfsr_fib_test.3072590056
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/42.prim_lfsr_fib_test.2513852974
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/43.prim_lfsr_fib_test.1722505726
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/44.prim_lfsr_fib_test.3396063751
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/45.prim_lfsr_fib_test.3823096467
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/46.prim_lfsr_fib_test.1962180188
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/47.prim_lfsr_fib_test.352587971
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/48.prim_lfsr_fib_test.2676021589
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/49.prim_lfsr_fib_test.4281441731
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/5.prim_lfsr_fib_test.3467536187
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/6.prim_lfsr_fib_test.3637828013
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/7.prim_lfsr_fib_test.3556368804
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/8.prim_lfsr_fib_test.2574581189
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/9.prim_lfsr_fib_test.3074215938
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/1.prim_lfsr_gal_test.3989608202
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/10.prim_lfsr_gal_test.214302335
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/11.prim_lfsr_gal_test.2523568842
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/12.prim_lfsr_gal_test.1159848355
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/13.prim_lfsr_gal_test.2572107183
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/14.prim_lfsr_gal_test.1162463152
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/15.prim_lfsr_gal_test.2580326610
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/16.prim_lfsr_gal_test.2885552075
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/17.prim_lfsr_gal_test.482494805
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/18.prim_lfsr_gal_test.496596196
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/19.prim_lfsr_gal_test.4224768070
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/2.prim_lfsr_gal_test.3529951132
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/20.prim_lfsr_gal_test.1551461084
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/21.prim_lfsr_gal_test.533316736
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/22.prim_lfsr_gal_test.3854291933
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/23.prim_lfsr_gal_test.394071469
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/24.prim_lfsr_gal_test.4223245833
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/25.prim_lfsr_gal_test.728704637
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/26.prim_lfsr_gal_test.128211324
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/27.prim_lfsr_gal_test.1166435948
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/28.prim_lfsr_gal_test.2043892905
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/29.prim_lfsr_gal_test.984898530
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/3.prim_lfsr_gal_test.3166073097
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/30.prim_lfsr_gal_test.1536903682
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/31.prim_lfsr_gal_test.357484826
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/32.prim_lfsr_gal_test.2041336515
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/33.prim_lfsr_gal_test.4080919441
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/34.prim_lfsr_gal_test.1631347526
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/35.prim_lfsr_gal_test.3436773380
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/36.prim_lfsr_gal_test.4257029729
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/37.prim_lfsr_gal_test.1078239973
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/38.prim_lfsr_gal_test.1794675609
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/39.prim_lfsr_gal_test.1121181933
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/4.prim_lfsr_gal_test.3102450716
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/40.prim_lfsr_gal_test.3989963456
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/41.prim_lfsr_gal_test.853159882
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/42.prim_lfsr_gal_test.3387214816
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/43.prim_lfsr_gal_test.3930051332
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/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/46.prim_lfsr_gal_test.3954280812
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/47.prim_lfsr_gal_test.3070160259
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/48.prim_lfsr_gal_test.3122147913
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/49.prim_lfsr_gal_test.1032805441
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/5.prim_lfsr_gal_test.3188172858
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/6.prim_lfsr_gal_test.2188714765
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/7.prim_lfsr_gal_test.3767910245
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/8.prim_lfsr_gal_test.1412504343
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/9.prim_lfsr_gal_test.4268811069
/workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/1.prim_lfsr_fib_smoke.4212959879
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Total test records in report: 200
tests.html | tests1.html | tests2.html | tests3.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/10.prim_lfsr_gal_smoke.4054890356 Sep 01 03:34:33 AM UTC 24 Sep 01 03:34:43 AM UTC 24 1121790000 ps
T2 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/1.prim_lfsr_gal_smoke.951381017 Sep 01 03:34:33 AM UTC 24 Sep 01 03:34:43 AM UTC 24 1256690000 ps
T3 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/12.prim_lfsr_gal_smoke.3407824547 Sep 01 03:34:33 AM UTC 24 Sep 01 03:34:44 AM UTC 24 1273150000 ps
T7 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/15.prim_lfsr_gal_smoke.3690649916 Sep 01 03:34:33 AM UTC 24 Sep 01 03:34:44 AM UTC 24 1250230000 ps
T8 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/3.prim_lfsr_gal_smoke.2392779175 Sep 01 03:34:33 AM UTC 24 Sep 01 03:34:44 AM UTC 24 1370790000 ps
T9 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/0.prim_lfsr_gal_smoke.1369234515 Sep 01 03:34:33 AM UTC 24 Sep 01 03:34:44 AM UTC 24 1418310000 ps
T10 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/13.prim_lfsr_gal_smoke.297957606 Sep 01 03:34:33 AM UTC 24 Sep 01 03:34:44 AM UTC 24 1352010000 ps
T11 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/2.prim_lfsr_gal_smoke.637517479 Sep 01 03:34:33 AM UTC 24 Sep 01 03:34:44 AM UTC 24 1428950000 ps
T12 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/8.prim_lfsr_gal_smoke.1052754968 Sep 01 03:34:33 AM UTC 24 Sep 01 03:34:44 AM UTC 24 1408750000 ps
T13 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/5.prim_lfsr_gal_smoke.3461939685 Sep 01 03:34:33 AM UTC 24 Sep 01 03:34:45 AM UTC 24 1455370000 ps
T41 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/9.prim_lfsr_gal_smoke.3142049879 Sep 01 03:34:33 AM UTC 24 Sep 01 03:34:45 AM UTC 24 1458010000 ps
T42 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/25.prim_lfsr_gal_smoke.3032317781 Sep 01 03:34:35 AM UTC 24 Sep 01 03:34:45 AM UTC 24 1201390000 ps
T43 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/17.prim_lfsr_gal_smoke.3181093890 Sep 01 03:34:35 AM UTC 24 Sep 01 03:34:45 AM UTC 24 1298930000 ps
T44 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/4.prim_lfsr_gal_smoke.972858038 Sep 01 03:34:33 AM UTC 24 Sep 01 03:34:45 AM UTC 24 1535130000 ps
T45 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/7.prim_lfsr_gal_smoke.489608563 Sep 01 03:34:33 AM UTC 24 Sep 01 03:34:45 AM UTC 24 1519610000 ps
T46 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/11.prim_lfsr_gal_smoke.1913740282 Sep 01 03:34:33 AM UTC 24 Sep 01 03:34:45 AM UTC 24 1518470000 ps
T47 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/6.prim_lfsr_gal_smoke.1450056004 Sep 01 03:34:33 AM UTC 24 Sep 01 03:34:45 AM UTC 24 1530470000 ps
T48 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/14.prim_lfsr_gal_smoke.1199403531 Sep 01 03:34:33 AM UTC 24 Sep 01 03:34:45 AM UTC 24 1526390000 ps
T49 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/19.prim_lfsr_gal_smoke.2889871528 Sep 01 03:34:35 AM UTC 24 Sep 01 03:34:46 AM UTC 24 1367170000 ps
T50 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/27.prim_lfsr_gal_smoke.2855498251 Sep 01 03:34:35 AM UTC 24 Sep 01 03:34:46 AM UTC 24 1319770000 ps
T51 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/16.prim_lfsr_gal_smoke.1056066690 Sep 01 03:34:35 AM UTC 24 Sep 01 03:34:46 AM UTC 24 1395950000 ps
T52 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/23.prim_lfsr_gal_smoke.1808440157 Sep 01 03:34:35 AM UTC 24 Sep 01 03:34:46 AM UTC 24 1421110000 ps
T53 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/31.prim_lfsr_gal_smoke.2095020998 Sep 01 03:34:35 AM UTC 24 Sep 01 03:34:46 AM UTC 24 1360490000 ps
T54 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/29.prim_lfsr_gal_smoke.2680217627 Sep 01 03:34:35 AM UTC 24 Sep 01 03:34:46 AM UTC 24 1408530000 ps
T55 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/18.prim_lfsr_gal_smoke.424553013 Sep 01 03:34:35 AM UTC 24 Sep 01 03:34:46 AM UTC 24 1479570000 ps
T56 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/22.prim_lfsr_gal_smoke.1409136920 Sep 01 03:34:35 AM UTC 24 Sep 01 03:34:46 AM UTC 24 1462210000 ps
T57 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/39.prim_lfsr_gal_smoke.1258167462 Sep 01 03:34:35 AM UTC 24 Sep 01 03:34:46 AM UTC 24 1350490000 ps
T58 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/37.prim_lfsr_gal_smoke.4289726900 Sep 01 03:34:35 AM UTC 24 Sep 01 03:34:46 AM UTC 24 1378050000 ps
T59 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/24.prim_lfsr_gal_smoke.877366974 Sep 01 03:34:35 AM UTC 24 Sep 01 03:34:46 AM UTC 24 1484670000 ps
T60 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/20.prim_lfsr_gal_smoke.3634847109 Sep 01 03:34:35 AM UTC 24 Sep 01 03:34:46 AM UTC 24 1508170000 ps
T61 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/33.prim_lfsr_gal_smoke.3261501619 Sep 01 03:34:35 AM UTC 24 Sep 01 03:34:47 AM UTC 24 1405170000 ps
T62 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/32.prim_lfsr_gal_smoke.2234701737 Sep 01 03:34:35 AM UTC 24 Sep 01 03:34:47 AM UTC 24 1467070000 ps
T63 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/42.prim_lfsr_gal_smoke.1547593782 Sep 01 03:34:36 AM UTC 24 Sep 01 03:34:47 AM UTC 24 1425450000 ps
T64 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/28.prim_lfsr_gal_smoke.1653415020 Sep 01 03:34:35 AM UTC 24 Sep 01 03:34:47 AM UTC 24 1534710000 ps
T65 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/30.prim_lfsr_gal_smoke.4063009917 Sep 01 03:34:35 AM UTC 24 Sep 01 03:34:47 AM UTC 24 1508850000 ps
T66 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/21.prim_lfsr_gal_smoke.4067861724 Sep 01 03:34:35 AM UTC 24 Sep 01 03:34:47 AM UTC 24 1584350000 ps
T67 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/35.prim_lfsr_gal_smoke.3257990808 Sep 01 03:34:35 AM UTC 24 Sep 01 03:34:47 AM UTC 24 1486030000 ps
T68 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/36.prim_lfsr_gal_smoke.346921592 Sep 01 03:34:35 AM UTC 24 Sep 01 03:34:47 AM UTC 24 1468510000 ps
T69 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/34.prim_lfsr_gal_smoke.713395789 Sep 01 03:34:35 AM UTC 24 Sep 01 03:34:47 AM UTC 24 1517670000 ps
T70 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/26.prim_lfsr_gal_smoke.341703455 Sep 01 03:34:35 AM UTC 24 Sep 01 03:34:47 AM UTC 24 1602550000 ps
T71 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/41.prim_lfsr_gal_smoke.3857618539 Sep 01 03:34:36 AM UTC 24 Sep 01 03:34:47 AM UTC 24 1544710000 ps
T72 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/38.prim_lfsr_gal_smoke.4197513935 Sep 01 03:34:35 AM UTC 24 Sep 01 03:34:48 AM UTC 24 1566570000 ps
T73 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/40.prim_lfsr_gal_smoke.2662393066 Sep 01 03:34:35 AM UTC 24 Sep 01 03:34:48 AM UTC 24 1562110000 ps
T74 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/43.prim_lfsr_gal_smoke.1866765460 Sep 01 03:34:38 AM UTC 24 Sep 01 03:34:48 AM UTC 24 1343270000 ps
T75 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/44.prim_lfsr_gal_smoke.1910378494 Sep 01 03:34:38 AM UTC 24 Sep 01 03:34:48 AM UTC 24 1361430000 ps
T76 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/45.prim_lfsr_gal_smoke.4173045345 Sep 01 03:34:42 AM UTC 24 Sep 01 03:34:51 AM UTC 24 1401810000 ps
T77 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/46.prim_lfsr_gal_smoke.2685535403 Sep 01 03:34:42 AM UTC 24 Sep 01 03:34:51 AM UTC 24 1436610000 ps
T78 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/48.prim_lfsr_gal_smoke.4040347923 Sep 01 03:34:43 AM UTC 24 Sep 01 03:34:52 AM UTC 24 1403210000 ps
T79 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/47.prim_lfsr_gal_smoke.387702984 Sep 01 03:34:43 AM UTC 24 Sep 01 03:34:52 AM UTC 24 1490290000 ps
T80 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/49.prim_lfsr_gal_smoke.1606102729 Sep 01 03:34:44 AM UTC 24 Sep 01 03:34:53 AM UTC 24 1497310000 ps
T14 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/1.prim_lfsr_gal_test.3989608202 Sep 01 03:34:44 AM UTC 24 Sep 01 04:11:58 AM UTC 24 336516910000 ps
T15 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/5.prim_lfsr_gal_test.3188172858 Sep 01 03:34:46 AM UTC 24 Sep 01 04:11:58 AM UTC 24 336529850000 ps
T16 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/8.prim_lfsr_gal_test.1412504343 Sep 01 03:34:46 AM UTC 24 Sep 01 04:11:59 AM UTC 24 336584230000 ps
T17 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/3.prim_lfsr_gal_test.3166073097 Sep 01 03:34:45 AM UTC 24 Sep 01 04:11:59 AM UTC 24 336568530000 ps
T18 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/0.prim_lfsr_gal_test.601449694 Sep 01 03:34:44 AM UTC 24 Sep 01 04:11:59 AM UTC 24 336618770000 ps
T19 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/2.prim_lfsr_gal_test.3529951132 Sep 01 03:34:44 AM UTC 24 Sep 01 04:11:59 AM UTC 24 336754630000 ps
T20 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/26.prim_lfsr_gal_test.128211324 Sep 01 03:34:47 AM UTC 24 Sep 01 04:12:00 AM UTC 24 336352730000 ps
T21 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/19.prim_lfsr_gal_test.4224768070 Sep 01 03:34:47 AM UTC 24 Sep 01 04:12:00 AM UTC 24 336454750000 ps
T22 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/4.prim_lfsr_gal_test.3102450716 Sep 01 03:34:45 AM UTC 24 Sep 01 04:12:00 AM UTC 24 336892830000 ps
T23 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/15.prim_lfsr_gal_test.2580326610 Sep 01 03:34:47 AM UTC 24 Sep 01 04:12:00 AM UTC 24 336470970000 ps
T81 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/31.prim_lfsr_gal_test.357484826 Sep 01 03:34:49 AM UTC 24 Sep 01 04:12:01 AM UTC 24 336357250000 ps
T82 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/12.prim_lfsr_gal_test.1159848355 Sep 01 03:34:46 AM UTC 24 Sep 01 04:12:01 AM UTC 24 336568430000 ps
T83 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/7.prim_lfsr_gal_test.3767910245 Sep 01 03:34:46 AM UTC 24 Sep 01 04:12:01 AM UTC 24 336938570000 ps
T84 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/14.prim_lfsr_gal_test.1162463152 Sep 01 03:34:47 AM UTC 24 Sep 01 04:12:02 AM UTC 24 336504590000 ps
T85 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/28.prim_lfsr_gal_test.2043892905 Sep 01 03:34:47 AM UTC 24 Sep 01 04:12:02 AM UTC 24 336612450000 ps
T86 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/23.prim_lfsr_gal_test.394071469 Sep 01 03:34:47 AM UTC 24 Sep 01 04:12:02 AM UTC 24 336582310000 ps
T87 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/6.prim_lfsr_gal_test.2188714765 Sep 01 03:34:46 AM UTC 24 Sep 01 04:12:02 AM UTC 24 336704830000 ps
T88 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/9.prim_lfsr_gal_test.4268811069 Sep 01 03:34:46 AM UTC 24 Sep 01 04:12:02 AM UTC 24 336758130000 ps
T89 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/37.prim_lfsr_gal_test.1078239973 Sep 01 03:34:49 AM UTC 24 Sep 01 04:12:02 AM UTC 24 336481050000 ps
T90 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/10.prim_lfsr_gal_test.214302335 Sep 01 03:34:46 AM UTC 24 Sep 01 04:12:02 AM UTC 24 336689210000 ps
T91 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/18.prim_lfsr_gal_test.496596196 Sep 01 03:34:47 AM UTC 24 Sep 01 04:12:02 AM UTC 24 336785010000 ps
T92 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/21.prim_lfsr_gal_test.533316736 Sep 01 03:34:47 AM UTC 24 Sep 01 04:12:02 AM UTC 24 336763390000 ps
T93 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/16.prim_lfsr_gal_test.2885552075 Sep 01 03:34:47 AM UTC 24 Sep 01 04:12:03 AM UTC 24 336872610000 ps
T94 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/39.prim_lfsr_gal_test.1121181933 Sep 01 03:34:49 AM UTC 24 Sep 01 04:12:03 AM UTC 24 336632990000 ps
T95 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/30.prim_lfsr_gal_test.1536903682 Sep 01 03:34:49 AM UTC 24 Sep 01 04:12:03 AM UTC 24 336660150000 ps
T96 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/41.prim_lfsr_gal_test.853159882 Sep 01 03:34:49 AM UTC 24 Sep 01 04:12:04 AM UTC 24 336692730000 ps
T97 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/24.prim_lfsr_gal_test.4223245833 Sep 01 03:34:47 AM UTC 24 Sep 01 04:12:04 AM UTC 24 336921870000 ps
T98 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/11.prim_lfsr_gal_test.2523568842 Sep 01 03:34:46 AM UTC 24 Sep 01 04:12:04 AM UTC 24 337028370000 ps
T99 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/25.prim_lfsr_gal_test.728704637 Sep 01 03:34:47 AM UTC 24 Sep 01 04:12:04 AM UTC 24 336825850000 ps
T100 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/29.prim_lfsr_gal_test.984898530 Sep 01 03:34:48 AM UTC 24 Sep 01 04:12:04 AM UTC 24 336696570000 ps
T101 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/33.prim_lfsr_gal_test.4080919441 Sep 01 03:34:49 AM UTC 24 Sep 01 04:12:04 AM UTC 24 336857610000 ps
T102 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/36.prim_lfsr_gal_test.4257029729 Sep 01 03:34:49 AM UTC 24 Sep 01 04:12:04 AM UTC 24 336711030000 ps
T103 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/44.prim_lfsr_gal_test.3379888884 Sep 01 03:34:50 AM UTC 24 Sep 01 04:12:05 AM UTC 24 336427910000 ps
T104 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/13.prim_lfsr_gal_test.2572107183 Sep 01 03:34:47 AM UTC 24 Sep 01 04:12:05 AM UTC 24 336984170000 ps
T105 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/20.prim_lfsr_gal_test.1551461084 Sep 01 03:34:47 AM UTC 24 Sep 01 04:12:05 AM UTC 24 336897990000 ps
T106 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/22.prim_lfsr_gal_test.3854291933 Sep 01 03:34:47 AM UTC 24 Sep 01 04:12:05 AM UTC 24 337130810000 ps
T107 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/35.prim_lfsr_gal_test.3436773380 Sep 01 03:34:49 AM UTC 24 Sep 01 04:12:05 AM UTC 24 336791730000 ps
T108 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/17.prim_lfsr_gal_test.482494805 Sep 01 03:34:47 AM UTC 24 Sep 01 04:12:06 AM UTC 24 336900950000 ps
T109 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/46.prim_lfsr_gal_test.3954280812 Sep 01 03:34:51 AM UTC 24 Sep 01 04:12:06 AM UTC 24 336496770000 ps
T110 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/27.prim_lfsr_gal_test.1166435948 Sep 01 03:34:47 AM UTC 24 Sep 01 04:12:06 AM UTC 24 336974330000 ps
T111 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/38.prim_lfsr_gal_test.1794675609 Sep 01 03:34:49 AM UTC 24 Sep 01 04:12:06 AM UTC 24 336898130000 ps
T112 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/34.prim_lfsr_gal_test.1631347526 Sep 01 03:34:49 AM UTC 24 Sep 01 04:12:07 AM UTC 24 337176090000 ps
T113 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/32.prim_lfsr_gal_test.2041336515 Sep 01 03:34:49 AM UTC 24 Sep 01 04:12:07 AM UTC 24 336934750000 ps
T114 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/43.prim_lfsr_gal_test.3930051332 Sep 01 03:34:49 AM UTC 24 Sep 01 04:12:07 AM UTC 24 336959370000 ps
T115 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/40.prim_lfsr_gal_test.3989963456 Sep 01 03:34:49 AM UTC 24 Sep 01 04:12:07 AM UTC 24 336987530000 ps
T116 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/42.prim_lfsr_gal_test.3387214816 Sep 01 03:34:49 AM UTC 24 Sep 01 04:12:08 AM UTC 24 337020990000 ps
T117 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/45.prim_lfsr_gal_test.3548234575 Sep 01 03:34:51 AM UTC 24 Sep 01 04:12:08 AM UTC 24 336776870000 ps
T118 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/48.prim_lfsr_gal_test.3122147913 Sep 01 03:34:53 AM UTC 24 Sep 01 04:12:09 AM UTC 24 336486890000 ps
T119 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/49.prim_lfsr_gal_test.1032805441 Sep 01 03:34:54 AM UTC 24 Sep 01 04:12:10 AM UTC 24 337118030000 ps
T120 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/47.prim_lfsr_gal_test.3070160259 Sep 01 03:34:52 AM UTC 24 Sep 01 04:12:12 AM UTC 24 337115490000 ps
T4 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/1.prim_lfsr_fib_smoke.4212959879 Sep 01 03:33:20 AM UTC 24 Sep 01 03:33:31 AM UTC 24 1273150000 ps
T5 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/0.prim_lfsr_fib_smoke.2138039423 Sep 01 03:33:20 AM UTC 24 Sep 01 03:33:33 AM UTC 24 1541910000 ps
T6 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/2.prim_lfsr_fib_smoke.1764877825 Sep 01 03:33:21 AM UTC 24 Sep 01 03:33:34 AM UTC 24 1572670000 ps
T24 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/4.prim_lfsr_fib_smoke.2786536420 Sep 01 03:33:23 AM UTC 24 Sep 01 03:33:35 AM UTC 24 1395250000 ps
T25 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/6.prim_lfsr_fib_smoke.1204692791 Sep 01 03:33:23 AM UTC 24 Sep 01 03:33:35 AM UTC 24 1444410000 ps
T26 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/5.prim_lfsr_fib_smoke.676977393 Sep 01 03:33:23 AM UTC 24 Sep 01 03:33:36 AM UTC 24 1519650000 ps
T27 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/3.prim_lfsr_fib_smoke.3701967727 Sep 01 03:33:23 AM UTC 24 Sep 01 03:33:36 AM UTC 24 1541530000 ps
T28 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/7.prim_lfsr_fib_smoke.1829122472 Sep 01 03:33:26 AM UTC 24 Sep 01 03:33:39 AM UTC 24 1519630000 ps
T29 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/8.prim_lfsr_fib_smoke.3893310481 Sep 01 03:33:27 AM UTC 24 Sep 01 03:33:39 AM UTC 24 1491090000 ps
T30 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/9.prim_lfsr_fib_smoke.485718856 Sep 01 03:33:28 AM UTC 24 Sep 01 03:33:41 AM UTC 24 1489690000 ps
T121 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/10.prim_lfsr_fib_smoke.4249245558 Sep 01 03:33:29 AM UTC 24 Sep 01 03:33:42 AM UTC 24 1564510000 ps
T122 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/18.prim_lfsr_fib_smoke.88462241 Sep 01 03:33:44 AM UTC 24 Sep 01 03:33:53 AM UTC 24 1000570000 ps
T123 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/17.prim_lfsr_fib_smoke.609590355 Sep 01 03:33:44 AM UTC 24 Sep 01 03:33:55 AM UTC 24 1178610000 ps
T124 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/12.prim_lfsr_fib_smoke.1016579311 Sep 01 03:33:44 AM UTC 24 Sep 01 03:33:55 AM UTC 24 1258350000 ps
T125 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/22.prim_lfsr_fib_smoke.1297337204 Sep 01 03:33:44 AM UTC 24 Sep 01 03:33:55 AM UTC 24 1237670000 ps
T126 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/16.prim_lfsr_fib_smoke.1669894280 Sep 01 03:33:44 AM UTC 24 Sep 01 03:33:55 AM UTC 24 1277790000 ps
T127 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/15.prim_lfsr_fib_smoke.3788829825 Sep 01 03:33:44 AM UTC 24 Sep 01 03:33:55 AM UTC 24 1336010000 ps
T128 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/14.prim_lfsr_fib_smoke.1987591394 Sep 01 03:33:44 AM UTC 24 Sep 01 03:33:56 AM UTC 24 1379310000 ps
T129 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/20.prim_lfsr_fib_smoke.1978531163 Sep 01 03:33:44 AM UTC 24 Sep 01 03:33:56 AM UTC 24 1349090000 ps
T130 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/25.prim_lfsr_fib_smoke.794770773 Sep 01 03:33:45 AM UTC 24 Sep 01 03:33:56 AM UTC 24 1310930000 ps
T131 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/19.prim_lfsr_fib_smoke.4268947200 Sep 01 03:33:44 AM UTC 24 Sep 01 03:33:56 AM UTC 24 1385210000 ps
T132 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/11.prim_lfsr_fib_smoke.3664632079 Sep 01 03:33:44 AM UTC 24 Sep 01 03:33:56 AM UTC 24 1459470000 ps
T133 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/24.prim_lfsr_fib_smoke.1073942710 Sep 01 03:33:45 AM UTC 24 Sep 01 03:33:56 AM UTC 24 1373950000 ps
T134 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/21.prim_lfsr_fib_smoke.1625113231 Sep 01 03:33:44 AM UTC 24 Sep 01 03:33:56 AM UTC 24 1403770000 ps
T135 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/23.prim_lfsr_fib_smoke.3451534480 Sep 01 03:33:44 AM UTC 24 Sep 01 03:33:57 AM UTC 24 1444790000 ps
T136 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/28.prim_lfsr_fib_smoke.1053720142 Sep 01 03:33:45 AM UTC 24 Sep 01 03:33:57 AM UTC 24 1425650000 ps
T137 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/13.prim_lfsr_fib_smoke.2193289150 Sep 01 03:33:44 AM UTC 24 Sep 01 03:33:57 AM UTC 24 1548290000 ps
T138 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/26.prim_lfsr_fib_smoke.1127717027 Sep 01 03:33:45 AM UTC 24 Sep 01 03:33:57 AM UTC 24 1503410000 ps
T139 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/27.prim_lfsr_fib_smoke.596704716 Sep 01 03:33:45 AM UTC 24 Sep 01 03:33:57 AM UTC 24 1494990000 ps
T140 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/30.prim_lfsr_fib_smoke.3927206416 Sep 01 03:33:46 AM UTC 24 Sep 01 03:33:57 AM UTC 24 1381370000 ps
T141 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/29.prim_lfsr_fib_smoke.344680976 Sep 01 03:33:46 AM UTC 24 Sep 01 03:33:58 AM UTC 24 1500970000 ps
T142 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/31.prim_lfsr_fib_smoke.2133322826 Sep 01 03:33:47 AM UTC 24 Sep 01 03:33:59 AM UTC 24 1421350000 ps
T143 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/32.prim_lfsr_fib_smoke.1949554000 Sep 01 03:33:49 AM UTC 24 Sep 01 03:34:01 AM UTC 24 1579890000 ps
T144 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/33.prim_lfsr_fib_smoke.250368574 Sep 01 03:33:49 AM UTC 24 Sep 01 03:34:01 AM UTC 24 1598730000 ps
T145 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/34.prim_lfsr_fib_smoke.1777962174 Sep 01 03:33:51 AM UTC 24 Sep 01 03:34:03 AM UTC 24 1506610000 ps
T146 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/36.prim_lfsr_fib_smoke.4224139056 Sep 01 03:33:53 AM UTC 24 Sep 01 03:34:04 AM UTC 24 1446410000 ps
T147 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/35.prim_lfsr_fib_smoke.1323567302 Sep 01 03:33:53 AM UTC 24 Sep 01 03:34:04 AM UTC 24 1484050000 ps
T148 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/37.prim_lfsr_fib_smoke.3700600023 Sep 01 03:33:55 AM UTC 24 Sep 01 03:34:05 AM UTC 24 1425810000 ps
T149 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/44.prim_lfsr_fib_smoke.3511251743 Sep 01 03:33:56 AM UTC 24 Sep 01 03:34:05 AM UTC 24 1289690000 ps
T150 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/47.prim_lfsr_fib_smoke.2545156564 Sep 01 03:33:57 AM UTC 24 Sep 01 03:34:05 AM UTC 24 1090290000 ps
T151 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/43.prim_lfsr_fib_smoke.1950507342 Sep 01 03:33:56 AM UTC 24 Sep 01 03:34:06 AM UTC 24 1326510000 ps
T152 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/38.prim_lfsr_fib_smoke.2754279356 Sep 01 03:33:55 AM UTC 24 Sep 01 03:34:06 AM UTC 24 1519050000 ps
T153 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/45.prim_lfsr_fib_smoke.3125641335 Sep 01 03:33:56 AM UTC 24 Sep 01 03:34:06 AM UTC 24 1320230000 ps
T154 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/39.prim_lfsr_fib_smoke.3213204209 Sep 01 03:33:55 AM UTC 24 Sep 01 03:34:06 AM UTC 24 1587210000 ps
T155 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/40.prim_lfsr_fib_smoke.2121280153 Sep 01 03:33:56 AM UTC 24 Sep 01 03:34:06 AM UTC 24 1393490000 ps
T156 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/41.prim_lfsr_fib_smoke.1344471455 Sep 01 03:33:56 AM UTC 24 Sep 01 03:34:06 AM UTC 24 1422250000 ps
T157 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/46.prim_lfsr_fib_smoke.30738426 Sep 01 03:33:57 AM UTC 24 Sep 01 03:34:07 AM UTC 24 1308450000 ps
T158 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/42.prim_lfsr_fib_smoke.2259339426 Sep 01 03:33:56 AM UTC 24 Sep 01 03:34:07 AM UTC 24 1522770000 ps
T159 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/49.prim_lfsr_fib_smoke.1880436804 Sep 01 03:33:57 AM UTC 24 Sep 01 03:34:07 AM UTC 24 1388610000 ps
T160 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/48.prim_lfsr_fib_smoke.2457914237 Sep 01 03:33:57 AM UTC 24 Sep 01 03:34:07 AM UTC 24 1415910000 ps
T31 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/0.prim_lfsr_fib_test.3831260964 Sep 01 04:26:31 AM UTC 24 Sep 01 04:57:30 AM UTC 24 336416390000 ps
T32 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/2.prim_lfsr_fib_test.2536964676 Sep 01 04:26:32 AM UTC 24 Sep 01 04:57:34 AM UTC 24 336953090000 ps
T33 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/1.prim_lfsr_fib_test.4217325130 Sep 01 04:26:32 AM UTC 24 Sep 01 04:57:36 AM UTC 24 336889870000 ps
T34 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/3.prim_lfsr_fib_test.902421633 Sep 01 04:26:34 AM UTC 24 Sep 01 04:57:37 AM UTC 24 336711750000 ps
T35 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/12.prim_lfsr_fib_test.4072273165 Sep 01 04:26:42 AM UTC 24 Sep 01 04:57:43 AM UTC 24 336371690000 ps
T36 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/9.prim_lfsr_fib_test.3074215938 Sep 01 04:26:40 AM UTC 24 Sep 01 04:57:44 AM UTC 24 336649910000 ps
T37 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/4.prim_lfsr_fib_test.103936925 Sep 01 04:26:38 AM UTC 24 Sep 01 04:57:44 AM UTC 24 336667510000 ps
T38 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/8.prim_lfsr_fib_test.2574581189 Sep 01 04:26:40 AM UTC 24 Sep 01 04:57:45 AM UTC 24 336574790000 ps
T39 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/7.prim_lfsr_fib_test.3556368804 Sep 01 04:26:39 AM UTC 24 Sep 01 04:57:45 AM UTC 24 337017230000 ps
T40 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/11.prim_lfsr_fib_test.2959171260 Sep 01 04:26:42 AM UTC 24 Sep 01 04:57:45 AM UTC 24 336818690000 ps
T161 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/5.prim_lfsr_fib_test.3467536187 Sep 01 04:26:39 AM UTC 24 Sep 01 04:57:46 AM UTC 24 336960170000 ps
T162 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/6.prim_lfsr_fib_test.3637828013 Sep 01 04:26:39 AM UTC 24 Sep 01 04:57:46 AM UTC 24 337050410000 ps
T163 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/13.prim_lfsr_fib_test.448932440 Sep 01 04:26:42 AM UTC 24 Sep 01 04:57:46 AM UTC 24 336783270000 ps
T164 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/23.prim_lfsr_fib_test.3899203226 Sep 01 04:26:44 AM UTC 24 Sep 01 04:57:46 AM UTC 24 336451650000 ps
T165 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/10.prim_lfsr_fib_test.699137544 Sep 01 04:26:40 AM UTC 24 Sep 01 04:57:47 AM UTC 24 336729330000 ps
T166 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/21.prim_lfsr_fib_test.2802352256 Sep 01 04:26:44 AM UTC 24 Sep 01 04:57:47 AM UTC 24 336558690000 ps
T167 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/14.prim_lfsr_fib_test.1161023524 Sep 01 04:26:42 AM UTC 24 Sep 01 04:57:47 AM UTC 24 336536530000 ps
T168 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/16.prim_lfsr_fib_test.1381288480 Sep 01 04:26:43 AM UTC 24 Sep 01 04:57:47 AM UTC 24 336576790000 ps
T169 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/15.prim_lfsr_fib_test.2969272793 Sep 01 04:26:43 AM UTC 24 Sep 01 04:57:48 AM UTC 24 336877390000 ps
T170 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/17.prim_lfsr_fib_test.4151138503 Sep 01 04:26:43 AM UTC 24 Sep 01 04:57:48 AM UTC 24 336328290000 ps
T171 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/18.prim_lfsr_fib_test.3996585562 Sep 01 04:26:43 AM UTC 24 Sep 01 04:57:50 AM UTC 24 336591010000 ps
T172 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/22.prim_lfsr_fib_test.1499948959 Sep 01 04:26:44 AM UTC 24 Sep 01 04:57:50 AM UTC 24 336650510000 ps
T173 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/24.prim_lfsr_fib_test.2693593597 Sep 01 04:26:45 AM UTC 24 Sep 01 04:57:50 AM UTC 24 336621390000 ps
T174 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/20.prim_lfsr_fib_test.876434121 Sep 01 04:26:44 AM UTC 24 Sep 01 04:57:51 AM UTC 24 337021810000 ps
T175 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/25.prim_lfsr_fib_test.1356383821 Sep 01 04:26:45 AM UTC 24 Sep 01 04:57:51 AM UTC 24 336438930000 ps
T176 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/19.prim_lfsr_fib_test.2114233796 Sep 01 04:26:44 AM UTC 24 Sep 01 04:57:54 AM UTC 24 337000510000 ps
T177 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/27.prim_lfsr_fib_test.38068917 Sep 01 04:26:46 AM UTC 24 Sep 01 04:57:55 AM UTC 24 336635890000 ps
T178 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/26.prim_lfsr_fib_test.4090493511 Sep 01 04:26:45 AM UTC 24 Sep 01 04:57:57 AM UTC 24 336993750000 ps
T179 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/28.prim_lfsr_fib_test.521138392 Sep 01 04:26:50 AM UTC 24 Sep 01 04:57:59 AM UTC 24 336927690000 ps
T180 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/31.prim_lfsr_fib_test.3971939734 Sep 01 04:26:52 AM UTC 24 Sep 01 04:57:59 AM UTC 24 336519750000 ps
T181 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/29.prim_lfsr_fib_test.512112383 Sep 01 04:26:50 AM UTC 24 Sep 01 04:57:59 AM UTC 24 336366350000 ps
T182 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/32.prim_lfsr_fib_test.1727633964 Sep 01 04:26:52 AM UTC 24 Sep 01 04:58:01 AM UTC 24 336670510000 ps
T183 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/30.prim_lfsr_fib_test.1750655566 Sep 01 04:26:52 AM UTC 24 Sep 01 04:58:02 AM UTC 24 336799350000 ps
T184 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/34.prim_lfsr_fib_test.1449698089 Sep 01 04:26:54 AM UTC 24 Sep 01 04:58:05 AM UTC 24 337006150000 ps
T185 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/33.prim_lfsr_fib_test.1680026636 Sep 01 04:26:53 AM UTC 24 Sep 01 04:58:06 AM UTC 24 337075270000 ps
T186 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/35.prim_lfsr_fib_test.2386463987 Sep 01 04:26:56 AM UTC 24 Sep 01 04:58:11 AM UTC 24 336688710000 ps
T187 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/37.prim_lfsr_fib_test.4053547417 Sep 01 04:27:01 AM UTC 24 Sep 01 04:58:12 AM UTC 24 336551910000 ps
T188 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/36.prim_lfsr_fib_test.1666407162 Sep 01 04:26:59 AM UTC 24 Sep 01 04:58:18 AM UTC 24 337004450000 ps
T189 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/38.prim_lfsr_fib_test.798893955 Sep 01 04:27:02 AM UTC 24 Sep 01 04:58:18 AM UTC 24 336544530000 ps
T190 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/40.prim_lfsr_fib_test.2657480302 Sep 01 04:27:04 AM UTC 24 Sep 01 04:58:22 AM UTC 24 336788270000 ps
T191 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/39.prim_lfsr_fib_test.586068524 Sep 01 04:27:04 AM UTC 24 Sep 01 04:58:22 AM UTC 24 337094730000 ps
T192 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/43.prim_lfsr_fib_test.1722505726 Sep 01 04:27:09 AM UTC 24 Sep 01 04:58:25 AM UTC 24 336705410000 ps
T193 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/41.prim_lfsr_fib_test.3072590056 Sep 01 04:27:06 AM UTC 24 Sep 01 04:58:25 AM UTC 24 336891270000 ps
T194 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/42.prim_lfsr_fib_test.2513852974 Sep 01 04:27:08 AM UTC 24 Sep 01 04:58:26 AM UTC 24 336322610000 ps
T195 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/44.prim_lfsr_fib_test.3396063751 Sep 01 04:27:13 AM UTC 24 Sep 01 04:58:29 AM UTC 24 336349570000 ps
T196 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/47.prim_lfsr_fib_test.352587971 Sep 01 04:27:15 AM UTC 24 Sep 01 04:58:32 AM UTC 24 336651050000 ps
T197 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/46.prim_lfsr_fib_test.1962180188 Sep 01 04:27:15 AM UTC 24 Sep 01 04:58:36 AM UTC 24 336811430000 ps
T198 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/45.prim_lfsr_fib_test.3823096467 Sep 01 04:27:15 AM UTC 24 Sep 01 04:58:40 AM UTC 24 336982390000 ps
T199 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/48.prim_lfsr_fib_test.2676021589 Sep 01 04:27:19 AM UTC 24 Sep 01 04:58:41 AM UTC 24 336540170000 ps
T200 /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/49.prim_lfsr_fib_test.4281441731 Sep 01 04:27:22 AM UTC 24 Sep 01 04:58:48 AM UTC 24 336879870000 ps

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/0.prim_lfsr_gal_smoke.1369234515
Short name T9
Test name
Test status
Simulation time 1418310000 ps
CPU time 1.88 seconds
Started Sep 01 03:34:33 AM UTC 24
Finished Sep 01 03:34:44 AM UTC 24
Peak memory 177772 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1369234515 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
gal.vdb -cm_log /dev/null -cm_name 0.prim_lfsr_gal_smoke.1369234515
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/0.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/0.prim_lfsr_gal_test.601449694
Short name T18
Test name
Test status
Simulation time 336618770000 ps
CPU time 279.31 seconds
Started Sep 01 03:34:44 AM UTC 24
Finished Sep 01 04:11:59 AM UTC 24
Peak memory 176656 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=601449694 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24
_gal.vdb -cm_log /dev/null -cm_name 0.prim_lfsr_gal_test.601449694
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/0.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/0.prim_lfsr_fib_test.3831260964
Short name T31
Test name
Test status
Simulation time 336416390000 ps
CPU time 252.72 seconds
Started Sep 01 04:26:31 AM UTC 24
Finished Sep 01 04:57:30 AM UTC 24
Peak memory 175188 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3831260964 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_fib.vdb -cm_log /dev/null -cm_name 0.prim_lfsr_fib_test.3831260964
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/0.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/0.prim_lfsr_fib_smoke.2138039423
Short name T5
Test name
Test status
Simulation time 1541910000 ps
CPU time 2.25 seconds
Started Sep 01 03:33:20 AM UTC 24
Finished Sep 01 03:33:33 AM UTC 24
Peak memory 177772 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2138039423 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 0.prim_lfsr_fib_smoke.2138039423
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/0.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/1.prim_lfsr_fib_test.4217325130
Short name T33
Test name
Test status
Simulation time 336889870000 ps
CPU time 252.38 seconds
Started Sep 01 04:26:32 AM UTC 24
Finished Sep 01 04:57:36 AM UTC 24
Peak memory 175124 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4217325130 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_fib.vdb -cm_log /dev/null -cm_name 1.prim_lfsr_fib_test.4217325130
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/1.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/10.prim_lfsr_fib_test.699137544
Short name T165
Test name
Test status
Simulation time 336729330000 ps
CPU time 251.24 seconds
Started Sep 01 04:26:40 AM UTC 24
Finished Sep 01 04:57:47 AM UTC 24
Peak memory 176660 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=699137544 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24
_fib.vdb -cm_log /dev/null -cm_name 10.prim_lfsr_fib_test.699137544
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/10.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/11.prim_lfsr_fib_test.2959171260
Short name T40
Test name
Test status
Simulation time 336818690000 ps
CPU time 252.31 seconds
Started Sep 01 04:26:42 AM UTC 24
Finished Sep 01 04:57:45 AM UTC 24
Peak memory 175128 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2959171260 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_fib.vdb -cm_log /dev/null -cm_name 11.prim_lfsr_fib_test.2959171260
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/11.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/12.prim_lfsr_fib_test.4072273165
Short name T35
Test name
Test status
Simulation time 336371690000 ps
CPU time 251.68 seconds
Started Sep 01 04:26:42 AM UTC 24
Finished Sep 01 04:57:43 AM UTC 24
Peak memory 176656 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4072273165 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_fib.vdb -cm_log /dev/null -cm_name 12.prim_lfsr_fib_test.4072273165
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/12.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/13.prim_lfsr_fib_test.448932440
Short name T163
Test name
Test status
Simulation time 336783270000 ps
CPU time 251.93 seconds
Started Sep 01 04:26:42 AM UTC 24
Finished Sep 01 04:57:46 AM UTC 24
Peak memory 176660 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=448932440 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24
_fib.vdb -cm_log /dev/null -cm_name 13.prim_lfsr_fib_test.448932440
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/13.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/14.prim_lfsr_fib_test.1161023524
Short name T167
Test name
Test status
Simulation time 336536530000 ps
CPU time 252.55 seconds
Started Sep 01 04:26:42 AM UTC 24
Finished Sep 01 04:57:47 AM UTC 24
Peak memory 176656 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1161023524 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_fib.vdb -cm_log /dev/null -cm_name 14.prim_lfsr_fib_test.1161023524
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/14.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/15.prim_lfsr_fib_test.2969272793
Short name T169
Test name
Test status
Simulation time 336877390000 ps
CPU time 252.04 seconds
Started Sep 01 04:26:43 AM UTC 24
Finished Sep 01 04:57:48 AM UTC 24
Peak memory 175120 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2969272793 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_fib.vdb -cm_log /dev/null -cm_name 15.prim_lfsr_fib_test.2969272793
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/15.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/16.prim_lfsr_fib_test.1381288480
Short name T168
Test name
Test status
Simulation time 336576790000 ps
CPU time 250.81 seconds
Started Sep 01 04:26:43 AM UTC 24
Finished Sep 01 04:57:47 AM UTC 24
Peak memory 176648 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1381288480 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_fib.vdb -cm_log /dev/null -cm_name 16.prim_lfsr_fib_test.1381288480
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/16.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/17.prim_lfsr_fib_test.4151138503
Short name T170
Test name
Test status
Simulation time 336328290000 ps
CPU time 251.78 seconds
Started Sep 01 04:26:43 AM UTC 24
Finished Sep 01 04:57:48 AM UTC 24
Peak memory 176656 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4151138503 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_fib.vdb -cm_log /dev/null -cm_name 17.prim_lfsr_fib_test.4151138503
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/17.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/18.prim_lfsr_fib_test.3996585562
Short name T171
Test name
Test status
Simulation time 336591010000 ps
CPU time 252.88 seconds
Started Sep 01 04:26:43 AM UTC 24
Finished Sep 01 04:57:50 AM UTC 24
Peak memory 176656 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3996585562 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_fib.vdb -cm_log /dev/null -cm_name 18.prim_lfsr_fib_test.3996585562
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/18.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/19.prim_lfsr_fib_test.2114233796
Short name T176
Test name
Test status
Simulation time 337000510000 ps
CPU time 252.91 seconds
Started Sep 01 04:26:44 AM UTC 24
Finished Sep 01 04:57:54 AM UTC 24
Peak memory 175128 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2114233796 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_fib.vdb -cm_log /dev/null -cm_name 19.prim_lfsr_fib_test.2114233796
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/19.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/2.prim_lfsr_fib_test.2536964676
Short name T32
Test name
Test status
Simulation time 336953090000 ps
CPU time 252.05 seconds
Started Sep 01 04:26:32 AM UTC 24
Finished Sep 01 04:57:34 AM UTC 24
Peak memory 176652 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2536964676 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_fib.vdb -cm_log /dev/null -cm_name 2.prim_lfsr_fib_test.2536964676
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/2.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/20.prim_lfsr_fib_test.876434121
Short name T174
Test name
Test status
Simulation time 337021810000 ps
CPU time 252.42 seconds
Started Sep 01 04:26:44 AM UTC 24
Finished Sep 01 04:57:51 AM UTC 24
Peak memory 175132 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=876434121 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24
_fib.vdb -cm_log /dev/null -cm_name 20.prim_lfsr_fib_test.876434121
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/20.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/21.prim_lfsr_fib_test.2802352256
Short name T166
Test name
Test status
Simulation time 336558690000 ps
CPU time 252.21 seconds
Started Sep 01 04:26:44 AM UTC 24
Finished Sep 01 04:57:47 AM UTC 24
Peak memory 176648 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2802352256 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_fib.vdb -cm_log /dev/null -cm_name 21.prim_lfsr_fib_test.2802352256
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/21.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/22.prim_lfsr_fib_test.1499948959
Short name T172
Test name
Test status
Simulation time 336650510000 ps
CPU time 250.77 seconds
Started Sep 01 04:26:44 AM UTC 24
Finished Sep 01 04:57:50 AM UTC 24
Peak memory 175128 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1499948959 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_fib.vdb -cm_log /dev/null -cm_name 22.prim_lfsr_fib_test.1499948959
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/22.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/23.prim_lfsr_fib_test.3899203226
Short name T164
Test name
Test status
Simulation time 336451650000 ps
CPU time 252.89 seconds
Started Sep 01 04:26:44 AM UTC 24
Finished Sep 01 04:57:46 AM UTC 24
Peak memory 175128 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3899203226 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_fib.vdb -cm_log /dev/null -cm_name 23.prim_lfsr_fib_test.3899203226
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/23.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/24.prim_lfsr_fib_test.2693593597
Short name T173
Test name
Test status
Simulation time 336621390000 ps
CPU time 253.69 seconds
Started Sep 01 04:26:45 AM UTC 24
Finished Sep 01 04:57:50 AM UTC 24
Peak memory 176656 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2693593597 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_fib.vdb -cm_log /dev/null -cm_name 24.prim_lfsr_fib_test.2693593597
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/24.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/25.prim_lfsr_fib_test.1356383821
Short name T175
Test name
Test status
Simulation time 336438930000 ps
CPU time 252.96 seconds
Started Sep 01 04:26:45 AM UTC 24
Finished Sep 01 04:57:51 AM UTC 24
Peak memory 175128 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1356383821 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_fib.vdb -cm_log /dev/null -cm_name 25.prim_lfsr_fib_test.1356383821
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/25.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/26.prim_lfsr_fib_test.4090493511
Short name T178
Test name
Test status
Simulation time 336993750000 ps
CPU time 253.1 seconds
Started Sep 01 04:26:45 AM UTC 24
Finished Sep 01 04:57:57 AM UTC 24
Peak memory 175128 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4090493511 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_fib.vdb -cm_log /dev/null -cm_name 26.prim_lfsr_fib_test.4090493511
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/26.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/27.prim_lfsr_fib_test.38068917
Short name T177
Test name
Test status
Simulation time 336635890000 ps
CPU time 252.39 seconds
Started Sep 01 04:26:46 AM UTC 24
Finished Sep 01 04:57:55 AM UTC 24
Peak memory 175124 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=38068917 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ= +
en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_
fib.vdb -cm_log /dev/null -cm_name 27.prim_lfsr_fib_test.38068917
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/27.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/28.prim_lfsr_fib_test.521138392
Short name T179
Test name
Test status
Simulation time 336927690000 ps
CPU time 253.25 seconds
Started Sep 01 04:26:50 AM UTC 24
Finished Sep 01 04:57:59 AM UTC 24
Peak memory 176648 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=521138392 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24
_fib.vdb -cm_log /dev/null -cm_name 28.prim_lfsr_fib_test.521138392
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/28.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/29.prim_lfsr_fib_test.512112383
Short name T181
Test name
Test status
Simulation time 336366350000 ps
CPU time 252.57 seconds
Started Sep 01 04:26:50 AM UTC 24
Finished Sep 01 04:57:59 AM UTC 24
Peak memory 176660 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=512112383 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24
_fib.vdb -cm_log /dev/null -cm_name 29.prim_lfsr_fib_test.512112383
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/29.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/3.prim_lfsr_fib_test.902421633
Short name T34
Test name
Test status
Simulation time 336711750000 ps
CPU time 250.56 seconds
Started Sep 01 04:26:34 AM UTC 24
Finished Sep 01 04:57:37 AM UTC 24
Peak memory 176652 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=902421633 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24
_fib.vdb -cm_log /dev/null -cm_name 3.prim_lfsr_fib_test.902421633
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/3.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/30.prim_lfsr_fib_test.1750655566
Short name T183
Test name
Test status
Simulation time 336799350000 ps
CPU time 253.28 seconds
Started Sep 01 04:26:52 AM UTC 24
Finished Sep 01 04:58:02 AM UTC 24
Peak memory 175128 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1750655566 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_fib.vdb -cm_log /dev/null -cm_name 30.prim_lfsr_fib_test.1750655566
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/30.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/31.prim_lfsr_fib_test.3971939734
Short name T180
Test name
Test status
Simulation time 336519750000 ps
CPU time 252.2 seconds
Started Sep 01 04:26:52 AM UTC 24
Finished Sep 01 04:57:59 AM UTC 24
Peak memory 175128 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3971939734 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_fib.vdb -cm_log /dev/null -cm_name 31.prim_lfsr_fib_test.3971939734
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/31.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/32.prim_lfsr_fib_test.1727633964
Short name T182
Test name
Test status
Simulation time 336670510000 ps
CPU time 254.46 seconds
Started Sep 01 04:26:52 AM UTC 24
Finished Sep 01 04:58:01 AM UTC 24
Peak memory 175128 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1727633964 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_fib.vdb -cm_log /dev/null -cm_name 32.prim_lfsr_fib_test.1727633964
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/32.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/33.prim_lfsr_fib_test.1680026636
Short name T185
Test name
Test status
Simulation time 337075270000 ps
CPU time 252.21 seconds
Started Sep 01 04:26:53 AM UTC 24
Finished Sep 01 04:58:06 AM UTC 24
Peak memory 175120 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1680026636 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_fib.vdb -cm_log /dev/null -cm_name 33.prim_lfsr_fib_test.1680026636
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/33.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/34.prim_lfsr_fib_test.1449698089
Short name T184
Test name
Test status
Simulation time 337006150000 ps
CPU time 252.58 seconds
Started Sep 01 04:26:54 AM UTC 24
Finished Sep 01 04:58:05 AM UTC 24
Peak memory 175128 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1449698089 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_fib.vdb -cm_log /dev/null -cm_name 34.prim_lfsr_fib_test.1449698089
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/34.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/35.prim_lfsr_fib_test.2386463987
Short name T186
Test name
Test status
Simulation time 336688710000 ps
CPU time 252.02 seconds
Started Sep 01 04:26:56 AM UTC 24
Finished Sep 01 04:58:11 AM UTC 24
Peak memory 175128 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2386463987 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_fib.vdb -cm_log /dev/null -cm_name 35.prim_lfsr_fib_test.2386463987
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/35.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/36.prim_lfsr_fib_test.1666407162
Short name T188
Test name
Test status
Simulation time 337004450000 ps
CPU time 252.24 seconds
Started Sep 01 04:26:59 AM UTC 24
Finished Sep 01 04:58:18 AM UTC 24
Peak memory 175128 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1666407162 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_fib.vdb -cm_log /dev/null -cm_name 36.prim_lfsr_fib_test.1666407162
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/36.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/37.prim_lfsr_fib_test.4053547417
Short name T187
Test name
Test status
Simulation time 336551910000 ps
CPU time 251.94 seconds
Started Sep 01 04:27:01 AM UTC 24
Finished Sep 01 04:58:12 AM UTC 24
Peak memory 176656 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4053547417 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_fib.vdb -cm_log /dev/null -cm_name 37.prim_lfsr_fib_test.4053547417
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/37.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/38.prim_lfsr_fib_test.798893955
Short name T189
Test name
Test status
Simulation time 336544530000 ps
CPU time 252.34 seconds
Started Sep 01 04:27:02 AM UTC 24
Finished Sep 01 04:58:18 AM UTC 24
Peak memory 175116 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=798893955 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24
_fib.vdb -cm_log /dev/null -cm_name 38.prim_lfsr_fib_test.798893955
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/38.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/39.prim_lfsr_fib_test.586068524
Short name T191
Test name
Test status
Simulation time 337094730000 ps
CPU time 253.7 seconds
Started Sep 01 04:27:04 AM UTC 24
Finished Sep 01 04:58:22 AM UTC 24
Peak memory 175132 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=586068524 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24
_fib.vdb -cm_log /dev/null -cm_name 39.prim_lfsr_fib_test.586068524
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/39.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/4.prim_lfsr_fib_test.103936925
Short name T37
Test name
Test status
Simulation time 336667510000 ps
CPU time 252.63 seconds
Started Sep 01 04:26:38 AM UTC 24
Finished Sep 01 04:57:44 AM UTC 24
Peak memory 176652 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=103936925 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24
_fib.vdb -cm_log /dev/null -cm_name 4.prim_lfsr_fib_test.103936925
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/4.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/40.prim_lfsr_fib_test.2657480302
Short name T190
Test name
Test status
Simulation time 336788270000 ps
CPU time 251.98 seconds
Started Sep 01 04:27:04 AM UTC 24
Finished Sep 01 04:58:22 AM UTC 24
Peak memory 176652 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2657480302 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_fib.vdb -cm_log /dev/null -cm_name 40.prim_lfsr_fib_test.2657480302
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/40.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/41.prim_lfsr_fib_test.3072590056
Short name T193
Test name
Test status
Simulation time 336891270000 ps
CPU time 252.26 seconds
Started Sep 01 04:27:06 AM UTC 24
Finished Sep 01 04:58:25 AM UTC 24
Peak memory 175128 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3072590056 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_fib.vdb -cm_log /dev/null -cm_name 41.prim_lfsr_fib_test.3072590056
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/41.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/42.prim_lfsr_fib_test.2513852974
Short name T194
Test name
Test status
Simulation time 336322610000 ps
CPU time 252.52 seconds
Started Sep 01 04:27:08 AM UTC 24
Finished Sep 01 04:58:26 AM UTC 24
Peak memory 176656 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2513852974 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_fib.vdb -cm_log /dev/null -cm_name 42.prim_lfsr_fib_test.2513852974
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/42.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/43.prim_lfsr_fib_test.1722505726
Short name T192
Test name
Test status
Simulation time 336705410000 ps
CPU time 251.99 seconds
Started Sep 01 04:27:09 AM UTC 24
Finished Sep 01 04:58:25 AM UTC 24
Peak memory 175128 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1722505726 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_fib.vdb -cm_log /dev/null -cm_name 43.prim_lfsr_fib_test.1722505726
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/43.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/44.prim_lfsr_fib_test.3396063751
Short name T195
Test name
Test status
Simulation time 336349570000 ps
CPU time 254.4 seconds
Started Sep 01 04:27:13 AM UTC 24
Finished Sep 01 04:58:29 AM UTC 24
Peak memory 176656 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3396063751 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_fib.vdb -cm_log /dev/null -cm_name 44.prim_lfsr_fib_test.3396063751
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/44.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/45.prim_lfsr_fib_test.3823096467
Short name T198
Test name
Test status
Simulation time 336982390000 ps
CPU time 253.7 seconds
Started Sep 01 04:27:15 AM UTC 24
Finished Sep 01 04:58:40 AM UTC 24
Peak memory 175128 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3823096467 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_fib.vdb -cm_log /dev/null -cm_name 45.prim_lfsr_fib_test.3823096467
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/45.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/46.prim_lfsr_fib_test.1962180188
Short name T197
Test name
Test status
Simulation time 336811430000 ps
CPU time 251.24 seconds
Started Sep 01 04:27:15 AM UTC 24
Finished Sep 01 04:58:36 AM UTC 24
Peak memory 175128 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1962180188 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_fib.vdb -cm_log /dev/null -cm_name 46.prim_lfsr_fib_test.1962180188
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/46.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/47.prim_lfsr_fib_test.352587971
Short name T196
Test name
Test status
Simulation time 336651050000 ps
CPU time 252.05 seconds
Started Sep 01 04:27:15 AM UTC 24
Finished Sep 01 04:58:32 AM UTC 24
Peak memory 175132 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=352587971 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24
_fib.vdb -cm_log /dev/null -cm_name 47.prim_lfsr_fib_test.352587971
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/47.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/48.prim_lfsr_fib_test.2676021589
Short name T199
Test name
Test status
Simulation time 336540170000 ps
CPU time 253.72 seconds
Started Sep 01 04:27:19 AM UTC 24
Finished Sep 01 04:58:41 AM UTC 24
Peak memory 175128 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2676021589 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_fib.vdb -cm_log /dev/null -cm_name 48.prim_lfsr_fib_test.2676021589
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/48.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/49.prim_lfsr_fib_test.4281441731
Short name T200
Test name
Test status
Simulation time 336879870000 ps
CPU time 252.25 seconds
Started Sep 01 04:27:22 AM UTC 24
Finished Sep 01 04:58:48 AM UTC 24
Peak memory 175128 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4281441731 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_fib.vdb -cm_log /dev/null -cm_name 49.prim_lfsr_fib_test.4281441731
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/49.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/5.prim_lfsr_fib_test.3467536187
Short name T161
Test name
Test status
Simulation time 336960170000 ps
CPU time 253.17 seconds
Started Sep 01 04:26:39 AM UTC 24
Finished Sep 01 04:57:46 AM UTC 24
Peak memory 175124 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3467536187 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_fib.vdb -cm_log /dev/null -cm_name 5.prim_lfsr_fib_test.3467536187
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/5.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/6.prim_lfsr_fib_test.3637828013
Short name T162
Test name
Test status
Simulation time 337050410000 ps
CPU time 250.61 seconds
Started Sep 01 04:26:39 AM UTC 24
Finished Sep 01 04:57:46 AM UTC 24
Peak memory 175124 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3637828013 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_fib.vdb -cm_log /dev/null -cm_name 6.prim_lfsr_fib_test.3637828013
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/6.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/7.prim_lfsr_fib_test.3556368804
Short name T39
Test name
Test status
Simulation time 337017230000 ps
CPU time 254.3 seconds
Started Sep 01 04:26:39 AM UTC 24
Finished Sep 01 04:57:45 AM UTC 24
Peak memory 176652 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3556368804 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_fib.vdb -cm_log /dev/null -cm_name 7.prim_lfsr_fib_test.3556368804
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/7.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/8.prim_lfsr_fib_test.2574581189
Short name T38
Test name
Test status
Simulation time 336574790000 ps
CPU time 251.76 seconds
Started Sep 01 04:26:40 AM UTC 24
Finished Sep 01 04:57:45 AM UTC 24
Peak memory 176508 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2574581189 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_fib.vdb -cm_log /dev/null -cm_name 8.prim_lfsr_fib_test.2574581189
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/8.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_fib/9.prim_lfsr_fib_test.3074215938
Short name T36
Test name
Test status
Simulation time 336649910000 ps
CPU time 252.65 seconds
Started Sep 01 04:26:40 AM UTC 24
Finished Sep 01 04:57:44 AM UTC 24
Peak memory 176652 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3074215938 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_fib.vdb -cm_log /dev/null -cm_name 9.prim_lfsr_fib_test.3074215938
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/9.prim_lfsr_fib_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/1.prim_lfsr_gal_test.3989608202
Short name T14
Test name
Test status
Simulation time 336516910000 ps
CPU time 276.85 seconds
Started Sep 01 03:34:44 AM UTC 24
Finished Sep 01 04:11:58 AM UTC 24
Peak memory 176716 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3989608202 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_gal.vdb -cm_log /dev/null -cm_name 1.prim_lfsr_gal_test.3989608202
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/1.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/10.prim_lfsr_gal_test.214302335
Short name T90
Test name
Test status
Simulation time 336689210000 ps
CPU time 280.25 seconds
Started Sep 01 03:34:46 AM UTC 24
Finished Sep 01 04:12:02 AM UTC 24
Peak memory 176660 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=214302335 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24
_gal.vdb -cm_log /dev/null -cm_name 10.prim_lfsr_gal_test.214302335
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/10.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/11.prim_lfsr_gal_test.2523568842
Short name T98
Test name
Test status
Simulation time 337028370000 ps
CPU time 279.05 seconds
Started Sep 01 03:34:46 AM UTC 24
Finished Sep 01 04:12:04 AM UTC 24
Peak memory 175128 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2523568842 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_gal.vdb -cm_log /dev/null -cm_name 11.prim_lfsr_gal_test.2523568842
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/11.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/12.prim_lfsr_gal_test.1159848355
Short name T82
Test name
Test status
Simulation time 336568430000 ps
CPU time 279.71 seconds
Started Sep 01 03:34:46 AM UTC 24
Finished Sep 01 04:12:01 AM UTC 24
Peak memory 176648 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1159848355 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_gal.vdb -cm_log /dev/null -cm_name 12.prim_lfsr_gal_test.1159848355
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/12.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/13.prim_lfsr_gal_test.2572107183
Short name T104
Test name
Test status
Simulation time 336984170000 ps
CPU time 277.72 seconds
Started Sep 01 03:34:47 AM UTC 24
Finished Sep 01 04:12:05 AM UTC 24
Peak memory 176656 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2572107183 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_gal.vdb -cm_log /dev/null -cm_name 13.prim_lfsr_gal_test.2572107183
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/13.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/14.prim_lfsr_gal_test.1162463152
Short name T84
Test name
Test status
Simulation time 336504590000 ps
CPU time 277.71 seconds
Started Sep 01 03:34:47 AM UTC 24
Finished Sep 01 04:12:02 AM UTC 24
Peak memory 175128 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1162463152 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_gal.vdb -cm_log /dev/null -cm_name 14.prim_lfsr_gal_test.1162463152
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/14.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/15.prim_lfsr_gal_test.2580326610
Short name T23
Test name
Test status
Simulation time 336470970000 ps
CPU time 277.56 seconds
Started Sep 01 03:34:47 AM UTC 24
Finished Sep 01 04:12:00 AM UTC 24
Peak memory 175128 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2580326610 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_gal.vdb -cm_log /dev/null -cm_name 15.prim_lfsr_gal_test.2580326610
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/15.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/16.prim_lfsr_gal_test.2885552075
Short name T93
Test name
Test status
Simulation time 336872610000 ps
CPU time 277 seconds
Started Sep 01 03:34:47 AM UTC 24
Finished Sep 01 04:12:03 AM UTC 24
Peak memory 176560 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2885552075 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_gal.vdb -cm_log /dev/null -cm_name 16.prim_lfsr_gal_test.2885552075
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/16.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/17.prim_lfsr_gal_test.482494805
Short name T108
Test name
Test status
Simulation time 336900950000 ps
CPU time 280.07 seconds
Started Sep 01 03:34:47 AM UTC 24
Finished Sep 01 04:12:06 AM UTC 24
Peak memory 175128 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=482494805 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24
_gal.vdb -cm_log /dev/null -cm_name 17.prim_lfsr_gal_test.482494805
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/17.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/18.prim_lfsr_gal_test.496596196
Short name T91
Test name
Test status
Simulation time 336785010000 ps
CPU time 274.85 seconds
Started Sep 01 03:34:47 AM UTC 24
Finished Sep 01 04:12:02 AM UTC 24
Peak memory 176660 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=496596196 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24
_gal.vdb -cm_log /dev/null -cm_name 18.prim_lfsr_gal_test.496596196
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/18.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/19.prim_lfsr_gal_test.4224768070
Short name T21
Test name
Test status
Simulation time 336454750000 ps
CPU time 275.37 seconds
Started Sep 01 03:34:47 AM UTC 24
Finished Sep 01 04:12:00 AM UTC 24
Peak memory 175128 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4224768070 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_gal.vdb -cm_log /dev/null -cm_name 19.prim_lfsr_gal_test.4224768070
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/19.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/2.prim_lfsr_gal_test.3529951132
Short name T19
Test name
Test status
Simulation time 336754630000 ps
CPU time 277.56 seconds
Started Sep 01 03:34:44 AM UTC 24
Finished Sep 01 04:11:59 AM UTC 24
Peak memory 175124 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3529951132 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_gal.vdb -cm_log /dev/null -cm_name 2.prim_lfsr_gal_test.3529951132
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/2.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/20.prim_lfsr_gal_test.1551461084
Short name T105
Test name
Test status
Simulation time 336897990000 ps
CPU time 279.34 seconds
Started Sep 01 03:34:47 AM UTC 24
Finished Sep 01 04:12:05 AM UTC 24
Peak memory 175128 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1551461084 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_gal.vdb -cm_log /dev/null -cm_name 20.prim_lfsr_gal_test.1551461084
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/20.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/21.prim_lfsr_gal_test.533316736
Short name T92
Test name
Test status
Simulation time 336763390000 ps
CPU time 275.74 seconds
Started Sep 01 03:34:47 AM UTC 24
Finished Sep 01 04:12:02 AM UTC 24
Peak memory 176660 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=533316736 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24
_gal.vdb -cm_log /dev/null -cm_name 21.prim_lfsr_gal_test.533316736
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/21.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/22.prim_lfsr_gal_test.3854291933
Short name T106
Test name
Test status
Simulation time 337130810000 ps
CPU time 277.05 seconds
Started Sep 01 03:34:47 AM UTC 24
Finished Sep 01 04:12:05 AM UTC 24
Peak memory 176656 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3854291933 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_gal.vdb -cm_log /dev/null -cm_name 22.prim_lfsr_gal_test.3854291933
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/22.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/23.prim_lfsr_gal_test.394071469
Short name T86
Test name
Test status
Simulation time 336582310000 ps
CPU time 278.16 seconds
Started Sep 01 03:34:47 AM UTC 24
Finished Sep 01 04:12:02 AM UTC 24
Peak memory 176660 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=394071469 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24
_gal.vdb -cm_log /dev/null -cm_name 23.prim_lfsr_gal_test.394071469
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/23.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/24.prim_lfsr_gal_test.4223245833
Short name T97
Test name
Test status
Simulation time 336921870000 ps
CPU time 275.94 seconds
Started Sep 01 03:34:47 AM UTC 24
Finished Sep 01 04:12:04 AM UTC 24
Peak memory 175128 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4223245833 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_gal.vdb -cm_log /dev/null -cm_name 24.prim_lfsr_gal_test.4223245833
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/24.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/25.prim_lfsr_gal_test.728704637
Short name T99
Test name
Test status
Simulation time 336825850000 ps
CPU time 277.98 seconds
Started Sep 01 03:34:47 AM UTC 24
Finished Sep 01 04:12:04 AM UTC 24
Peak memory 176660 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=728704637 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24
_gal.vdb -cm_log /dev/null -cm_name 25.prim_lfsr_gal_test.728704637
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/25.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/26.prim_lfsr_gal_test.128211324
Short name T20
Test name
Test status
Simulation time 336352730000 ps
CPU time 275.69 seconds
Started Sep 01 03:34:47 AM UTC 24
Finished Sep 01 04:12:00 AM UTC 24
Peak memory 176660 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=128211324 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24
_gal.vdb -cm_log /dev/null -cm_name 26.prim_lfsr_gal_test.128211324
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/26.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/27.prim_lfsr_gal_test.1166435948
Short name T110
Test name
Test status
Simulation time 336974330000 ps
CPU time 282.52 seconds
Started Sep 01 03:34:47 AM UTC 24
Finished Sep 01 04:12:06 AM UTC 24
Peak memory 176656 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1166435948 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_gal.vdb -cm_log /dev/null -cm_name 27.prim_lfsr_gal_test.1166435948
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/27.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/28.prim_lfsr_gal_test.2043892905
Short name T85
Test name
Test status
Simulation time 336612450000 ps
CPU time 275.4 seconds
Started Sep 01 03:34:47 AM UTC 24
Finished Sep 01 04:12:02 AM UTC 24
Peak memory 175128 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2043892905 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_gal.vdb -cm_log /dev/null -cm_name 28.prim_lfsr_gal_test.2043892905
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/28.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/29.prim_lfsr_gal_test.984898530
Short name T100
Test name
Test status
Simulation time 336696570000 ps
CPU time 280.63 seconds
Started Sep 01 03:34:48 AM UTC 24
Finished Sep 01 04:12:04 AM UTC 24
Peak memory 175132 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=984898530 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24
_gal.vdb -cm_log /dev/null -cm_name 29.prim_lfsr_gal_test.984898530
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/29.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/3.prim_lfsr_gal_test.3166073097
Short name T17
Test name
Test status
Simulation time 336568530000 ps
CPU time 276.12 seconds
Started Sep 01 03:34:45 AM UTC 24
Finished Sep 01 04:11:59 AM UTC 24
Peak memory 176664 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3166073097 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_gal.vdb -cm_log /dev/null -cm_name 3.prim_lfsr_gal_test.3166073097
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/3.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/30.prim_lfsr_gal_test.1536903682
Short name T95
Test name
Test status
Simulation time 336660150000 ps
CPU time 277.35 seconds
Started Sep 01 03:34:49 AM UTC 24
Finished Sep 01 04:12:03 AM UTC 24
Peak memory 176656 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1536903682 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_gal.vdb -cm_log /dev/null -cm_name 30.prim_lfsr_gal_test.1536903682
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/30.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/31.prim_lfsr_gal_test.357484826
Short name T81
Test name
Test status
Simulation time 336357250000 ps
CPU time 275.27 seconds
Started Sep 01 03:34:49 AM UTC 24
Finished Sep 01 04:12:01 AM UTC 24
Peak memory 176660 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=357484826 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24
_gal.vdb -cm_log /dev/null -cm_name 31.prim_lfsr_gal_test.357484826
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/31.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/32.prim_lfsr_gal_test.2041336515
Short name T113
Test name
Test status
Simulation time 336934750000 ps
CPU time 281.81 seconds
Started Sep 01 03:34:49 AM UTC 24
Finished Sep 01 04:12:07 AM UTC 24
Peak memory 175128 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2041336515 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_gal.vdb -cm_log /dev/null -cm_name 32.prim_lfsr_gal_test.2041336515
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/32.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/33.prim_lfsr_gal_test.4080919441
Short name T101
Test name
Test status
Simulation time 336857610000 ps
CPU time 275.99 seconds
Started Sep 01 03:34:49 AM UTC 24
Finished Sep 01 04:12:04 AM UTC 24
Peak memory 176656 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4080919441 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_gal.vdb -cm_log /dev/null -cm_name 33.prim_lfsr_gal_test.4080919441
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/33.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/34.prim_lfsr_gal_test.1631347526
Short name T112
Test name
Test status
Simulation time 337176090000 ps
CPU time 277.04 seconds
Started Sep 01 03:34:49 AM UTC 24
Finished Sep 01 04:12:07 AM UTC 24
Peak memory 176656 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1631347526 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_gal.vdb -cm_log /dev/null -cm_name 34.prim_lfsr_gal_test.1631347526
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/34.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/35.prim_lfsr_gal_test.3436773380
Short name T107
Test name
Test status
Simulation time 336791730000 ps
CPU time 277.36 seconds
Started Sep 01 03:34:49 AM UTC 24
Finished Sep 01 04:12:05 AM UTC 24
Peak memory 176656 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3436773380 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_gal.vdb -cm_log /dev/null -cm_name 35.prim_lfsr_gal_test.3436773380
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/35.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/36.prim_lfsr_gal_test.4257029729
Short name T102
Test name
Test status
Simulation time 336711030000 ps
CPU time 278.44 seconds
Started Sep 01 03:34:49 AM UTC 24
Finished Sep 01 04:12:04 AM UTC 24
Peak memory 176656 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4257029729 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_gal.vdb -cm_log /dev/null -cm_name 36.prim_lfsr_gal_test.4257029729
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/36.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/37.prim_lfsr_gal_test.1078239973
Short name T89
Test name
Test status
Simulation time 336481050000 ps
CPU time 274.59 seconds
Started Sep 01 03:34:49 AM UTC 24
Finished Sep 01 04:12:02 AM UTC 24
Peak memory 176656 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1078239973 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_gal.vdb -cm_log /dev/null -cm_name 37.prim_lfsr_gal_test.1078239973
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/37.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/38.prim_lfsr_gal_test.1794675609
Short name T111
Test name
Test status
Simulation time 336898130000 ps
CPU time 280.25 seconds
Started Sep 01 03:34:49 AM UTC 24
Finished Sep 01 04:12:06 AM UTC 24
Peak memory 176656 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1794675609 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_gal.vdb -cm_log /dev/null -cm_name 38.prim_lfsr_gal_test.1794675609
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/38.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/39.prim_lfsr_gal_test.1121181933
Short name T94
Test name
Test status
Simulation time 336632990000 ps
CPU time 275.23 seconds
Started Sep 01 03:34:49 AM UTC 24
Finished Sep 01 04:12:03 AM UTC 24
Peak memory 175128 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1121181933 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_gal.vdb -cm_log /dev/null -cm_name 39.prim_lfsr_gal_test.1121181933
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/39.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/4.prim_lfsr_gal_test.3102450716
Short name T22
Test name
Test status
Simulation time 336892830000 ps
CPU time 275.38 seconds
Started Sep 01 03:34:45 AM UTC 24
Finished Sep 01 04:12:00 AM UTC 24
Peak memory 176652 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3102450716 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_gal.vdb -cm_log /dev/null -cm_name 4.prim_lfsr_gal_test.3102450716
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/4.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/40.prim_lfsr_gal_test.3989963456
Short name T115
Test name
Test status
Simulation time 336987530000 ps
CPU time 280.54 seconds
Started Sep 01 03:34:49 AM UTC 24
Finished Sep 01 04:12:07 AM UTC 24
Peak memory 176656 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3989963456 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_gal.vdb -cm_log /dev/null -cm_name 40.prim_lfsr_gal_test.3989963456
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/40.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/41.prim_lfsr_gal_test.853159882
Short name T96
Test name
Test status
Simulation time 336692730000 ps
CPU time 276.22 seconds
Started Sep 01 03:34:49 AM UTC 24
Finished Sep 01 04:12:04 AM UTC 24
Peak memory 175132 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=853159882 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24
_gal.vdb -cm_log /dev/null -cm_name 41.prim_lfsr_gal_test.853159882
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/41.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/42.prim_lfsr_gal_test.3387214816
Short name T116
Test name
Test status
Simulation time 337020990000 ps
CPU time 281.36 seconds
Started Sep 01 03:34:49 AM UTC 24
Finished Sep 01 04:12:08 AM UTC 24
Peak memory 176652 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3387214816 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_gal.vdb -cm_log /dev/null -cm_name 42.prim_lfsr_gal_test.3387214816
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/42.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/43.prim_lfsr_gal_test.3930051332
Short name T114
Test name
Test status
Simulation time 336959370000 ps
CPU time 277.86 seconds
Started Sep 01 03:34:49 AM UTC 24
Finished Sep 01 04:12:07 AM UTC 24
Peak memory 176656 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3930051332 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_gal.vdb -cm_log /dev/null -cm_name 43.prim_lfsr_gal_test.3930051332
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/43.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/44.prim_lfsr_gal_test.3379888884
Short name T103
Test name
Test status
Simulation time 336427910000 ps
CPU time 278.4 seconds
Started Sep 01 03:34:50 AM UTC 24
Finished Sep 01 04:12:05 AM UTC 24
Peak memory 176656 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3379888884 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_gal.vdb -cm_log /dev/null -cm_name 44.prim_lfsr_gal_test.3379888884
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/44.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/45.prim_lfsr_gal_test.3548234575
Short name T117
Test name
Test status
Simulation time 336776870000 ps
CPU time 281.07 seconds
Started Sep 01 03:34:51 AM UTC 24
Finished Sep 01 04:12:08 AM UTC 24
Peak memory 175128 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3548234575 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_gal.vdb -cm_log /dev/null -cm_name 45.prim_lfsr_gal_test.3548234575
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/45.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/46.prim_lfsr_gal_test.3954280812
Short name T109
Test name
Test status
Simulation time 336496770000 ps
CPU time 277.61 seconds
Started Sep 01 03:34:51 AM UTC 24
Finished Sep 01 04:12:06 AM UTC 24
Peak memory 175112 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3954280812 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_gal.vdb -cm_log /dev/null -cm_name 46.prim_lfsr_gal_test.3954280812
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/46.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/47.prim_lfsr_gal_test.3070160259
Short name T120
Test name
Test status
Simulation time 337115490000 ps
CPU time 283.03 seconds
Started Sep 01 03:34:52 AM UTC 24
Finished Sep 01 04:12:12 AM UTC 24
Peak memory 176656 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3070160259 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_gal.vdb -cm_log /dev/null -cm_name 47.prim_lfsr_gal_test.3070160259
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/47.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/48.prim_lfsr_gal_test.3122147913
Short name T118
Test name
Test status
Simulation time 336486890000 ps
CPU time 278.69 seconds
Started Sep 01 03:34:53 AM UTC 24
Finished Sep 01 04:12:09 AM UTC 24
Peak memory 176656 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3122147913 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_gal.vdb -cm_log /dev/null -cm_name 48.prim_lfsr_gal_test.3122147913
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/48.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/49.prim_lfsr_gal_test.1032805441
Short name T119
Test name
Test status
Simulation time 337118030000 ps
CPU time 273.81 seconds
Started Sep 01 03:34:54 AM UTC 24
Finished Sep 01 04:12:10 AM UTC 24
Peak memory 175128 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1032805441 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_gal.vdb -cm_log /dev/null -cm_name 49.prim_lfsr_gal_test.1032805441
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/49.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/5.prim_lfsr_gal_test.3188172858
Short name T15
Test name
Test status
Simulation time 336529850000 ps
CPU time 274.88 seconds
Started Sep 01 03:34:46 AM UTC 24
Finished Sep 01 04:11:58 AM UTC 24
Peak memory 176664 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3188172858 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_gal.vdb -cm_log /dev/null -cm_name 5.prim_lfsr_gal_test.3188172858
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/5.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/6.prim_lfsr_gal_test.2188714765
Short name T87
Test name
Test status
Simulation time 336704830000 ps
CPU time 279.33 seconds
Started Sep 01 03:34:46 AM UTC 24
Finished Sep 01 04:12:02 AM UTC 24
Peak memory 175124 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2188714765 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_gal.vdb -cm_log /dev/null -cm_name 6.prim_lfsr_gal_test.2188714765
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/6.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/7.prim_lfsr_gal_test.3767910245
Short name T83
Test name
Test status
Simulation time 336938570000 ps
CPU time 276.79 seconds
Started Sep 01 03:34:46 AM UTC 24
Finished Sep 01 04:12:01 AM UTC 24
Peak memory 176652 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3767910245 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_gal.vdb -cm_log /dev/null -cm_name 7.prim_lfsr_gal_test.3767910245
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/7.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/8.prim_lfsr_gal_test.1412504343
Short name T16
Test name
Test status
Simulation time 336584230000 ps
CPU time 273.25 seconds
Started Sep 01 03:34:46 AM UTC 24
Finished Sep 01 04:11:59 AM UTC 24
Peak memory 176652 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1412504343 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_gal.vdb -cm_log /dev/null -cm_name 8.prim_lfsr_gal_test.1412504343
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/8.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_24_gal/9.prim_lfsr_gal_test.4268811069
Short name T88
Test name
Test status
Simulation time 336758130000 ps
CPU time 279.74 seconds
Started Sep 01 03:34:46 AM UTC 24
Finished Sep 01 04:12:02 AM UTC 24
Peak memory 176652 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_24_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBO
SITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4268811069 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_2
4_gal.vdb -cm_log /dev/null -cm_name 9.prim_lfsr_gal_test.4268811069
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/9.prim_lfsr_gal_test/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/1.prim_lfsr_fib_smoke.4212959879
Short name T4
Test name
Test status
Simulation time 1273150000 ps
CPU time 2.18 seconds
Started Sep 01 03:33:20 AM UTC 24
Finished Sep 01 03:33:31 AM UTC 24
Peak memory 177840 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4212959879 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 1.prim_lfsr_fib_smoke.4212959879
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/1.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/10.prim_lfsr_fib_smoke.4249245558
Short name T121
Test name
Test status
Simulation time 1564510000 ps
CPU time 2.43 seconds
Started Sep 01 03:33:29 AM UTC 24
Finished Sep 01 03:33:42 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4249245558 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 10.prim_lfsr_fib_smoke.4249245558
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/10.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/11.prim_lfsr_fib_smoke.3664632079
Short name T132
Test name
Test status
Simulation time 1459470000 ps
CPU time 2.35 seconds
Started Sep 01 03:33:44 AM UTC 24
Finished Sep 01 03:33:56 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3664632079 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 11.prim_lfsr_fib_smoke.3664632079
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/11.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/12.prim_lfsr_fib_smoke.1016579311
Short name T124
Test name
Test status
Simulation time 1258350000 ps
CPU time 2.17 seconds
Started Sep 01 03:33:44 AM UTC 24
Finished Sep 01 03:33:55 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1016579311 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 12.prim_lfsr_fib_smoke.1016579311
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/12.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/13.prim_lfsr_fib_smoke.2193289150
Short name T137
Test name
Test status
Simulation time 1548290000 ps
CPU time 2.47 seconds
Started Sep 01 03:33:44 AM UTC 24
Finished Sep 01 03:33:57 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2193289150 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 13.prim_lfsr_fib_smoke.2193289150
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/13.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/14.prim_lfsr_fib_smoke.1987591394
Short name T128
Test name
Test status
Simulation time 1379310000 ps
CPU time 2.39 seconds
Started Sep 01 03:33:44 AM UTC 24
Finished Sep 01 03:33:56 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1987591394 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 14.prim_lfsr_fib_smoke.1987591394
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/14.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/15.prim_lfsr_fib_smoke.3788829825
Short name T127
Test name
Test status
Simulation time 1336010000 ps
CPU time 2.38 seconds
Started Sep 01 03:33:44 AM UTC 24
Finished Sep 01 03:33:55 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3788829825 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 15.prim_lfsr_fib_smoke.3788829825
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/15.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/16.prim_lfsr_fib_smoke.1669894280
Short name T126
Test name
Test status
Simulation time 1277790000 ps
CPU time 2.28 seconds
Started Sep 01 03:33:44 AM UTC 24
Finished Sep 01 03:33:55 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1669894280 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 16.prim_lfsr_fib_smoke.1669894280
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/16.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/17.prim_lfsr_fib_smoke.609590355
Short name T123
Test name
Test status
Simulation time 1178610000 ps
CPU time 2.16 seconds
Started Sep 01 03:33:44 AM UTC 24
Finished Sep 01 03:33:55 AM UTC 24
Peak memory 177768 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=609590355 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ= +
en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_f
ib.vdb -cm_log /dev/null -cm_name 17.prim_lfsr_fib_smoke.609590355
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/17.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/18.prim_lfsr_fib_smoke.88462241
Short name T122
Test name
Test status
Simulation time 1000570000 ps
CPU time 1.95 seconds
Started Sep 01 03:33:44 AM UTC 24
Finished Sep 01 03:33:53 AM UTC 24
Peak memory 177772 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=88462241 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ= +e
n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fi
b.vdb -cm_log /dev/null -cm_name 18.prim_lfsr_fib_smoke.88462241
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/18.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/19.prim_lfsr_fib_smoke.4268947200
Short name T131
Test name
Test status
Simulation time 1385210000 ps
CPU time 2.15 seconds
Started Sep 01 03:33:44 AM UTC 24
Finished Sep 01 03:33:56 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4268947200 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 19.prim_lfsr_fib_smoke.4268947200
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/19.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/2.prim_lfsr_fib_smoke.1764877825
Short name T6
Test name
Test status
Simulation time 1572670000 ps
CPU time 2.45 seconds
Started Sep 01 03:33:21 AM UTC 24
Finished Sep 01 03:33:34 AM UTC 24
Peak memory 177772 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1764877825 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 2.prim_lfsr_fib_smoke.1764877825
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/2.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/20.prim_lfsr_fib_smoke.1978531163
Short name T129
Test name
Test status
Simulation time 1349090000 ps
CPU time 2.25 seconds
Started Sep 01 03:33:44 AM UTC 24
Finished Sep 01 03:33:56 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1978531163 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 20.prim_lfsr_fib_smoke.1978531163
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/20.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/21.prim_lfsr_fib_smoke.1625113231
Short name T134
Test name
Test status
Simulation time 1403770000 ps
CPU time 2.37 seconds
Started Sep 01 03:33:44 AM UTC 24
Finished Sep 01 03:33:56 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1625113231 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 21.prim_lfsr_fib_smoke.1625113231
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/21.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/22.prim_lfsr_fib_smoke.1297337204
Short name T125
Test name
Test status
Simulation time 1237670000 ps
CPU time 2.19 seconds
Started Sep 01 03:33:44 AM UTC 24
Finished Sep 01 03:33:55 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1297337204 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 22.prim_lfsr_fib_smoke.1297337204
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/22.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/23.prim_lfsr_fib_smoke.3451534480
Short name T135
Test name
Test status
Simulation time 1444790000 ps
CPU time 2.34 seconds
Started Sep 01 03:33:44 AM UTC 24
Finished Sep 01 03:33:57 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3451534480 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 23.prim_lfsr_fib_smoke.3451534480
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/23.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/24.prim_lfsr_fib_smoke.1073942710
Short name T133
Test name
Test status
Simulation time 1373950000 ps
CPU time 2.16 seconds
Started Sep 01 03:33:45 AM UTC 24
Finished Sep 01 03:33:56 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1073942710 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 24.prim_lfsr_fib_smoke.1073942710
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/24.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/25.prim_lfsr_fib_smoke.794770773
Short name T130
Test name
Test status
Simulation time 1310930000 ps
CPU time 2.2 seconds
Started Sep 01 03:33:45 AM UTC 24
Finished Sep 01 03:33:56 AM UTC 24
Peak memory 177768 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=794770773 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ= +
en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_f
ib.vdb -cm_log /dev/null -cm_name 25.prim_lfsr_fib_smoke.794770773
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/25.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/26.prim_lfsr_fib_smoke.1127717027
Short name T138
Test name
Test status
Simulation time 1503410000 ps
CPU time 2.39 seconds
Started Sep 01 03:33:45 AM UTC 24
Finished Sep 01 03:33:57 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1127717027 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 26.prim_lfsr_fib_smoke.1127717027
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/26.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/27.prim_lfsr_fib_smoke.596704716
Short name T139
Test name
Test status
Simulation time 1494990000 ps
CPU time 2.32 seconds
Started Sep 01 03:33:45 AM UTC 24
Finished Sep 01 03:33:57 AM UTC 24
Peak memory 177768 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=596704716 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ= +
en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_f
ib.vdb -cm_log /dev/null -cm_name 27.prim_lfsr_fib_smoke.596704716
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/27.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/28.prim_lfsr_fib_smoke.1053720142
Short name T136
Test name
Test status
Simulation time 1425650000 ps
CPU time 2.48 seconds
Started Sep 01 03:33:45 AM UTC 24
Finished Sep 01 03:33:57 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1053720142 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 28.prim_lfsr_fib_smoke.1053720142
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/28.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/29.prim_lfsr_fib_smoke.344680976
Short name T141
Test name
Test status
Simulation time 1500970000 ps
CPU time 2.22 seconds
Started Sep 01 03:33:46 AM UTC 24
Finished Sep 01 03:33:58 AM UTC 24
Peak memory 177768 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=344680976 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ= +
en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_f
ib.vdb -cm_log /dev/null -cm_name 29.prim_lfsr_fib_smoke.344680976
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/29.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/3.prim_lfsr_fib_smoke.3701967727
Short name T27
Test name
Test status
Simulation time 1541530000 ps
CPU time 2.28 seconds
Started Sep 01 03:33:23 AM UTC 24
Finished Sep 01 03:33:36 AM UTC 24
Peak memory 177772 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3701967727 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 3.prim_lfsr_fib_smoke.3701967727
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/3.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/30.prim_lfsr_fib_smoke.3927206416
Short name T140
Test name
Test status
Simulation time 1381370000 ps
CPU time 2.37 seconds
Started Sep 01 03:33:46 AM UTC 24
Finished Sep 01 03:33:57 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3927206416 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 30.prim_lfsr_fib_smoke.3927206416
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/30.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/31.prim_lfsr_fib_smoke.2133322826
Short name T142
Test name
Test status
Simulation time 1421350000 ps
CPU time 2.44 seconds
Started Sep 01 03:33:47 AM UTC 24
Finished Sep 01 03:33:59 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2133322826 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 31.prim_lfsr_fib_smoke.2133322826
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/31.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/32.prim_lfsr_fib_smoke.1949554000
Short name T143
Test name
Test status
Simulation time 1579890000 ps
CPU time 2.25 seconds
Started Sep 01 03:33:49 AM UTC 24
Finished Sep 01 03:34:01 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1949554000 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 32.prim_lfsr_fib_smoke.1949554000
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/32.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/33.prim_lfsr_fib_smoke.250368574
Short name T144
Test name
Test status
Simulation time 1598730000 ps
CPU time 2.39 seconds
Started Sep 01 03:33:49 AM UTC 24
Finished Sep 01 03:34:01 AM UTC 24
Peak memory 177772 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=250368574 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ= +
en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_f
ib.vdb -cm_log /dev/null -cm_name 33.prim_lfsr_fib_smoke.250368574
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/33.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/34.prim_lfsr_fib_smoke.1777962174
Short name T145
Test name
Test status
Simulation time 1506610000 ps
CPU time 2.45 seconds
Started Sep 01 03:33:51 AM UTC 24
Finished Sep 01 03:34:03 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1777962174 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 34.prim_lfsr_fib_smoke.1777962174
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/34.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/35.prim_lfsr_fib_smoke.1323567302
Short name T147
Test name
Test status
Simulation time 1484050000 ps
CPU time 2.12 seconds
Started Sep 01 03:33:53 AM UTC 24
Finished Sep 01 03:34:04 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1323567302 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 35.prim_lfsr_fib_smoke.1323567302
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/35.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/36.prim_lfsr_fib_smoke.4224139056
Short name T146
Test name
Test status
Simulation time 1446410000 ps
CPU time 2.31 seconds
Started Sep 01 03:33:53 AM UTC 24
Finished Sep 01 03:34:04 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4224139056 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 36.prim_lfsr_fib_smoke.4224139056
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/36.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/37.prim_lfsr_fib_smoke.3700600023
Short name T148
Test name
Test status
Simulation time 1425810000 ps
CPU time 2.24 seconds
Started Sep 01 03:33:55 AM UTC 24
Finished Sep 01 03:34:05 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3700600023 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 37.prim_lfsr_fib_smoke.3700600023
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/37.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/38.prim_lfsr_fib_smoke.2754279356
Short name T152
Test name
Test status
Simulation time 1519050000 ps
CPU time 2.26 seconds
Started Sep 01 03:33:55 AM UTC 24
Finished Sep 01 03:34:06 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2754279356 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 38.prim_lfsr_fib_smoke.2754279356
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/38.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/39.prim_lfsr_fib_smoke.3213204209
Short name T154
Test name
Test status
Simulation time 1587210000 ps
CPU time 2.35 seconds
Started Sep 01 03:33:55 AM UTC 24
Finished Sep 01 03:34:06 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3213204209 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 39.prim_lfsr_fib_smoke.3213204209
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/39.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/4.prim_lfsr_fib_smoke.2786536420
Short name T24
Test name
Test status
Simulation time 1395250000 ps
CPU time 2.32 seconds
Started Sep 01 03:33:23 AM UTC 24
Finished Sep 01 03:33:35 AM UTC 24
Peak memory 177772 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2786536420 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 4.prim_lfsr_fib_smoke.2786536420
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/4.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/40.prim_lfsr_fib_smoke.2121280153
Short name T155
Test name
Test status
Simulation time 1393490000 ps
CPU time 2.2 seconds
Started Sep 01 03:33:56 AM UTC 24
Finished Sep 01 03:34:06 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2121280153 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 40.prim_lfsr_fib_smoke.2121280153
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/40.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/41.prim_lfsr_fib_smoke.1344471455
Short name T156
Test name
Test status
Simulation time 1422250000 ps
CPU time 2.35 seconds
Started Sep 01 03:33:56 AM UTC 24
Finished Sep 01 03:34:06 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1344471455 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 41.prim_lfsr_fib_smoke.1344471455
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/41.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/42.prim_lfsr_fib_smoke.2259339426
Short name T158
Test name
Test status
Simulation time 1522770000 ps
CPU time 2.19 seconds
Started Sep 01 03:33:56 AM UTC 24
Finished Sep 01 03:34:07 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2259339426 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 42.prim_lfsr_fib_smoke.2259339426
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/42.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/43.prim_lfsr_fib_smoke.1950507342
Short name T151
Test name
Test status
Simulation time 1326510000 ps
CPU time 2.05 seconds
Started Sep 01 03:33:56 AM UTC 24
Finished Sep 01 03:34:06 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1950507342 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 43.prim_lfsr_fib_smoke.1950507342
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/43.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/44.prim_lfsr_fib_smoke.3511251743
Short name T149
Test name
Test status
Simulation time 1289690000 ps
CPU time 1.99 seconds
Started Sep 01 03:33:56 AM UTC 24
Finished Sep 01 03:34:05 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3511251743 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 44.prim_lfsr_fib_smoke.3511251743
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/44.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/45.prim_lfsr_fib_smoke.3125641335
Short name T153
Test name
Test status
Simulation time 1320230000 ps
CPU time 2.08 seconds
Started Sep 01 03:33:56 AM UTC 24
Finished Sep 01 03:34:06 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3125641335 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 45.prim_lfsr_fib_smoke.3125641335
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/45.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/46.prim_lfsr_fib_smoke.30738426
Short name T157
Test name
Test status
Simulation time 1308450000 ps
CPU time 2.11 seconds
Started Sep 01 03:33:57 AM UTC 24
Finished Sep 01 03:34:07 AM UTC 24
Peak memory 177772 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=30738426 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ= +e
n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fi
b.vdb -cm_log /dev/null -cm_name 46.prim_lfsr_fib_smoke.30738426
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/46.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/47.prim_lfsr_fib_smoke.2545156564
Short name T150
Test name
Test status
Simulation time 1090290000 ps
CPU time 1.88 seconds
Started Sep 01 03:33:57 AM UTC 24
Finished Sep 01 03:34:05 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2545156564 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 47.prim_lfsr_fib_smoke.2545156564
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/47.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/48.prim_lfsr_fib_smoke.2457914237
Short name T160
Test name
Test status
Simulation time 1415910000 ps
CPU time 2.11 seconds
Started Sep 01 03:33:57 AM UTC 24
Finished Sep 01 03:34:07 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2457914237 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 48.prim_lfsr_fib_smoke.2457914237
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/48.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/49.prim_lfsr_fib_smoke.1880436804
Short name T159
Test name
Test status
Simulation time 1388610000 ps
CPU time 2.13 seconds
Started Sep 01 03:33:57 AM UTC 24
Finished Sep 01 03:34:07 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1880436804 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 49.prim_lfsr_fib_smoke.1880436804
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/49.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/5.prim_lfsr_fib_smoke.676977393
Short name T26
Test name
Test status
Simulation time 1519650000 ps
CPU time 2.5 seconds
Started Sep 01 03:33:23 AM UTC 24
Finished Sep 01 03:33:36 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=676977393 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ= +
en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_f
ib.vdb -cm_log /dev/null -cm_name 5.prim_lfsr_fib_smoke.676977393
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/5.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/6.prim_lfsr_fib_smoke.1204692791
Short name T25
Test name
Test status
Simulation time 1444410000 ps
CPU time 2.37 seconds
Started Sep 01 03:33:23 AM UTC 24
Finished Sep 01 03:33:35 AM UTC 24
Peak memory 177772 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1204692791 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 6.prim_lfsr_fib_smoke.1204692791
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/6.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/7.prim_lfsr_fib_smoke.1829122472
Short name T28
Test name
Test status
Simulation time 1519630000 ps
CPU time 2.48 seconds
Started Sep 01 03:33:26 AM UTC 24
Finished Sep 01 03:33:39 AM UTC 24
Peak memory 177772 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1829122472 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 7.prim_lfsr_fib_smoke.1829122472
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/7.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/8.prim_lfsr_fib_smoke.3893310481
Short name T29
Test name
Test status
Simulation time 1491090000 ps
CPU time 2.58 seconds
Started Sep 01 03:33:27 AM UTC 24
Finished Sep 01 03:33:39 AM UTC 24
Peak memory 177772 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3893310481 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
fib.vdb -cm_log /dev/null -cm_name 8.prim_lfsr_fib_smoke.3893310481
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/8.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_fib/9.prim_lfsr_fib_smoke.485718856
Short name T30
Test name
Test status
Simulation time 1489690000 ps
CPU time 2.36 seconds
Started Sep 01 03:33:28 AM UTC 24
Finished Sep 01 03:33:41 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_fib/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=485718856 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ= +
en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_f
ib.vdb -cm_log /dev/null -cm_name 9.prim_lfsr_fib_smoke.485718856
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/9.prim_lfsr_fib_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/1.prim_lfsr_gal_smoke.951381017
Short name T2
Test name
Test status
Simulation time 1256690000 ps
CPU time 1.85 seconds
Started Sep 01 03:34:33 AM UTC 24
Finished Sep 01 03:34:43 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=951381017 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ= +
en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_g
al.vdb -cm_log /dev/null -cm_name 1.prim_lfsr_gal_smoke.951381017
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/1.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/10.prim_lfsr_gal_smoke.4054890356
Short name T1
Test name
Test status
Simulation time 1121790000 ps
CPU time 1.69 seconds
Started Sep 01 03:34:33 AM UTC 24
Finished Sep 01 03:34:43 AM UTC 24
Peak memory 177872 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4054890356 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
gal.vdb -cm_log /dev/null -cm_name 10.prim_lfsr_gal_smoke.4054890356
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/10.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/11.prim_lfsr_gal_smoke.1913740282
Short name T46
Test name
Test status
Simulation time 1518470000 ps
CPU time 2.02 seconds
Started Sep 01 03:34:33 AM UTC 24
Finished Sep 01 03:34:45 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1913740282 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
gal.vdb -cm_log /dev/null -cm_name 11.prim_lfsr_gal_smoke.1913740282
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/11.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/12.prim_lfsr_gal_smoke.3407824547
Short name T3
Test name
Test status
Simulation time 1273150000 ps
CPU time 1.72 seconds
Started Sep 01 03:34:33 AM UTC 24
Finished Sep 01 03:34:44 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3407824547 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
gal.vdb -cm_log /dev/null -cm_name 12.prim_lfsr_gal_smoke.3407824547
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/12.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/13.prim_lfsr_gal_smoke.297957606
Short name T10
Test name
Test status
Simulation time 1352010000 ps
CPU time 1.82 seconds
Started Sep 01 03:34:33 AM UTC 24
Finished Sep 01 03:34:44 AM UTC 24
Peak memory 177768 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=297957606 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ= +
en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_g
al.vdb -cm_log /dev/null -cm_name 13.prim_lfsr_gal_smoke.297957606
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/13.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/14.prim_lfsr_gal_smoke.1199403531
Short name T48
Test name
Test status
Simulation time 1526390000 ps
CPU time 1.96 seconds
Started Sep 01 03:34:33 AM UTC 24
Finished Sep 01 03:34:45 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1199403531 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
gal.vdb -cm_log /dev/null -cm_name 14.prim_lfsr_gal_smoke.1199403531
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/14.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/15.prim_lfsr_gal_smoke.3690649916
Short name T7
Test name
Test status
Simulation time 1250230000 ps
CPU time 1.89 seconds
Started Sep 01 03:34:33 AM UTC 24
Finished Sep 01 03:34:44 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3690649916 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
gal.vdb -cm_log /dev/null -cm_name 15.prim_lfsr_gal_smoke.3690649916
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/15.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/16.prim_lfsr_gal_smoke.1056066690
Short name T51
Test name
Test status
Simulation time 1395950000 ps
CPU time 1.96 seconds
Started Sep 01 03:34:35 AM UTC 24
Finished Sep 01 03:34:46 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1056066690 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
gal.vdb -cm_log /dev/null -cm_name 16.prim_lfsr_gal_smoke.1056066690
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/16.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/17.prim_lfsr_gal_smoke.3181093890
Short name T43
Test name
Test status
Simulation time 1298930000 ps
CPU time 1.82 seconds
Started Sep 01 03:34:35 AM UTC 24
Finished Sep 01 03:34:45 AM UTC 24
Peak memory 177780 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3181093890 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
gal.vdb -cm_log /dev/null -cm_name 17.prim_lfsr_gal_smoke.3181093890
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/17.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/18.prim_lfsr_gal_smoke.424553013
Short name T55
Test name
Test status
Simulation time 1479570000 ps
CPU time 2.11 seconds
Started Sep 01 03:34:35 AM UTC 24
Finished Sep 01 03:34:46 AM UTC 24
Peak memory 177768 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=424553013 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ= +
en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_g
al.vdb -cm_log /dev/null -cm_name 18.prim_lfsr_gal_smoke.424553013
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/18.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/19.prim_lfsr_gal_smoke.2889871528
Short name T49
Test name
Test status
Simulation time 1367170000 ps
CPU time 2 seconds
Started Sep 01 03:34:35 AM UTC 24
Finished Sep 01 03:34:46 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2889871528 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
gal.vdb -cm_log /dev/null -cm_name 19.prim_lfsr_gal_smoke.2889871528
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/19.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/2.prim_lfsr_gal_smoke.637517479
Short name T11
Test name
Test status
Simulation time 1428950000 ps
CPU time 1.87 seconds
Started Sep 01 03:34:33 AM UTC 24
Finished Sep 01 03:34:44 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=637517479 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ= +
en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_g
al.vdb -cm_log /dev/null -cm_name 2.prim_lfsr_gal_smoke.637517479
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/2.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/20.prim_lfsr_gal_smoke.3634847109
Short name T60
Test name
Test status
Simulation time 1508170000 ps
CPU time 2 seconds
Started Sep 01 03:34:35 AM UTC 24
Finished Sep 01 03:34:46 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3634847109 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
gal.vdb -cm_log /dev/null -cm_name 20.prim_lfsr_gal_smoke.3634847109
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/20.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/21.prim_lfsr_gal_smoke.4067861724
Short name T66
Test name
Test status
Simulation time 1584350000 ps
CPU time 2.27 seconds
Started Sep 01 03:34:35 AM UTC 24
Finished Sep 01 03:34:47 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4067861724 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
gal.vdb -cm_log /dev/null -cm_name 21.prim_lfsr_gal_smoke.4067861724
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/21.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/22.prim_lfsr_gal_smoke.1409136920
Short name T56
Test name
Test status
Simulation time 1462210000 ps
CPU time 2.05 seconds
Started Sep 01 03:34:35 AM UTC 24
Finished Sep 01 03:34:46 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1409136920 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
gal.vdb -cm_log /dev/null -cm_name 22.prim_lfsr_gal_smoke.1409136920
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/22.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/23.prim_lfsr_gal_smoke.1808440157
Short name T52
Test name
Test status
Simulation time 1421110000 ps
CPU time 2.1 seconds
Started Sep 01 03:34:35 AM UTC 24
Finished Sep 01 03:34:46 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1808440157 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
gal.vdb -cm_log /dev/null -cm_name 23.prim_lfsr_gal_smoke.1808440157
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/23.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/24.prim_lfsr_gal_smoke.877366974
Short name T59
Test name
Test status
Simulation time 1484670000 ps
CPU time 2.08 seconds
Started Sep 01 03:34:35 AM UTC 24
Finished Sep 01 03:34:46 AM UTC 24
Peak memory 177768 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=877366974 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ= +
en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_g
al.vdb -cm_log /dev/null -cm_name 24.prim_lfsr_gal_smoke.877366974
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/24.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/25.prim_lfsr_gal_smoke.3032317781
Short name T42
Test name
Test status
Simulation time 1201390000 ps
CPU time 1.84 seconds
Started Sep 01 03:34:35 AM UTC 24
Finished Sep 01 03:34:45 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3032317781 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
gal.vdb -cm_log /dev/null -cm_name 25.prim_lfsr_gal_smoke.3032317781
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/25.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/26.prim_lfsr_gal_smoke.341703455
Short name T70
Test name
Test status
Simulation time 1602550000 ps
CPU time 2.31 seconds
Started Sep 01 03:34:35 AM UTC 24
Finished Sep 01 03:34:47 AM UTC 24
Peak memory 177768 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=341703455 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ= +
en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_g
al.vdb -cm_log /dev/null -cm_name 26.prim_lfsr_gal_smoke.341703455
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/26.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/27.prim_lfsr_gal_smoke.2855498251
Short name T50
Test name
Test status
Simulation time 1319770000 ps
CPU time 1.92 seconds
Started Sep 01 03:34:35 AM UTC 24
Finished Sep 01 03:34:46 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2855498251 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
gal.vdb -cm_log /dev/null -cm_name 27.prim_lfsr_gal_smoke.2855498251
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/27.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/28.prim_lfsr_gal_smoke.1653415020
Short name T64
Test name
Test status
Simulation time 1534710000 ps
CPU time 2.13 seconds
Started Sep 01 03:34:35 AM UTC 24
Finished Sep 01 03:34:47 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1653415020 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
gal.vdb -cm_log /dev/null -cm_name 28.prim_lfsr_gal_smoke.1653415020
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/28.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/29.prim_lfsr_gal_smoke.2680217627
Short name T54
Test name
Test status
Simulation time 1408530000 ps
CPU time 1.97 seconds
Started Sep 01 03:34:35 AM UTC 24
Finished Sep 01 03:34:46 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2680217627 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
gal.vdb -cm_log /dev/null -cm_name 29.prim_lfsr_gal_smoke.2680217627
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/29.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/3.prim_lfsr_gal_smoke.2392779175
Short name T8
Test name
Test status
Simulation time 1370790000 ps
CPU time 1.91 seconds
Started Sep 01 03:34:33 AM UTC 24
Finished Sep 01 03:34:44 AM UTC 24
Peak memory 177772 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2392779175 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
gal.vdb -cm_log /dev/null -cm_name 3.prim_lfsr_gal_smoke.2392779175
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/3.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/30.prim_lfsr_gal_smoke.4063009917
Short name T65
Test name
Test status
Simulation time 1508850000 ps
CPU time 2.11 seconds
Started Sep 01 03:34:35 AM UTC 24
Finished Sep 01 03:34:47 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4063009917 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
gal.vdb -cm_log /dev/null -cm_name 30.prim_lfsr_gal_smoke.4063009917
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/30.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/31.prim_lfsr_gal_smoke.2095020998
Short name T53
Test name
Test status
Simulation time 1360490000 ps
CPU time 1.94 seconds
Started Sep 01 03:34:35 AM UTC 24
Finished Sep 01 03:34:46 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2095020998 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
gal.vdb -cm_log /dev/null -cm_name 31.prim_lfsr_gal_smoke.2095020998
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/31.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/32.prim_lfsr_gal_smoke.2234701737
Short name T62
Test name
Test status
Simulation time 1467070000 ps
CPU time 2.09 seconds
Started Sep 01 03:34:35 AM UTC 24
Finished Sep 01 03:34:47 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2234701737 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
gal.vdb -cm_log /dev/null -cm_name 32.prim_lfsr_gal_smoke.2234701737
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/32.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/33.prim_lfsr_gal_smoke.3261501619
Short name T61
Test name
Test status
Simulation time 1405170000 ps
CPU time 2.02 seconds
Started Sep 01 03:34:35 AM UTC 24
Finished Sep 01 03:34:47 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3261501619 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
gal.vdb -cm_log /dev/null -cm_name 33.prim_lfsr_gal_smoke.3261501619
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/33.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/34.prim_lfsr_gal_smoke.713395789
Short name T69
Test name
Test status
Simulation time 1517670000 ps
CPU time 2.08 seconds
Started Sep 01 03:34:35 AM UTC 24
Finished Sep 01 03:34:47 AM UTC 24
Peak memory 177768 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=713395789 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ= +
en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_g
al.vdb -cm_log /dev/null -cm_name 34.prim_lfsr_gal_smoke.713395789
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/34.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/35.prim_lfsr_gal_smoke.3257990808
Short name T67
Test name
Test status
Simulation time 1486030000 ps
CPU time 2.07 seconds
Started Sep 01 03:34:35 AM UTC 24
Finished Sep 01 03:34:47 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3257990808 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
gal.vdb -cm_log /dev/null -cm_name 35.prim_lfsr_gal_smoke.3257990808
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/35.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/36.prim_lfsr_gal_smoke.346921592
Short name T68
Test name
Test status
Simulation time 1468510000 ps
CPU time 2.13 seconds
Started Sep 01 03:34:35 AM UTC 24
Finished Sep 01 03:34:47 AM UTC 24
Peak memory 177768 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=346921592 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ= +
en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_g
al.vdb -cm_log /dev/null -cm_name 36.prim_lfsr_gal_smoke.346921592
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/36.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/37.prim_lfsr_gal_smoke.4289726900
Short name T58
Test name
Test status
Simulation time 1378050000 ps
CPU time 1.87 seconds
Started Sep 01 03:34:35 AM UTC 24
Finished Sep 01 03:34:46 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4289726900 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
gal.vdb -cm_log /dev/null -cm_name 37.prim_lfsr_gal_smoke.4289726900
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/37.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/38.prim_lfsr_gal_smoke.4197513935
Short name T72
Test name
Test status
Simulation time 1566570000 ps
CPU time 2.11 seconds
Started Sep 01 03:34:35 AM UTC 24
Finished Sep 01 03:34:48 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4197513935 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
gal.vdb -cm_log /dev/null -cm_name 38.prim_lfsr_gal_smoke.4197513935
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/38.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/39.prim_lfsr_gal_smoke.1258167462
Short name T57
Test name
Test status
Simulation time 1350490000 ps
CPU time 1.92 seconds
Started Sep 01 03:34:35 AM UTC 24
Finished Sep 01 03:34:46 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1258167462 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
gal.vdb -cm_log /dev/null -cm_name 39.prim_lfsr_gal_smoke.1258167462
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/39.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/4.prim_lfsr_gal_smoke.972858038
Short name T44
Test name
Test status
Simulation time 1535130000 ps
CPU time 1.9 seconds
Started Sep 01 03:34:33 AM UTC 24
Finished Sep 01 03:34:45 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=972858038 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ= +
en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_g
al.vdb -cm_log /dev/null -cm_name 4.prim_lfsr_gal_smoke.972858038
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/4.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/40.prim_lfsr_gal_smoke.2662393066
Short name T73
Test name
Test status
Simulation time 1562110000 ps
CPU time 2.03 seconds
Started Sep 01 03:34:35 AM UTC 24
Finished Sep 01 03:34:48 AM UTC 24
Peak memory 177540 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2662393066 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
gal.vdb -cm_log /dev/null -cm_name 40.prim_lfsr_gal_smoke.2662393066
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/40.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/41.prim_lfsr_gal_smoke.3857618539
Short name T71
Test name
Test status
Simulation time 1544710000 ps
CPU time 1.94 seconds
Started Sep 01 03:34:36 AM UTC 24
Finished Sep 01 03:34:47 AM UTC 24
Peak memory 177580 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3857618539 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
gal.vdb -cm_log /dev/null -cm_name 41.prim_lfsr_gal_smoke.3857618539
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/41.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/42.prim_lfsr_gal_smoke.1547593782
Short name T63
Test name
Test status
Simulation time 1425450000 ps
CPU time 2 seconds
Started Sep 01 03:34:36 AM UTC 24
Finished Sep 01 03:34:47 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1547593782 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
gal.vdb -cm_log /dev/null -cm_name 42.prim_lfsr_gal_smoke.1547593782
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/42.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/43.prim_lfsr_gal_smoke.1866765460
Short name T74
Test name
Test status
Simulation time 1343270000 ps
CPU time 1.96 seconds
Started Sep 01 03:34:38 AM UTC 24
Finished Sep 01 03:34:48 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1866765460 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
gal.vdb -cm_log /dev/null -cm_name 43.prim_lfsr_gal_smoke.1866765460
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/43.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/44.prim_lfsr_gal_smoke.1910378494
Short name T75
Test name
Test status
Simulation time 1361430000 ps
CPU time 2.02 seconds
Started Sep 01 03:34:38 AM UTC 24
Finished Sep 01 03:34:48 AM UTC 24
Peak memory 177800 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1910378494 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
gal.vdb -cm_log /dev/null -cm_name 44.prim_lfsr_gal_smoke.1910378494
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/44.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/45.prim_lfsr_gal_smoke.4173045345
Short name T76
Test name
Test status
Simulation time 1401810000 ps
CPU time 2.09 seconds
Started Sep 01 03:34:42 AM UTC 24
Finished Sep 01 03:34:51 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4173045345 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
gal.vdb -cm_log /dev/null -cm_name 45.prim_lfsr_gal_smoke.4173045345
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/45.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/46.prim_lfsr_gal_smoke.2685535403
Short name T77
Test name
Test status
Simulation time 1436610000 ps
CPU time 1.9 seconds
Started Sep 01 03:34:42 AM UTC 24
Finished Sep 01 03:34:51 AM UTC 24
Peak memory 177800 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2685535403 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
gal.vdb -cm_log /dev/null -cm_name 46.prim_lfsr_gal_smoke.2685535403
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/46.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/47.prim_lfsr_gal_smoke.387702984
Short name T79
Test name
Test status
Simulation time 1490290000 ps
CPU time 2.01 seconds
Started Sep 01 03:34:43 AM UTC 24
Finished Sep 01 03:34:52 AM UTC 24
Peak memory 177768 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=387702984 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ= +
en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_g
al.vdb -cm_log /dev/null -cm_name 47.prim_lfsr_gal_smoke.387702984
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/47.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/48.prim_lfsr_gal_smoke.4040347923
Short name T78
Test name
Test status
Simulation time 1403210000 ps
CPU time 1.86 seconds
Started Sep 01 03:34:43 AM UTC 24
Finished Sep 01 03:34:52 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4040347923 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
gal.vdb -cm_log /dev/null -cm_name 48.prim_lfsr_gal_smoke.4040347923
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/48.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/49.prim_lfsr_gal_smoke.1606102729
Short name T80
Test name
Test status
Simulation time 1497310000 ps
CPU time 2.11 seconds
Started Sep 01 03:34:44 AM UTC 24
Finished Sep 01 03:34:53 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1606102729 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
gal.vdb -cm_log /dev/null -cm_name 49.prim_lfsr_gal_smoke.1606102729
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/49.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/5.prim_lfsr_gal_smoke.3461939685
Short name T13
Test name
Test status
Simulation time 1455370000 ps
CPU time 1.86 seconds
Started Sep 01 03:34:33 AM UTC 24
Finished Sep 01 03:34:45 AM UTC 24
Peak memory 177772 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3461939685 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
gal.vdb -cm_log /dev/null -cm_name 5.prim_lfsr_gal_smoke.3461939685
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/5.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/6.prim_lfsr_gal_smoke.1450056004
Short name T47
Test name
Test status
Simulation time 1530470000 ps
CPU time 2.23 seconds
Started Sep 01 03:34:33 AM UTC 24
Finished Sep 01 03:34:45 AM UTC 24
Peak memory 177772 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1450056004 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
gal.vdb -cm_log /dev/null -cm_name 6.prim_lfsr_gal_smoke.1450056004
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/6.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/7.prim_lfsr_gal_smoke.489608563
Short name T45
Test name
Test status
Simulation time 1519610000 ps
CPU time 1.99 seconds
Started Sep 01 03:34:33 AM UTC 24
Finished Sep 01 03:34:45 AM UTC 24
Peak memory 177804 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=489608563 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ= +
en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_g
al.vdb -cm_log /dev/null -cm_name 7.prim_lfsr_gal_smoke.489608563
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/7.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/8.prim_lfsr_gal_smoke.1052754968
Short name T12
Test name
Test status
Simulation time 1408750000 ps
CPU time 1.82 seconds
Started Sep 01 03:34:33 AM UTC 24
Finished Sep 01 03:34:44 AM UTC 24
Peak memory 177772 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1052754968 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
gal.vdb -cm_log /dev/null -cm_name 8.prim_lfsr_gal_smoke.1052754968
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/8.prim_lfsr_gal_smoke/latest

Test location /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_gal/9.prim_lfsr_gal_smoke.3142049879
Short name T41
Test name
Test status
Simulation time 1458010000 ps
CPU time 1.9 seconds
Started Sep 01 03:34:33 AM UTC 24
Finished Sep 01 03:34:45 AM UTC 24
Peak memory 177772 kb
Host riverbear.c.edafarm-workstations-prod.internal
User miguelosorio
Command /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/prim_lfsr_dw_8_gal/simv +prim_lfsr_use_default_seed=0 +UVM_NO_RELNOTES +UVM_VERBOS
ITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3142049879 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ=
+en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/coverage/prim_lfsr_dw_8_
gal.vdb -cm_log /dev/null -cm_name 9.prim_lfsr_gal_smoke.3142049879
Directory /workspaces/repo/scratch/os_regression_2024_08_31/prim_lfsr-sim-vcs/9.prim_lfsr_gal_smoke/latest
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