cf38c1d296| Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
|---|---|---|---|---|---|---|---|
| V1 | TOTAL | 0 | 0 | -- | |||
| V2 | TOTAL | 0 | 0 | -- | |||
| V2S | TOTAL | 0 | 0 | -- | |||
| V3 | TOTAL | 0 | 0 | -- | |||
| Unmapped tests | prim_prince_test | 1.065m | 3.686ms | 495 | 500 | 99.00 | |
| TOTAL | 495 | 500 | 99.00 |
| Items | Total | Written | Passing | Progress |
|---|---|---|---|---|
| N.A. | 1 | 1 | 0 | 0.00 |
| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
|---|---|---|---|---|---|---|
| 100.00 | 100.00 | 100.00 | 100.00 | -- | 100.00 | 100.00 |
Exit reason: Error: User command failed Job returned non-zero exit code has 5 failures:
8.prim_prince_test.75019933409865250734029182404323876831884993584928502694882134160371695649025
Log /container/opentitan-public/scratch/os_regression/prim_prince-sim-vcs/8.prim_prince_test/latest/run.log
[make]: simulate
cd /workspace/8.prim_prince_test/latest && /workspace/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2753724673 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ= +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 8.prim_prince_test.2753724673
Chronologic VCS simulator copyright 1991-2022
Contains Synopsys proprietary information.
Compiler version T-2022.06-SP2_Full64; Runtime version T-2022.06-SP2_Full64; Jan 10 13:05 2024
Cannot find license file.
Make sure that you have a license file and that your
LM_LICENSE_FILE is pointing to the right location.
make: *** [/workspace/mnt/repo_top/hw/dv/tools/dvsim/sim.mk:175: simulate] Error 255
9.prim_prince_test.85471776705028053135951653543234837962191960378908903029444266334516907453268
Log /container/opentitan-public/scratch/os_regression/prim_prince-sim-vcs/9.prim_prince_test/latest/run.log
[make]: simulate
cd /workspace/9.prim_prince_test/latest && /workspace/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3493964628 -assert nopostproc +UVM_TESTNAME= +UVM_TEST_SEQ= +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 9.prim_prince_test.3493964628
Chronologic VCS simulator copyright 1991-2022
Contains Synopsys proprietary information.
Compiler version T-2022.06-SP2_Full64; Runtime version T-2022.06-SP2_Full64; Jan 10 13:05 2024
Cannot find license file.
Make sure that you have a license file and that your
LM_LICENSE_FILE is pointing to the right location.
make: *** [/workspace/mnt/repo_top/hw/dv/tools/dvsim/sim.mk:175: simulate] Error 255
... and 3 more failures.