Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_rom_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_rom_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_rom_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_rom_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_rom_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	110685	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

1110191

1

T1

10

T2

50

T3

1

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	303914	1			T1	18		T2	96		T3	1
values[0x0]	423574	1			T5	12		T8	6		T13	30811
values[0x1]	493388	1			T5	7		T8	4		T13	36564

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	49402	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

1171474

1

T1

10

T2

56

T3

1

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	5037	1			T13	417		T45	1		T14	190
valid_sources[0x01]	4721	1			T13	363		T45	1		T14	198
valid_sources[0x02]	4479	1			T2	1		T13	382		T14	182
valid_sources[0x03]	4724	1			T13	255		T14	177		T15	215
valid_sources[0x04]	5117	1			T11	1		T13	168		T14	206
valid_sources[0x05]	4843	1			T5	1		T13	308		T14	134
valid_sources[0x06]	4336	1			T2	1		T13	287		T14	151
valid_sources[0x07]	4453	1			T13	282		T14	152		T15	159
valid_sources[0x08]	5178	1			T2	1		T9	1		T11	1
valid_sources[0x09]	5377	1			T13	356		T14	229		T15	250
valid_sources[0x0a]	4627	1			T9	1		T11	1		T13	328
valid_sources[0x0b]	4562	1			T5	1		T13	324		T14	145
valid_sources[0x0c]	4927	1			T13	395		T14	172		T15	138
valid_sources[0x0d]	4613	1			T1	1		T13	372		T14	170
valid_sources[0x0e]	4213	1			T1	1		T13	184		T14	144
valid_sources[0x0f]	5481	1			T2	1		T13	456		T14	140
valid_sources[0x10]	5247	1			T9	1		T13	219		T14	214
valid_sources[0x11]	5733	1			T4	1		T13	291		T45	3
valid_sources[0x12]	5030	1			T13	381		T14	278		T15	233
valid_sources[0x13]	4146	1			T13	370		T45	2		T14	142
valid_sources[0x14]	4362	1			T13	412		T45	1		T14	160
valid_sources[0x15]	5339	1			T2	1		T5	1		T13	501
valid_sources[0x16]	3863	1			T13	327		T14	177		T15	227
valid_sources[0x17]	4490	1			T13	408		T45	1		T14	165
valid_sources[0x18]	3941	1			T13	305		T14	175		T15	263
valid_sources[0x19]	4281	1			T2	1		T13	423		T14	202
valid_sources[0x1a]	5188	1			T13	210		T14	162		T15	180
valid_sources[0x1b]	4756	1			T2	1		T13	407		T14	148
valid_sources[0x1c]	4765	1			T2	2		T13	383		T14	167
valid_sources[0x1d]	4913	1			T2	2		T13	264		T14	111
valid_sources[0x1e]	5244	1			T2	1		T13	515		T45	1
valid_sources[0x1f]	4140	1			T13	301		T14	163		T15	214
valid_sources[0x20]	4904	1			T13	318		T14	91		T15	146
valid_sources[0x21]	5137	1			T1	1		T5	4		T13	333
valid_sources[0x22]	4669	1			T13	243		T14	155		T15	173
valid_sources[0x23]	4630	1			T13	381		T14	159		T15	240
valid_sources[0x24]	5523	1			T11	1		T13	401		T14	166
valid_sources[0x25]	4114	1			T11	1		T13	334		T14	226
valid_sources[0x26]	4784	1			T9	1		T13	303		T14	163
valid_sources[0x27]	4586	1			T13	347		T14	190		T15	192
valid_sources[0x28]	4473	1			T13	504		T14	180		T15	313
valid_sources[0x29]	5227	1			T13	204		T14	233		T15	246
valid_sources[0x2a]	4849	1			T9	1		T11	1		T13	335
valid_sources[0x2b]	5089	1			T2	2		T13	313		T14	189
valid_sources[0x2c]	4918	1			T13	297		T14	141		T15	170
valid_sources[0x2d]	5412	1			T9	1		T13	455		T14	159
valid_sources[0x2e]	4682	1			T13	310		T14	253		T15	120
valid_sources[0x2f]	4194	1			T13	249		T14	172		T15	196
valid_sources[0x30]	5099	1			T13	275		T14	186		T15	202
valid_sources[0x31]	4404	1			T13	337		T14	145		T15	163
valid_sources[0x32]	4759	1			T2	1		T13	366		T14	144
valid_sources[0x33]	4750	1			T11	1		T13	268		T14	222
valid_sources[0x34]	4752	1			T13	352		T14	135		T15	176
valid_sources[0x35]	4895	1			T2	1		T13	417		T14	154
valid_sources[0x36]	4245	1			T5	1		T8	10		T9	1
valid_sources[0x37]	5214	1			T13	335		T45	1		T14	132
valid_sources[0x38]	4436	1			T1	1		T13	436		T14	150
valid_sources[0x39]	4161	1			T13	312		T14	223		T15	144
valid_sources[0x3a]	4322	1			T13	268		T14	133		T15	143
valid_sources[0x3b]	4540	1			T9	1		T13	365		T45	4
valid_sources[0x3c]	5238	1			T13	570		T14	169		T15	177
valid_sources[0x3d]	3987	1			T13	273		T45	1		T14	142
valid_sources[0x3e]	4445	1			T13	454		T14	207		T15	175
valid_sources[0x3f]	5847	1			T13	398		T14	213		T15	174
valid_sources[0x40]	4055	1			T2	1		T13	342		T14	123
valid_sources[0x41]	4431	1			T2	1		T13	316		T14	165
valid_sources[0x42]	4226	1			T9	1		T13	280		T14	124
valid_sources[0x43]	5416	1			T13	417		T14	202		T15	213
valid_sources[0x44]	4761	1			T13	404		T14	221		T15	186
valid_sources[0x45]	4661	1			T13	244		T14	166		T15	227
valid_sources[0x46]	5262	1			T13	417		T45	1		T14	207
valid_sources[0x47]	4729	1			T1	1		T13	293		T45	1
valid_sources[0x48]	5308	1			T2	1		T13	356		T14	136
valid_sources[0x49]	4831	1			T9	1		T13	452		T14	165
valid_sources[0x4a]	5105	1			T13	359		T14	112		T15	281
valid_sources[0x4b]	4343	1			T1	2		T2	1		T13	283
valid_sources[0x4c]	4751	1			T2	1		T9	2		T13	377
valid_sources[0x4d]	4248	1			T13	312		T14	155		T15	165
valid_sources[0x4e]	4932	1			T13	450		T45	2		T14	145
valid_sources[0x4f]	4936	1			T13	426		T45	2		T14	177
valid_sources[0x50]	5140	1			T1	1		T2	1		T13	219
valid_sources[0x51]	4512	1			T13	437		T14	243		T15	259
valid_sources[0x52]	4848	1			T2	2		T13	353		T14	144
valid_sources[0x53]	4725	1			T2	1		T13	380		T14	119
valid_sources[0x54]	4477	1			T1	1		T13	462		T14	253
valid_sources[0x55]	5108	1			T13	337		T14	186		T15	231
valid_sources[0x56]	4272	1			T9	1		T13	288		T14	191
valid_sources[0x57]	5507	1			T18	38		T13	472		T45	1
valid_sources[0x58]	4549	1			T9	1		T13	375		T14	174
valid_sources[0x59]	5371	1			T13	286		T45	1		T14	240
valid_sources[0x5a]	4774	1			T2	1		T13	492		T45	3
valid_sources[0x5b]	4591	1			T13	279		T45	1		T14	157
valid_sources[0x5c]	4886	1			T2	2		T13	343		T14	176
valid_sources[0x5d]	5201	1			T2	1		T13	447		T14	202
valid_sources[0x5e]	4457	1			T2	2		T9	2		T11	1
valid_sources[0x5f]	4890	1			T13	455		T14	120		T15	218
valid_sources[0x60]	4907	1			T13	381		T14	212		T15	203
valid_sources[0x61]	5458	1			T2	1		T13	528		T14	189
valid_sources[0x62]	4652	1			T13	446		T14	117		T15	188
valid_sources[0x63]	5294	1			T13	332		T14	187		T15	220
valid_sources[0x64]	5219	1			T13	255		T14	191		T15	141
valid_sources[0x65]	4317	1			T13	362		T14	141		T15	166
valid_sources[0x66]	4522	1			T13	329		T14	214		T15	195
valid_sources[0x67]	4440	1			T13	314		T14	137		T15	274
valid_sources[0x68]	4441	1			T13	296		T14	172		T15	213
valid_sources[0x69]	5150	1			T9	3		T11	1		T13	371
valid_sources[0x6a]	4921	1			T2	1		T11	1		T13	165
valid_sources[0x6b]	4410	1			T13	268		T14	124		T15	140
valid_sources[0x6c]	5081	1			T13	351		T45	7		T14	210
valid_sources[0x6d]	4117	1			T5	1		T13	371		T14	179
valid_sources[0x6e]	4667	1			T4	6		T13	510		T14	208
valid_sources[0x6f]	5231	1			T2	3		T13	385		T45	3
valid_sources[0x70]	4308	1			T13	411		T14	172		T15	218
valid_sources[0x71]	5051	1			T2	1		T11	1		T13	343
valid_sources[0x72]	4349	1			T13	358		T14	137		T15	133
valid_sources[0x73]	4712	1			T13	345		T45	2		T14	162
valid_sources[0x74]	5078	1			T13	294		T14	168		T15	207
valid_sources[0x75]	4802	1			T2	1		T13	376		T45	2
valid_sources[0x76]	4720	1			T13	275		T45	7		T14	111
valid_sources[0x77]	4669	1			T2	2		T13	365		T14	124
valid_sources[0x78]	4671	1			T13	521		T14	151		T15	229
valid_sources[0x79]	4607	1			T13	190		T14	137		T15	142
valid_sources[0x7a]	4865	1			T2	3		T13	481		T45	7
valid_sources[0x7b]	4598	1			T2	1		T13	155		T14	180
valid_sources[0x7c]	4479	1			T11	1		T13	291		T14	137
valid_sources[0x7d]	4060	1			T2	2		T13	232		T14	199
valid_sources[0x7e]	5055	1			T13	408		T25	1		T14	112
valid_sources[0x7f]	4770	1			T2	1		T5	2		T13	418
valid_sources[0x80]	4627	1			T1	1		T13	459		T14	171

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

279802

1

T1

10

T2

50

T3

1

values[0x0]

all_enables

biggest_size

414673

1

T5

3

T8

1

T13

30164

values[0x1]

all_enables

biggest_size

415716

1

T5

2

T13

30560

T31

1

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	251114	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

1078518

1

T1

9

T2

22

T4

3

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	301022	1			T1	9		T2	213		T4	3
values[0x0]	424184	1			T13	32698		T14	15118		T15	17035
values[0x1]	604426	1			T13	47136		T14	21262		T15	24552

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	95346	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

1234286

1

T1

9

T2

128

T4

3

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	4108	1			T13	410		T14	190		T15	177
valid_sources[0x01]	5649	1			T12	3		T13	400		T14	194
valid_sources[0x02]	4940	1			T13	367		T45	1		T14	200
valid_sources[0x03]	4876	1			T9	1		T12	2		T13	382
valid_sources[0x04]	5768	1			T2	2		T13	390		T14	176
valid_sources[0x05]	5088	1			T12	2		T13	365		T45	2
valid_sources[0x06]	5267	1			T2	2		T12	1		T13	374
valid_sources[0x07]	5848	1			T2	1		T12	2		T13	417
valid_sources[0x08]	6631	1			T9	2		T13	391		T45	1
valid_sources[0x09]	4610	1			T2	2		T12	2		T13	381
valid_sources[0x0a]	5846	1			T12	9		T13	359		T14	197
valid_sources[0x0b]	4993	1			T2	1		T10	25		T12	2
valid_sources[0x0c]	4915	1			T10	11		T13	432		T45	1
valid_sources[0x0d]	5060	1			T2	1		T12	10		T13	327
valid_sources[0x0e]	5412	1			T13	356		T14	174		T15	209
valid_sources[0x0f]	4393	1			T2	2		T13	404		T45	3
valid_sources[0x10]	4947	1			T2	1		T13	385		T45	2
valid_sources[0x11]	5708	1			T9	1		T13	363		T45	3
valid_sources[0x12]	5398	1			T11	36		T13	360		T14	177
valid_sources[0x13]	4115	1			T12	1		T13	418		T14	162
valid_sources[0x14]	5820	1			T2	1		T12	4		T13	381
valid_sources[0x15]	5897	1			T13	372		T45	1		T14	188
valid_sources[0x16]	5530	1			T2	1		T12	1		T13	427
valid_sources[0x17]	5973	1			T2	2		T12	1		T13	439
valid_sources[0x18]	5240	1			T13	417		T45	2		T14	175
valid_sources[0x19]	5115	1			T12	3		T13	415		T45	1
valid_sources[0x1a]	5451	1			T12	1		T13	430		T14	172
valid_sources[0x1b]	5930	1			T2	1		T9	1		T10	37
valid_sources[0x1c]	6404	1			T2	1		T12	1		T13	388
valid_sources[0x1d]	6438	1			T13	355		T45	1		T14	186
valid_sources[0x1e]	4915	1			T10	54		T13	424		T14	184
valid_sources[0x1f]	5165	1			T2	1		T9	1		T13	403
valid_sources[0x20]	5588	1			T2	1		T13	366		T45	2
valid_sources[0x21]	5498	1			T2	1		T12	1		T13	408
valid_sources[0x22]	5386	1			T2	2		T9	3		T13	415
valid_sources[0x23]	4605	1			T13	421		T45	1		T14	185
valid_sources[0x24]	5535	1			T12	3		T13	394		T14	187
valid_sources[0x25]	4177	1			T2	3		T13	422		T14	170
valid_sources[0x26]	4627	1			T2	5		T9	1		T13	415
valid_sources[0x27]	4890	1			T12	2		T13	390		T45	1
valid_sources[0x28]	4440	1			T12	1		T13	411		T14	176
valid_sources[0x29]	4837	1			T9	1		T13	367		T45	2
valid_sources[0x2a]	6792	1			T12	5		T13	373		T45	1
valid_sources[0x2b]	5086	1			T10	26		T12	5		T13	390
valid_sources[0x2c]	4792	1			T2	3		T13	423		T45	2
valid_sources[0x2d]	7064	1			T2	1		T13	390		T45	2
valid_sources[0x2e]	4174	1			T13	365		T14	177		T15	186
valid_sources[0x2f]	5096	1			T2	3		T9	1		T13	389
valid_sources[0x30]	5011	1			T2	1		T13	377		T14	197
valid_sources[0x31]	4896	1			T2	2		T13	400		T14	167
valid_sources[0x32]	4985	1			T13	396		T14	200		T15	220
valid_sources[0x33]	5938	1			T2	1		T10	10		T13	394
valid_sources[0x34]	5169	1			T2	1		T12	4		T13	419
valid_sources[0x35]	6227	1			T2	2		T13	393		T45	2
valid_sources[0x36]	4871	1			T2	1		T12	3		T13	402
valid_sources[0x37]	6135	1			T2	1		T12	2		T13	378
valid_sources[0x38]	4713	1			T9	1		T12	2		T18	3
valid_sources[0x39]	5711	1			T12	2		T13	400		T14	194
valid_sources[0x3a]	5190	1			T12	1		T13	382		T14	175
valid_sources[0x3b]	6110	1			T2	3		T12	2		T13	382
valid_sources[0x3c]	5587	1			T13	386		T45	1		T14	191
valid_sources[0x3d]	4937	1			T2	1		T9	2		T12	1
valid_sources[0x3e]	7647	1			T13	426		T45	2		T14	171
valid_sources[0x3f]	4417	1			T13	389		T14	151		T15	172
valid_sources[0x40]	4930	1			T12	2		T13	407		T45	1
valid_sources[0x41]	5179	1			T2	1		T13	375		T14	179
valid_sources[0x42]	5502	1			T2	1		T13	390		T45	1
valid_sources[0x43]	4834	1			T2	1		T12	1		T13	393
valid_sources[0x44]	4859	1			T13	410		T45	2		T14	179
valid_sources[0x45]	4355	1			T12	1		T13	417		T45	2
valid_sources[0x46]	4526	1			T2	1		T13	390		T14	175
valid_sources[0x47]	5478	1			T2	2		T12	1		T13	362
valid_sources[0x48]	5226	1			T2	1		T13	439		T45	1
valid_sources[0x49]	4557	1			T2	3		T9	3		T13	436
valid_sources[0x4a]	4328	1			T2	3		T13	365		T14	192
valid_sources[0x4b]	4290	1			T2	2		T12	1		T13	312
valid_sources[0x4c]	5873	1			T2	2		T13	431		T14	189
valid_sources[0x4d]	7278	1			T2	3		T13	418		T45	3
valid_sources[0x4e]	5609	1			T2	1		T13	398		T14	189
valid_sources[0x4f]	5143	1			T2	1		T12	3		T13	404
valid_sources[0x50]	4505	1			T13	421		T14	176		T15	188
valid_sources[0x51]	4006	1			T13	404		T14	193		T15	210
valid_sources[0x52]	5020	1			T1	9		T12	1		T13	368
valid_sources[0x53]	5066	1			T2	3		T12	3		T13	389
valid_sources[0x54]	4825	1			T4	2		T13	417		T14	186
valid_sources[0x55]	5219	1			T13	433		T45	2		T14	181
valid_sources[0x56]	4226	1			T2	1		T7	47		T12	3
valid_sources[0x57]	4486	1			T2	3		T13	402		T14	169
valid_sources[0x58]	5558	1			T2	2		T12	3		T13	376
valid_sources[0x59]	5461	1			T9	6		T12	3		T13	411
valid_sources[0x5a]	5879	1			T2	2		T13	440		T45	1
valid_sources[0x5b]	5459	1			T12	1		T13	402		T45	1
valid_sources[0x5c]	4926	1			T2	1		T13	376		T14	176
valid_sources[0x5d]	4575	1			T2	1		T12	5		T13	460
valid_sources[0x5e]	5449	1			T10	34		T13	397		T14	161
valid_sources[0x5f]	4530	1			T13	425		T14	202		T15	210
valid_sources[0x60]	4457	1			T9	2		T12	3		T13	435
valid_sources[0x61]	4501	1			T13	389		T45	1		T14	193
valid_sources[0x62]	6031	1			T2	1		T13	425		T14	167
valid_sources[0x63]	5017	1			T2	1		T4	1		T12	1
valid_sources[0x64]	4427	1			T2	1		T12	1		T13	394
valid_sources[0x65]	5376	1			T13	425		T14	211		T15	188
valid_sources[0x66]	6796	1			T13	413		T14	169		T15	228
valid_sources[0x67]	5478	1			T2	1		T9	1		T13	426
valid_sources[0x68]	5754	1			T13	366		T14	174		T15	239
valid_sources[0x69]	5130	1			T2	1		T13	434		T14	190
valid_sources[0x6a]	4564	1			T2	1		T13	394		T45	3
valid_sources[0x6b]	6174	1			T12	2		T13	419		T45	1
valid_sources[0x6c]	5354	1			T13	384		T45	1		T14	190
valid_sources[0x6d]	4239	1			T2	1		T9	1		T13	348
valid_sources[0x6e]	6354	1			T13	414		T14	172		T15	202
valid_sources[0x6f]	4322	1			T12	3		T13	380		T14	183
valid_sources[0x70]	5544	1			T12	3		T13	401		T14	183
valid_sources[0x71]	5698	1			T2	1		T12	1		T13	383
valid_sources[0x72]	4446	1			T2	3		T13	371		T14	190
valid_sources[0x73]	5148	1			T2	2		T13	369		T14	183
valid_sources[0x74]	4884	1			T2	1		T13	355		T45	1
valid_sources[0x75]	5472	1			T2	3		T7	13		T12	1
valid_sources[0x76]	5213	1			T2	5		T13	438		T45	1
valid_sources[0x77]	5590	1			T12	2		T13	423		T45	1
valid_sources[0x78]	4839	1			T13	390		T14	179		T15	216
valid_sources[0x79]	5726	1			T2	1		T12	1		T13	393
valid_sources[0x7a]	4849	1			T11	21		T12	3		T13	344
valid_sources[0x7b]	5586	1			T2	5		T13	394		T45	1
valid_sources[0x7c]	5350	1			T2	1		T13	364		T14	198
valid_sources[0x7d]	5607	1			T12	6		T13	385		T45	2
valid_sources[0x7e]	4823	1			T12	1		T13	424		T14	194
valid_sources[0x7f]	5209	1			T10	21		T12	3		T13	385
valid_sources[0x80]	4772	1			T2	1		T12	4		T13	415

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

272590

1

T1

9

T2

22

T4

3

values[0x0]

all_enables

biggest_size

403164

1

T13

30978

T14

14378

T15

16145

values[0x1]

all_enables

biggest_size

402764

1

T13

30871

T14

13951

T15

16171